NL8901480A - DRIVE CIRCUIT FOR A MATRIX DISPLAY DEVICE. - Google Patents

Description

N.V. Philips' Incandescent lamp factories in Eindhoven Control circuit for a matrix display device.

The invention relates to a driving circuit for a matrix display device, provided with a matrix of rows of column conductors, wherein between conductor intersections there are picture elements which can be excited by means of a row selection and a specific column drive with an excitation pulse, which column conductors are each coupled to a column driving circuit. with a counting circuit per column conductor, provided with inputs for supplying an excitation pulse number, a release input and a clock pulse input, wherein after release, with the supply of clock pulses, the counting circuit counts from the excitation pulse number to a reference number resulting in a counting time corresponding to the excitation pulse number counting duration determines the duration of the excitation pulse via a column driver connected to outputs of the counting circuit.

Such a driving circuit is known from US patent 4,353,062. Depending on the clock pulse count up or down to the reference number which is a maximum or a minimum, for example equal to zero, the excitation pulse modulated by the counting duration in pulse width is generated. In addition, the patent describes a driving circuit which is also active with pulse amplitude modulation.

In said patent no specific measures are described for the use of the color display device in which the picture elements each having a basic color are grouped into composite color picture elements.

The object of the invention when using such a display device is to achieve a simple color adjustment in the display. To this end, a driving circuit according to the invention is characterized in that when the color display device is used in which the picture elements each having a basic color are grouped in composite color picture elements, the frequency of the clock pulses for the counting circuits is different for at least two basic colors.

As a result, the excitation pulse duration for the picture elements with these basic colors is no longer dependent only on the associated excitation pulse number, but also on the associated clock pulse frequency, which allows for simple color adjustment.

An embodiment of the driving circuit according to the invention leading to a display device with a color selection that can be selected as desired, is characterized in that at least two clock pulse frequencies are adjustable.

A further embodiment with a color adjustment that offers sufficient possibilities in practice, is characterized in that an adjustability factor of the order of two to four, which increases the clock pulse frequency, is present.

An embodiment for use with a specific color filter has the feature that, when a color mosaic filter is used, the clock pulses can be applied to the counting circuits via a multiplex circuit.

The invention will be further elucidated on the basis of the accompanying drawing as an example, in which figure 1 shows a block schematically drawn embodiment of a driving circuit according to the invention and figure 2 shows another embodiment for a different color image structure in the matrix.

In Figure 1, MX denotes a matrix of intersecting row conductors L and column conductors C. As an example, a number of row conductors L1, L2, L3 to L480 and a number of column conductors C1, C2, C3 to C240 are indicated. Picture elements P are present between the conductor cross points, picture elements P11, P12, P13 of the first row L1, P21 and P22 of the second row L2 and picture elements P31 of the third row L3 are indicated. For the known row selection, the row conductors L are connected to outputs of a row driving circuit LD. For a specific column drive, the column conductors C are connected with an excitation pulse to outputs of a column drive circuit CD. The circuit CD is connected to outputs of a clock pulse source CLS, which according to an aspect of the invention provides clock pulses with different clock pulse frequencies. Thus, Figure 1 shows a matrix display device (MX, LD, CD, CLS), wherein to indicate that it is suitable for a color display, R, G and B indicate respective color filter strips in red, green and blue. transmissive strips lie in the column direction, whereby color image elements lying in the direction of travel are formed, for which example a color image element (P11, P12, P13) is mentioned.

The display device (MX, LD, CD, CLS) is applicable in color television or for the colored display of graphic or other data and may be equipped with gas discharge display cells, light-emitting diodes, liquid crystals and so on. Regardless of the specific picture element structure, it is stated that it is desirable to make a color adjustment in the display. As an example for this, it is assumed that image elements are formed with liquid crystals which act as light switches. It is stated that a light source is present, artificial or the sun, whereby the liquid crystal as light switch determines the transmitted and / or reflected light intensity at the red, green or blue picture element. The ratio of the light intensities determines the color of the composite color image element. This color is further determined by the own color of the light from the light source. Furthermore, different filter thicknesses for the red, green and blue color filters influence the final color of the composite color image element. Due to lamp or ambient light color, different color filter thicknesses, the desire for a particular image color when displayed, etc., there is a need for a color adjustment option. According to the invention this possibility is offered in a simple manner by the use of different clock pulse frequencies, as indicated in Figure 1 at the clock pulse source CLS with the clock pulse frequencies fR = n.fO, fG = p.fO and fB = q.fO where n, p and q multiplication factors are equal to or greater than 1 and it holds that at least two of the factors n, p and q are different.

The color adjustment possibility is realized, inter alia, by supplying clock pulses, which can be designated to three separate input terminals CLR, CLG and CLB of the column driving circuit CD, with the respective frequencies fR, fG and fB. In the circuit CD, terminals CLR, CLG and CLB follow three separate groups of column drivers, the first of which are designated CD1, CD2 and CD3. The last column driver circuit following terminal CLB is designated CD240. The first circuit CD1 following the terminal CLR is shown in more detail and will be described as an example for the other circuits.

The column driving circuit CD1 is formed with a counting circuit CC1 provided with inputs 11, 12, 13 and 14 for supplying an excitation pulse number, a release input EI, a clock pulse input CLI and outputs Q1, Q2, Q3 and Q4. The input terminal with the clock pulses CLR is connected to the clock pulse input CLI. The release input EI is connected to a terminal CE for supplying a release signal which is likewise indicated. Figure 1 shows that the terminal CE is connected to all column drivers CD1, CD2, CD3 through CD240. In a manner not shown, a for example 4-bit excitation pulse number is applied to the inputs 11, 12, 13 and 14 corresponding to the momentary picture element between the column conductor C1 and the selected row conductor L. With the 4-bit selection there are 15 possible excitation levels at the picture element P, under the supply of one of the numbers from 0001 to 1111. After the supply of all the excitation pulse numbers, there is a collective release via the release signal CE, after which, under the supply of the clock pulses CL, each counting circuit CC from its own excitation pulse number counts to a reference number, for example 0000. This can be done by an ascending or descending count. The resulting counting time is fixed by both the excitation pulse number and the clock pulse frequency fR, fG and fB, respectively.

In order to obtain the excitation pulse for the picture element corresponding to the counting duration, in Fig. 1 a column driver DS1 connected to the column conductor, a switching circuit SC1 and a current source circuit IS1 are shown. From the outputs Q1, Q2, Q3 and Q4, on-off switches S1, S2, S3 and S4 respectively are controlled in the switching circuit SC1, via which switches S outputs of the current source circuit IS1 with respective currents A, 3A, 8A and 16A are connected to inputs of a circuit DS1, drawn as adder stage (+). For a detailed description of the operation of the circuit CD1 with the components CC1, SC1, IS1 and DS1, reference is made to the aforementioned United States Patent Specification 4,353,062. In addition to the fact that the circuit CD1 provides a pulse width modulation, there is also a pulse amplitude modulation.

To illustrate the color adjustment capability, the following is mentioned as an example, assuming the color television standard with Y = 0.3R + 0.59G + 0.11B for brightness ï, with top white R = G = B = 1 and black applies R = G = B = 0. Let n = p = q with fR = fG = fB, where the same excitation pulse number for the picture elements of a composite picture element indicates that it is colored white. For example, in case there is a desire for a greenish colored image, the following factors are chosen n = 2, p = 1 and q = 2. An originally white colored picture element with the same excitation pulse number for all three colors is now displayed with the original counting time for green, but with half the counting time for red and blue. After all, the clock pulse frequencies fR and fB are twice the clock pulse frequencies fG. If we now proceed to the factors n = 2, p = 1 and q = 4, with fB = 2fR = 4fG, the base color blue will be strongly reduced and the base color red will be increased relatively, so that a yellowish tint will appear in the greenish image.

It has been found in practice that an adjustment of the factors n, p and q to the order of two to four results in the desired color adjustments.

The matrix MX with picture elements P drawn in figure 1 is provided with color strips R, G and B lying in the column direction. The composite color picture elements (R, G, B) occur in the direction of travel and the element (P11, P12, P13). Figure 2 shows a different color image element structure, namely with a color mosaic leak filter. There are different basic colors in the column direction, as illustrated for column guide C1 with R, B, G, R for row guides L1, L2, L3, L4. The column guides C must therefore be driven in a cycle over three row guides L, which is illustrated with a solid line L1, a dashed line L2, a dotted line L3 and a solid line L4. Figure 2 shows the control for six column conductors C1 to C6, the R, G, B sequence of figure 1 in the direction of travel being present at the row conductors L1 and L4.

The column driver CD is drawn with six column drivers CD1 to CD6, all of which are equipped with three inputs for supplying the clock pulses CLR, CLG or CIiB in said cycle. For simplicity, the inputs for the supply of the excitation pulse numbers are not shown. Obviously, with the clock pulse cycle (CLR, CLG, CLB), excitation pulse numbers are also cyclically applied to each of the circuits CD1, CD2, and so on for red, green, and blue. For the cyclic clock pulse supply, a multiplex circuit MUX is shown in FIG. 2, with three inverters MR, MG and MB, each equipped with a main contact TO and three selector contacts T1, T2 and T3. To illustrate the simultaneous interconnections of the contacts T1, T2 and T3 with TO, these are drawn with drawn, dashed and dotted lines. 3LS denotes a changeover terminal to which a changeover signal of the same designation is applied with a period equal to said cycle. The main contact TO of the inverter MR, MG and MB, respectively, is connected to the input terminals CLR, CLG and CLB, respectively, which is connected to an output of the clock pulse source CLS.

As an example, the clock pulse distribution across the column drivers CD1 through CD6 is described in connection of the contacts TO and T1. The circuits CD1 and CD4 receive the clock pulses CLR, the circuits CD2 and CD5 receive the clock pulses CLG and the circuits CD3 and CD6 receive the clock pulses CLB. R, G and B respectively indicate the processing of the respective red, green and blue color at the connecting line. In the cycle, the signals of the colors R, B and G are applied to the connecting lines between the circuits CD1 and CD4, as suits the color conductors C1 and C4 and the row conductors L1, L2 and L3. The signals of the colors G, R, B and B, G, R, respectively, are similarly indicated at the connecting lines between the circuits CD2 and CD5 and CD3 and CD6, respectively.

Claims (4)

A driving circuit for a matrix display device, provided with a matrix of row and column conductors, where between conductor intersections there are picture elements which can be excited by means of a row selection and a specific column drive with an excitation pulse, which column conductors are each coupled to a column drive circuit executed with a counting circuit per column conductor, provided with inputs for supplying an excitation pulse number, a release input and a clock pulse input, wherein after release, with the supply of clock pulses, the counting circuit counts from the excitation pulse number to a reference number, resulting in a counting duration corresponding to the excitation pulse number outputs of the counting circuit coupled column driver stage defines the duration of the excitation pulse, characterized in that when using the color display device wherein the pixels each have a basic color grouped into composite color pixels, the frequency of the clock pulses for the counting circuits is different for at least two basic colors. Control circuit according to claim 1, characterized in that at least two clock pulse frequencies are adjustable. Control circuit according to claim 2, characterized in that an adjustability factor of the order of two to four increasing the clock pulse frequency. Control circuit according to Claim 1, 2 or 3, characterized in that when a color mosaic filter is used, the clock pulses can be supplied to the counting circuits via a multiplex circuit.