NL7604392A - PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE WITH A FLAT SURFACE. - Google Patents

PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE WITH A FLAT SURFACE.

Info

Publication number
NL7604392A
NL7604392A NL7604392A NL7604392A NL7604392A NL 7604392 A NL7604392 A NL 7604392A NL 7604392 A NL7604392 A NL 7604392A NL 7604392 A NL7604392 A NL 7604392A NL 7604392 A NL7604392 A NL 7604392A
Authority
NL
Netherlands
Prior art keywords
semi
manufacture
flat surface
conductor device
conductor
Prior art date
Application number
NL7604392A
Other languages
Dutch (nl)
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of NL7604392A publication Critical patent/NL7604392A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
NL7604392A 1975-04-25 1976-04-23 PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE WITH A FLAT SURFACE. NL7604392A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50049698A JPS51126077A (en) 1975-04-25 1975-04-25 Manufacturing method of semi-conductor equpment

Publications (1)

Publication Number Publication Date
NL7604392A true NL7604392A (en) 1976-10-27

Family

ID=12838390

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7604392A NL7604392A (en) 1975-04-25 1976-04-23 PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE WITH A FLAT SURFACE.

Country Status (3)

Country Link
JP (1) JPS51126077A (en)
DE (1) DE2616677A1 (en)
NL (1) NL7604392A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7706802A (en) * 1977-06-21 1978-12-27 Philips Nv PROCESS FOR MANUFACTURING A SEMI-CONDUCTOR DEVICE AND SEMI-CONDUCTOR DEVICE MANUFACTURED BY THE PROCESS.
NL187328C (en) * 1980-12-23 1991-08-16 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
AT387474B (en) * 1980-12-23 1989-01-25 Philips Nv METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE
JP2589839B2 (en) * 1990-02-02 1997-03-12 シャープ株式会社 Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
DE2616677A1 (en) 1976-11-04
JPS51126077A (en) 1976-11-02

Similar Documents

Publication Publication Date Title
NL7506594A (en) PROCEDURE FOR MANUFACTURING A SEMI-CONDUCTOR DEVICE AND SEMI-CONDUCTOR DEVICE MANUFACTURED USING THE PROCESS.
NL7602960A (en) PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.
NL7510903A (en) PROCESS FOR MANUFACTURING A SEMI-GUIDE DEVICE, AND DEVICE MANUFACTURED ACCORDING TO THE PROCESS.
NL7609815A (en) PROCESS FOR MANUFACTURING A SEMI-CONDUCTOR DEVICE AND SEMI-CONDUCTOR DEVICE MANUFACTURED BY THE PROCESS.
NL7606768A (en) PROCESS FOR THE PREPARATION OF A CHROMOGENIC OR FLUORESCENT SUBSTRATE.
NL7604632A (en) PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE AND A SEMI-CONDUCTOR DEVICE OBTAINED ACCORDING TO THIS PROCESS.
NL176818B (en) METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
NL7610068A (en) PROCESS FOR THE PREPARATION OF A VINYLIDE-FLUORIDE-POLYMER RESIN.
NL7807983A (en) PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.
NL7609420A (en) PROCEDURE FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.
NL7601830A (en) PROCESS FOR MANUFACTURE OF A SILICON SEMICONDUCTOR.
NL7513161A (en) PROCESS FOR THE MANUFACTURE OF A SEMICONDUCTOR DEVICE, AND DEVICE MANUFACTURED ACCORDING TO THE PROCEDURE.
NL7613893A (en) SEMI-CONDUCTOR DEVICE WITH PASSIVED SURFACE, AND METHOD FOR MANUFACTURING THE DEVICE.
NL7613482A (en) PROCESS FOR THE PREPARATION OF A COATING MATERIAL.
NL7610947A (en) PROCESS FOR MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.
NL7707780A (en) PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE, AND SEMI-CONDUCTOR DEVICE OBTAINED ACCORDING TO THAT PROCESS.
NL155852B (en) PROCESS FOR THE PREPARATION OF A VULCANIZABLE FLUOROELASTOMER.
NL7602765A (en) PROCESS FOR THE MANUFACTURE OF A GLASS ARTICLE.
NL7609607A (en) PROCESS FOR MANUFACTURING A SEMI-CONDUCTOR DEVICE AND SEMI-CONDUCTOR DEVICE MANUFACTURED BY THE PROCESS.
NL7611057A (en) PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.
NL7505134A (en) METHOD FOR MANUFACTURING A SEMI-CONDUCTOR DEVICE.
NL7611928A (en) PROCESS FOR THE MANUFACTURE OF A SEMI-LEADER DEVICE.
NL7604652A (en) PROCESS FOR THE MANUFACTURE OF SEMICONDUCTORS.
NL7710607A (en) PROCESS FOR THE MANUFACTURE OF A LAYER WITH A STRUCTURE ON A SUBSTRATE.
NL7614594A (en) PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE AND A SEMI-CONDUCTOR DEVICE OBTAINED IN THIS WAY.