NL7313571A - - Google Patents
Info
- Publication number
- NL7313571A NL7313571A NL7313571A NL7313571A NL7313571A NL 7313571 A NL7313571 A NL 7313571A NL 7313571 A NL7313571 A NL 7313571A NL 7313571 A NL7313571 A NL 7313571A NL 7313571 A NL7313571 A NL 7313571A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Manipulation Of Pulses (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US00296467A US3828167A (en) | 1972-10-10 | 1972-10-10 | Detector for self-clocking data with variable digit periods |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7313571A true NL7313571A (de) | 1974-04-16 |
Family
ID=23142126
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7313571A NL7313571A (de) | 1972-10-10 | 1973-10-03 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3828167A (de) |
| JP (1) | JPS4974514A (de) |
| DE (1) | DE2350430A1 (de) |
| FR (1) | FR2202407B3 (de) |
| NL (1) | NL7313571A (de) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50110628U (de) * | 1974-02-19 | 1975-09-09 | ||
| US4044312A (en) * | 1976-11-26 | 1977-08-23 | Stromberg-Carlson Corporation | Comparison circuit for removing possibly false signals from a digital bit stream |
| US4157573A (en) * | 1977-07-22 | 1979-06-05 | The Singer Company | Digital data encoding and reconstruction circuit |
| US4181919A (en) * | 1978-03-28 | 1980-01-01 | Ncr Corporation | Adaptive synchronizing circuit for decoding phase-encoded data |
| US4222080A (en) * | 1978-12-21 | 1980-09-09 | International Business Machines Corporation | Velocity tolerant decoding technique |
| US4532559A (en) * | 1983-02-14 | 1985-07-30 | Prime Computer, Inc. | Apparatus for decoding phase encoded data |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3243580A (en) * | 1960-12-06 | 1966-03-29 | Sperry Rand Corp | Phase modulation reading system |
| NL301351A (de) * | 1962-12-05 | |||
| US3491349A (en) * | 1966-10-27 | 1970-01-20 | Sperry Rand Corp | Phase modulation data recovery system for indicating whether consecutive data signals are the same or different |
| US3524164A (en) * | 1968-01-15 | 1970-08-11 | Ibm | Detection and error checking system for binary data |
-
1972
- 1972-10-10 US US00296467A patent/US3828167A/en not_active Expired - Lifetime
-
1973
- 1973-10-03 NL NL7313571A patent/NL7313571A/xx unknown
- 1973-10-08 DE DE19732350430 patent/DE2350430A1/de active Pending
- 1973-10-09 JP JP48113745A patent/JPS4974514A/ja active Pending
- 1973-10-09 FR FR7336068A patent/FR2202407B3/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4974514A (de) | 1974-07-18 |
| DE2350430A1 (de) | 1974-04-25 |
| US3828167A (en) | 1974-08-06 |
| FR2202407B3 (de) | 1976-09-03 |
| FR2202407A1 (de) | 1974-05-03 |