NL7109494A - - Google Patents
Info
- Publication number
- NL7109494A NL7109494A NL7109494A NL7109494A NL7109494A NL 7109494 A NL7109494 A NL 7109494A NL 7109494 A NL7109494 A NL 7109494A NL 7109494 A NL7109494 A NL 7109494A NL 7109494 A NL7109494 A NL 7109494A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19702036517 DE2036517B2 (en) | 1970-07-23 | 1970-07-23 | PROCEDURE FOR OPERATING A DEFECTIVE MEMORY ELEMENT CONTAINING A MEMORY FOR PROGRAM-CONTROLLED ELECTRONIC DATA PROCESSING SYSTEMS |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7109494A true NL7109494A (en) | 1972-01-25 |
Family
ID=5777610
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7109494A NL7109494A (en) | 1970-07-23 | 1971-07-09 |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPS518338Y2 (en) |
| CA (1) | CA942428A (en) |
| CH (1) | CH536013A (en) |
| DE (1) | DE2036517B2 (en) |
| GB (1) | GB1340220A (en) |
| NL (1) | NL7109494A (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49115447U (en) * | 1973-01-30 | 1974-10-02 | ||
| JPS56156993A (en) * | 1980-05-08 | 1981-12-03 | Fujitsu Ltd | Read only memory |
| JPS595497A (en) * | 1982-07-02 | 1984-01-12 | Hitachi Ltd | Semiconductor rom |
| JPS59185098A (en) * | 1983-04-04 | 1984-10-20 | Oki Electric Ind Co Ltd | Semiconductor memory device incorporating self-diagnostic circuit |
| GB2158622A (en) * | 1983-12-21 | 1985-11-13 | Goran Anders Henrik Hemdal | Computer controlled systems |
| GB2228113B (en) * | 1989-02-10 | 1993-01-27 | Plessey Co Plc | Circuit arrangement for verifying data stored in a random access memory |
| US6570795B1 (en) * | 2002-04-10 | 2003-05-27 | Hewlett-Packard Development Company, L.P. | Defective memory component of a memory device used to represent a data bit in a bit sequence |
-
1970
- 1970-07-23 DE DE19702036517 patent/DE2036517B2/en active Pending
-
1971
- 1971-07-05 CH CH981371A patent/CH536013A/en not_active IP Right Cessation
- 1971-07-09 NL NL7109494A patent/NL7109494A/xx unknown
- 1971-07-22 CA CA118,828A patent/CA942428A/en not_active Expired
- 1971-07-23 GB GB3461871A patent/GB1340220A/en not_active Expired
- 1971-11-26 JP JP11033971U patent/JPS518338Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| CA942428A (en) | 1974-02-19 |
| JPS518338Y2 (en) | 1976-03-05 |
| GB1340220A (en) | 1973-12-12 |
| JPS4831940U (en) | 1973-04-18 |
| CH536013A (en) | 1973-04-15 |
| DE2036517A1 (en) | 1972-01-27 |
| DE2036517B2 (en) | 1972-10-19 |