NL2019629B1 - Data processing apparatus and method of connecting the apparatus to a network - Google Patents
Data processing apparatus and method of connecting the apparatus to a network Download PDFInfo
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- NL2019629B1 NL2019629B1 NL2019629A NL2019629A NL2019629B1 NL 2019629 B1 NL2019629 B1 NL 2019629B1 NL 2019629 A NL2019629 A NL 2019629A NL 2019629 A NL2019629 A NL 2019629A NL 2019629 B1 NL2019629 B1 NL 2019629B1
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- Prior art keywords
- motherboard
- shared
- data processing
- network connector
- power supply
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- 238000012545 processing Methods 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 13
- 230000002093 peripheral effect Effects 0.000 claims description 6
- 238000004590 computer program Methods 0.000 claims description 4
- 238000013461 design Methods 0.000 claims description 4
- 150000001875 compounds Chemical class 0.000 claims 1
- 241000700605 Viruses Species 0.000 description 4
- 230000036039 immunity Effects 0.000 description 3
- 230000002155 anti-virotic effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007775 late Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000009385 viral infection Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/02—Network architectures or network communication protocols for network security for separating internal from external traffic, e.g. firewalls
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer And Data Communications (AREA)
Abstract
Description
OctrooicentrumPatent center
Θ 20196292019629
(2?) Aanvraagnummer: 2019629 (22) Aanvraag ingediend: 26 september 2017(2?) Application number: 2019629 (22) Application submitted: 26 September 2017
Int. CL:Int. CL:
G06F 15/16(2017.01) H04L 29/06 (2018.01)G06F 15/16 (2017.01) H04L 29/06 (2018.01)
54) Data processing apparatus and method of connecting the apparatus to a network54) Data processing apparatus and method or connecting the apparatus to a network
5^ Method of providing a data processing apparatus which is suited to be connected to a network with other data processing apparatuses, comprising the step of providing the data processing apparatus with5 ^ Method of providing a data processing apparatus which is suited to be connected to a network with other data processing apparatuses, including the step of providing the data processing apparatus with
- a shared chassis;- a shared chassis;
- a shared power supply;- a shared power supply;
- a first motherboard mounted in the shared chassis and powered by the shared power supply;- a first motherboard mounted in the shared chassis and powered by the shared power supply;
- a second motherboard mounted in the shared chassis and powered by the shared power supply; and- a second motherboard mounted in the shared chassis and powered by the shared power supply; and
- by mounting a third motherboard in the shared chassis and arranging it to be powered by the shared power supply, and organizing and structuring the third motherboard to facilitate and control data exchange between the third motherboard and the first motherboard, and to facilitate and control data exchange between the third motherboard and the second motherboard.- by mounting a third motherboard in the shared chassis and arranging it to be powered by the shared power supply, and organizing and structuring the third motherboard to facilitate and control data exchange between the third motherboard and the first motherboard, and to facilitate and control data exchange between the third motherboard and the second motherboard.
The first motherboard is configured in such a way that it has no connections for external devices such as an USB stick, or card reader or WIFI. The first motherboard is equipped with a network connector that is capable of connecting to the intra-net. It is essential that the first motherboard is not visible from the Internet. The second motherboard is configured as a standard motherboard. It has all the standard connection capabilities and can connect to the Internet.The first motherboard is configured in such a way that it has no connections for external devices such as a USB stick, card reader or WIFI. The first motherboard is equipped with a network connector that is capable of connecting to the intra-net. It is essential that the first motherboard is not visible from the Internet. The second motherboard is configured as a standard motherboard. It has all the standard connection capabilities and can connect to the Internet.
NL B1 2019629NL B1 2019629
Dit octrooi is verleend ongeacht het bijgevoegde resultaat van het onderzoek naar de stand van de techniek en schriftelijke opinie. Het octrooischrift komt overeen met de oorspronkelijk ingediende stukken.This patent has been granted regardless of the attached result of the research into the state of the art and written opinion. The patent corresponds to the documents originally submitted.
Data processing apparatus and method of connecting the apparatus to a networkData processing apparatus and method or connecting the apparatus to a network
The invention relates to a data processing apparatus and to a method of connecting the data processing apparatus to a network.The invention relates to a data processing apparatus and to a method of connecting the data processing apparatus to a network.
From US 5,680,536 a data processing apparatus is known comprisingFrom US 5,680,536 a data processing apparatus is known including
- a shared chassis;- a shared chassis;
- a shared power supply;- a shared power supply;
- a first motherboard mounted in the shared chassis and powered by the shared power supply;- a first motherboard mounted in the shared chassis and powered by the shared power supply;
- a second motherboard mounted in the shared chassis and powered by the shared power supply.- a second motherboard mounted in the shared chassis and powered by the shared power supply.
Both motherboards support their own set of peripheral boards and a motherboard select circuit arbitrates which motherboard is in control of the shared keyboard port, a shared video port, and a shared serial port.Both motherboards support their own set of peripheral boards and a motherboard select circuit arbitrates which motherboard is in control of the shared keyboard port, a shared video port, and a shared serial port.
The instant invention has as an object to provide a reliable data processing apparatus with improved resistance, if not entire immunity, against software virus infections.The instant invention has as an object to provide a reliable data processing apparatus with improved resistance, if not entire immunity, against software virus infections.
It is common knowledge that software virus infections spread around through the Internet, and are spread for various reasons including extortion (ransomware) or even simply sabotage. According to Wikipedia computer viruses currently cause billions of dollars' worth of economic damage each year, due to causing system failure, wasting computer resources, corrupting data, increasing maintenance costs, etc. Software viruses can be especially dangerous when they infect computers that manage infrastructure components like airports, harbours, hospitals and power grids. In this way computer viruses become a powerful weapon in cyber warfare. In response software antivirus tools have been developed, and an industry of antivirus software has cropped up, selling or freely distributing virus protection to users of various operating systems.It is common knowledge that software viruses spread around through the Internet, and are spread for various reasons including extortion (ransomware) or equally simply sabotage. According to Wikipedia computer viruses currently cause billions of dollars worth of economic damage each year, due to causing system failure, wasting computer resources, corrupting data, increasing maintenance costs, etc. Software viruses can be especially dangerous when they infect computers that manage infrastructure components like airports, harbors, hospitals and power grids. In this way, computer viruses become a powerful weapon in cyber warfare. In response software antivirus tools have been developed, and an industry or antivirus software has cropped up, selling or freely distributing virus protection to users or various operating systems.
The invention proposes an entire new approach to tackle the current vulnerability of data processing apparatuses that connect or are connectable to the Internet.The invention proposes an entire new approach to tackle the current vulnerability of data processing apparatuses that connect or are connectable to the Internet.
Essential to the invention is that a third motherboard is mounted in the shared chassis and powered by the shared power supply, which is organized and structured to facilitate and control data exchange between the third motherboard and the first motherboard, and to facilitate and control data exchange between the third motherboard and the second motherboard. This enables that the first motherboard and the second motherboard can be structured in the chassis without interconnection between this first and second motherboard except for the third motherboard, so that no direct interchange of data is possible between the first motherboard and the second motherboard. In other words: from a data communication point of view the first motherboard and the second motherboard are communicatively isolated from each other. Accordingly a selected one of the first motherboard and the second motherboard is connected to the Internet, the other non-connected motherboard only has access to the Internet under control of the third motherboard which facilitates and controls data exchange between this third motherboard and the other two motherboards. This means that the non-connected motherboard is secure from viruses spread through the Internet and that may affect the connected motherboard through its connection with the Internet.Essential to the invention is that a third motherboard is mounted in the shared chassis and powered by the shared power supply, which is organized and structured to facilitate and control data exchange between the third motherboard and the first motherboard, and to facilitate and control data exchange between the third motherboard and the second motherboard. This allows that the first motherboard and the second motherboard can be structured in the chassis without interconnection between this first and second motherboard except for the third motherboard, so that no direct interchange of data is possible between the first motherboard and the second motherboard. In other words: from a data communication point of view the first motherboard and the second motherboard are communicatively isolated from each other. Accept a selected one of the first motherboard and the second motherboard is connected to the Internet, the other non-connected motherboard only has access to the Internet under control of the third motherboard which facilitates and controls data exchange between this third motherboard and the other two motherboards. This means that the non-connected motherboard is secure from viruses spread through the Internet and that may affect the connected motherboard through its connection to the Internet.
One thing and another is suitably structured by providing the first, the second and the third motherboard of the data processing apparatus each with a CPU, memory and hard disk and with connectors for peripheral equipment, and to restrict the connectors of the first motherboard to an intranet network connector and to a connection with the third motherboard only, and to provide the second motherboard with a connection with the third motherboard as well as with an Internet network connector and connectors for further ancillary equipment, while the third motherboard can then connect to the first motherboard and the second motherboard. Via an analog switch connectors for mouse, keyboard and video are supported to enable user communications with all motherboards. Within the meaning of this description the term 'intranet'' is meant to relate to a private network accessible only internally to members of an organization, whereas the term 'Internet'' re lates to the commonly known global system of interconnected computer networks (which former VP Al Gore has claimed to have invented).One thing and another is suitably structured by providing the first, the second and the third motherboard of the data processing apparatus each with a CPU, memory and hard disk and with connectors for peripheral equipment, and to restrict the connectors of the first motherboard to an intranet network connector and to a connection with the third motherboard only, and to provide the second motherboard with a connection with the third motherboard as well as with an Internet network connector and connectors for further ancillary equipment, while the third motherboard can then connect to the first motherboard and the second motherboard. Analog switch connectors for mouse, keyboard and video are supported to enable user communications with all motherboards. Within the meaning of this description the term 'intranet' is meant to relate to a private network accessible only internally to members of an organization, whereas the term 'Internet' 'lates to the commonly known global system or interconnected computer networks (which former VP Al Gore has claimed to have invented).
Immunity against software viruses spreading through the Internet is particularly promoted by the feature that the third motherboard has read/write capability with reference to both the hard disk of the first motherboard and with reference to the hard disk of the second motherboard. It is further desirable that the first motherboard and the second motherboard are incapable of accessing the hard disk of the third motherboard .Immunity against software viruses spreading through the Internet is particularly promoted by the feature that the third motherboard has read / write capability with reference to both the hard disk or the first motherboard and with reference to the hard disk or the second motherboard. It is further desirable that the first motherboard and the second motherboard are incapable of accessing the hard disk or the third motherboard.
The immunity against software viruses infecting the (first motherboard of the) data processing apparatus is further promoted by arranging that the intranet network connector of the first motherboard and the Internet network connector of the second motherboard are of physically different design so as to counteract or prevent accidental connection of the first motherboard with the Internet and accidental connection of the second motherboard with the intranet.The immunity against software viruses infecting the (first motherboard of the) data processing apparatus is further promoted by arranging that the intranet network connector or the first motherboard and the Internet network connector or the second motherboard or physically different design so as to counteract or prevent accidental connection of the first motherboard with the Internet and accidental connection of the second motherboard with the intranet.
It is further beneficial that the intranet network connector of the first motherboard and the Internet network connector of the second motherboard operate at different voltages corresponding to or defining a logical one so as to arrange that at least the first motherboard is incapable to communicate with the Internet. When for instance the intranet network connector of the first motherboard defines the threshold voltage of a logical one at 6 V, a logical zero and a logical one cannot be distinguished in the data flow from the Internet, wherein a threshold of approximately 2.5 V applies for separating a logical zero from a logical one.It is further beneficial that the intranet network connector of the first motherboard and the Internet network connector of the second motherboard operate at different voltages corresponding to or defining a logical one so as to arrange that at least the first motherboard is incapable to communicate with the Internet . When for instance the intranet network connector of the first motherboard defines the threshold voltage of a logical one at 6 V, a logical zero and a logical one cannot be distinguished in the data flow from the Internet, a threshold of approximately 2.5 V applies for separating a logical zero from a logical one.
A further preferable feature is that the first motherboard is loaded with a computer program which is arranged to continuously check IP addresses of sources within the intranet from which the first motherboard receives data, and to deny processing of such data when the IP address of the established source of the data is outside a predetermined range. In this way only data exchange can be accepted with known and trusted sources of data within the intranet of which the IP addresses are known.A further preferable feature is that the first motherboard is loaded with a computer program which is arranged to continuously check IP addresses or sources within the intranet from which the first motherboard receives data, and to deny processing or such data when the IP address of the established source of the data is outside a predetermined range. In this way only data exchange can be accepted with known and trusted sources or data within the intranet or which the IP addresses are known.
The invention will hereinafter be further elucidated with reference to the drawing of an exemplary embodiment of a data processing apparatus according to the invention that is not limiting as to the appended claims.The invention will be further elucidated with reference to the drawing of an exemplary embodiment of a data processing apparatus according to the invention that is not limiting as to the appended claims.
In the drawing:In the drawing:
- a single figure shows schematically a data processing apparatus according to the invention.- a single figure shows schematically a data processing apparatus according to the invention.
The figure shows a data processing apparatus 1 comprising :The figure shows a data processing apparatus 1 including:
- a shared chassis 2;- a shared chassis 2;
- a shared power supply 3;- a shared power supply 3;
- a first motherboard 4 mounted in the shared chassis 2 and powered by the shared power supply 3;- a first motherboard 4 mounted in the shared chassis 2 and powered by the shared power supply 3;
- a second motherboard 5 mounted in the shared chassis 2 and powered by the shared power supply 3; and- a second motherboard 5 mounted in the shared chassis 2 and powered by the shared power supply 3; and
- a third motherboard 6 mounted in the shared chassis 2 and powered by the shared power supply 3.- a third motherboard 6 mounted in the shared chassis 2 and powered by the shared power supply 3.
The first motherboard 4, the second motherboard 5 and the third motherboard 6 are each provided with an individual CPU 4', 5', 6', an individual memory 4'', 5'', 6'' and an individual hard disk 4''', 5''', 6''' and with connectors for peripheral equipment.The first motherboard 4, the second motherboard 5 and the third motherboard 6 are each provided with an individual CPU 4 ', 5', 6 ', an individual memory 4' ', 5' ', 6' 'and an individual hard disk 4 '' ', 5' '', 6 '' 'and with connectors for peripheral equipment.
The third motherboard 6 is organized and structured to facilitate and control back-and-forth or mutual data exchange between the third motherboard 6 and the first motherboard 4 as symbolized by the double arrow A, and to facilitate and control such two-way data exchange between the third motherboard 6 and the second motherboard 5 as symbolized by the double arrow B.The third motherboard 6 is organized and structured to facilitate and control back-and-forth or mutual data exchange between the third motherboard 6 and the first motherboard 4 as symbolized by the double arrow A, and to facilitate and control such two-way data exchange between the third motherboard 6 and the second motherboard 5 as symbolized by the double arrow B.
Such two-way data exchange is only possible when initiated by the third motherboard 6 or by a process running on this third motherboard 6. For this purpose the third motherboard 6 has read/write capability with reference to both the hard disk 4''' of the first motherboard 4 and with reference to the hard disk 5''’ of the second motherboard 5. Further the first motherboard 4 and the second motherboard 5 are incapable of accessing the hard disk 6'’' of the third motherboard 6.Such two-way data exchange is only possible when initiated by the third motherboard 6 or by a process running on this third motherboard 6. For this purpose the third motherboard 6 has read / write capability with reference to both the hard disk 4 '' ' or the first motherboard 4 and with reference to the hard disk 5 '' 'or the second motherboard 5. Further the first motherboard 4 and the second motherboard 5 are incapable of accessing the hard disk 6' '' or the third motherboard 6.
The connectors of the first motherboard 4 are restricted to an intranet network connector 7 and to a connec tion with the third motherboard 6 only as symbolized with the double arrow A. The second motherboard 5 is provided with a connection with the third motherboard 6 as symbolized by the double arrow B, as well as an Internet network connector 8 and connectors 9 for further ancillary equipment, such as USB, CDROM, Wi-Fi etc. The third motherboard 6 connects to the first motherboard 4 and to the second motherboard 5. Via an analog switch bank 14 that is connected to all three motherboards 4, 5, 6, a connection can be made to external devices such as a mouse 12, a keyboard 13 and a video display unit 11. The intranet is symbolized by the small cloud 14, whereas the Internet is symbolized by the relatively larger cloud 15.The connectors of the first motherboard 4 are restricted to an intranet network connector 7 and to a connection with the third motherboard 6 only as symbolized with the double arrow A. The second motherboard 5 is provided with a connection with the third motherboard 6 as symbolized by the double arrow B, as well as an Internet network connector 8 and connectors 9 for further ancillary equipment, such as USB, CDROM, Wi-Fi etc. The third motherboard 6 connects to the first motherboard 4 and to the second motherboard 5. Via an analog switch bank 14 that is connected to all three motherboards 4, 5, 6, a connection can be made to external devices such as a mouse 12, a keyboard 13 and a video display unit 11. The intranet is symbolized by the small cloud 14, whereas the Internet is symbolized by the relatively larger cloud 15.
The intranet network connector 7 of the first motherboard 4 and the Internet network connector 8 of the second motherboard 5 are preferably of physically different design so as to prevent or counteract accidental connection of the first motherboard 4 with the Internet 15 and accidental connection of the second motherboard 5 with the intranet 14. This means that the currently applied RJ-45 connector can still be applied for connection with the Internet 15 but is not to be applied to connect the first motherboard 4 with the intranet 14.The intranet network connector 7 of the first motherboard 4 and the Internet network connector 8 of the second motherboard 5 are preferably of physically different design so as to prevent or counteract an accidental connection of the first motherboard 4 with the Internet 15 and accidental connection of the second motherboard 5 with the intranet 14. This means that the currently applied RJ-45 connector can still be applied for connection to the Internet 15 but is not applied to connect the first motherboard 4 with the intranet 14.
It is further preferred that the intranet network connector 7 of the first motherboard 4 and the Internet network connector 8 of the second motherboard 5 operate at different voltages defining a logical one so as to arrange that at least the first mother-board 4 is incapable to communicate with the Internet 15.It is further preferred that the intranet network connector 7 or the first motherboard 4 and the Internet network connector 8 or the second motherboard 5 operate at different voltages defining a logical one so as to arrange that at least the first motherboard 4 is incapable to communicate with the Internet 15.
Finally it is remarked that one other preferable feature is that the first motherboard 4 is loaded with a computer program which is arranged to continuously check IP addresses of sources within the intranet 14 from which the first motherboard 4 receives data, and to deny processing of such data when the IP address of the established source of the data is outside a predetermined range.Finally it is remarked that one other preferable feature is that the first motherboard 4 is loaded with a computer program which is arranged to continuously check IP addresses of sources within the intranet 14 from which the first motherboard 4 receives data, and to deny processing of such data when the IP address or the established source or data is outside a predetermined range.
Although the invention has been discussed in the foregoing with reference to an exemplary embodiment of the apparatus of the invention, the invention is not restricted to this particular embodiment which can be varied in many ways without departing from the invention. The discussed exemplary embodiment shall therefore not be used to construe the appended claims strictly in accordance therewith. On the contrary the embodiment is merely intended to explain the wording of the appended claims without intent to limit the claims to this 5 exemplary embodiment. The scope of protection of the invention shall therefore be construed in accordance with the appended claims only, wherein a possible ambiguity in the wording of the claims shall be resolved using this exemplary embodiment.Although the invention has been discussed in the foregoing with reference to an embodiment of the apparatus of the invention, the invention is not restricted to this particular embodiment which can be varied in many ways without departing from the invention. The discussed example is therefore not used to construct the appended claims strictly in accordance with therewith. On the contrary the embodiment is merely intended to explain the wording of the appended claims without intent to limit the claims to this 5 exemplary embodiment. The scope of protection of the invention shall therefore be constructed in accordance with the appended claims only, where possible ambiguity in the wording of the claims shall be resolved using this exemplary embodiment.
Claims (14)
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NL2019629A NL2019629B1 (en) | 2017-09-26 | 2017-09-26 | Data processing apparatus and method of connecting the apparatus to a network |
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NL2019629A NL2019629B1 (en) | 2017-09-26 | 2017-09-26 | Data processing apparatus and method of connecting the apparatus to a network |
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140068286A1 (en) * | 2011-03-21 | 2014-03-06 | NCS Technologies, Inc. | Adaptive computing system with modular control, switching, and power supply architecture |
US9332023B1 (en) * | 2014-08-25 | 2016-05-03 | Symantec Corporation | Uploading signatures to gateway level unified threat management devices after endpoint level behavior based detection of zero day threats |
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2017
- 2017-09-26 NL NL2019629A patent/NL2019629B1/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140068286A1 (en) * | 2011-03-21 | 2014-03-06 | NCS Technologies, Inc. | Adaptive computing system with modular control, switching, and power supply architecture |
US9332023B1 (en) * | 2014-08-25 | 2016-05-03 | Symantec Corporation | Uploading signatures to gateway level unified threat management devices after endpoint level behavior based detection of zero day threats |
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