NL163398B - Circuit for generating branch impulses for data transfer. - Google Patents

Circuit for generating branch impulses for data transfer.

Info

Publication number
NL163398B
NL163398B NL7103740.A NL7103740A NL163398B NL 163398 B NL163398 B NL 163398B NL 7103740 A NL7103740 A NL 7103740A NL 163398 B NL163398 B NL 163398B
Authority
NL
Netherlands
Prior art keywords
impulses
circuit
data transfer
generating branch
branch
Prior art date
Application number
NL7103740.A
Other languages
Dutch (nl)
Other versions
NL163398C (en
NL7103740A (en
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of NL7103740A publication Critical patent/NL7103740A/xx
Publication of NL163398B publication Critical patent/NL163398B/en
Application granted granted Critical
Publication of NL163398C publication Critical patent/NL163398C/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Manipulation Of Pulses (AREA)
NL7103740.A 1970-03-23 1971-03-19 Circuit for generating branch impulses for data transfer. NL163398C (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2013880A DE2013880C3 (en) 1970-03-23 1970-03-23 Circuit arrangement for generating clock pulses

Publications (3)

Publication Number Publication Date
NL7103740A NL7103740A (en) 1971-09-27
NL163398B true NL163398B (en) 1980-03-17
NL163398C NL163398C (en) 1980-08-15

Family

ID=5766013

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7103740.A NL163398C (en) 1970-03-23 1971-03-19 Circuit for generating branch impulses for data transfer.

Country Status (7)

Country Link
US (1) US3671873A (en)
BE (1) BE764683A (en)
DE (1) DE2013880C3 (en)
FR (1) FR2084966A5 (en)
GB (1) GB1301598A (en)
LU (1) LU62820A1 (en)
NL (1) NL163398C (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3742461A (en) * 1972-02-22 1973-06-26 Us Navy Calibrate lock-on circuit and decommutator
DE2312326C2 (en) * 1973-03-13 1985-10-17 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Phase discriminator
SE372393B (en) * 1973-11-22 1974-12-16 Ericsson Telefon Ab L M
JPS561823B2 (en) * 1973-12-30 1981-01-16
US3952253A (en) * 1974-11-21 1976-04-20 The United States Of America As Represented By The United States Energy Research And Development Administration Method and means for generating a synchronizing pulse from a repetitive wave of varying frequency
US4024510A (en) * 1975-08-28 1977-05-17 International Business Machines Corporation Function multiplexer
DE2616398C2 (en) * 1976-04-14 1978-06-01 Siemens Ag, 1000 Berlin Und 8000 Muenchen Circuit arrangement for regulating the pulse repetition frequency of a signal
US4206414A (en) * 1976-09-01 1980-06-03 Racal Group Services Limited Electrical synchronizing circuits
FR2420253A1 (en) * 1978-03-17 1979-10-12 Materiel Telephonique Programmable digital phase control for transceivers - has synchronised oscillator working as clock source and feeding binary counter
JPS5720052A (en) 1980-07-11 1982-02-02 Toshiba Corp Input data synchronizing circuit
DE3202945C2 (en) * 1982-01-29 1985-12-05 Siemens AG, 1000 Berlin und 8000 München Method and arrangement for generating window pulses (data and possibly clock window pulses) for a separator circuit for separating the data pulses from accompanying pulses when reading magnetic tape or disk memories, in particular floppy disk memories
FR2579042B1 (en) * 1985-03-18 1987-05-15 Bull Micral METHOD FOR EXTRACTING A SYNCHRONOUS CLOCK SIGNAL FROM A SINGLE OR DUAL CURRENT SIGNAL, AND DEVICE FOR CARRYING OUT THE METHOD

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4943809B1 (en) * 1968-10-25 1974-11-25
US3566280A (en) * 1969-03-07 1971-02-23 Martin Marietta Corp Digital communications clock synchronizer for responding to pulses of predetermined width and further predictable pulses of sufficient energy level during particular interval

Also Published As

Publication number Publication date
DE2013880C3 (en) 1974-02-21
FR2084966A5 (en) 1971-12-17
DE2013880B2 (en) 1973-08-02
NL163398C (en) 1980-08-15
DE2013880A1 (en) 1971-09-30
NL7103740A (en) 1971-09-27
LU62820A1 (en) 1971-11-08
US3671873A (en) 1972-06-20
GB1301598A (en) 1972-12-29
BE764683A (en) 1971-09-23

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Legal Events

Date Code Title Description
V1 Lapsed because of non-payment of the annual fee