NL156840B - MEMORY ADDRESS SWITCHING FOR A DATA PROCESSING DEVICE. - Google Patents

MEMORY ADDRESS SWITCHING FOR A DATA PROCESSING DEVICE.

Info

Publication number
NL156840B
NL156840B NL6509102.A NL6509102A NL156840B NL 156840 B NL156840 B NL 156840B NL 6509102 A NL6509102 A NL 6509102A NL 156840 B NL156840 B NL 156840B
Authority
NL
Netherlands
Prior art keywords
data processing
processing device
memory address
address switching
switching
Prior art date
Application number
NL6509102.A
Other languages
Dutch (nl)
Other versions
NL6509102A (en
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Publication of NL6509102A publication Critical patent/NL6509102A/xx
Publication of NL156840B publication Critical patent/NL156840B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
NL6509102.A 1964-07-15 1965-07-14 MEMORY ADDRESS SWITCHING FOR A DATA PROCESSING DEVICE. NL156840B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US382891A US3331056A (en) 1964-07-15 1964-07-15 Variable width addressing arrangement

Publications (2)

Publication Number Publication Date
NL6509102A NL6509102A (en) 1966-01-17
NL156840B true NL156840B (en) 1978-05-16

Family

ID=23510845

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6509102.A NL156840B (en) 1964-07-15 1965-07-14 MEMORY ADDRESS SWITCHING FOR A DATA PROCESSING DEVICE.

Country Status (11)

Country Link
US (1) US3331056A (en)
AT (1) AT261940B (en)
BE (1) BE666942A (en)
CH (1) CH448574A (en)
DE (1) DE1499193C3 (en)
DK (1) DK129814B (en)
FI (1) FI46100C (en)
GB (1) GB1115765A (en)
NL (1) NL156840B (en)
NO (1) NO119855B (en)
SE (1) SE341282B (en)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3425036A (en) * 1966-03-25 1969-01-28 Burroughs Corp Digital computer having a generalized literal operation
US3422405A (en) * 1966-03-25 1969-01-14 Burroughs Corp Digital computer having an indirect field length operation
US3462744A (en) * 1966-09-28 1969-08-19 Ibm Execution unit with a common operand and resulting bussing system
US3448436A (en) * 1966-11-25 1969-06-03 Bell Telephone Labor Inc Associative match circuit for retrieving variable-length information listings
US3521237A (en) * 1967-05-11 1970-07-21 Bell Telephone Labor Inc High-speed data-directed information processing system
US3530439A (en) * 1968-07-22 1970-09-22 Rca Corp Computer memory address generator
NL6815506A (en) * 1968-10-31 1970-05-04
US3581287A (en) * 1969-02-10 1971-05-25 Sanders Associates Inc Apparatus for altering computer memory by bit, byte or word
US3593312A (en) * 1969-11-14 1971-07-13 Burroughs Corp Data processor having operand tags to identify as single or double precision
BE758811A (en) * 1969-11-28 1971-04-16 Burroughs Corp INFORMATION PROCESSING SYSTEM HAVING A STORAGE WITHOUT STRUCTURE FOR NAPPED PROCESSING
BE758815A (en) * 1969-11-28 1971-04-16 Burroughs Corp INFORMATION PROCESSING SYSTEM PRESENTING MEANS FOR THE DYNAMIC PREPARATION OF MEMORY ADDRESSES
FR10582E (en) * 1970-06-29 1909-07-30 Paul Alexis Victor Lerolle Lock set with master key
US3701108A (en) * 1970-10-30 1972-10-24 Ibm Code processor for variable-length dependent codes
US3701111A (en) * 1971-02-08 1972-10-24 Ibm Method of and apparatus for decoding variable-length codes having length-indicating prefixes
US3735355A (en) * 1971-05-12 1973-05-22 Burroughs Corp Digital processor having variable length addressing
US3739352A (en) * 1971-06-28 1973-06-12 Burroughs Corp Variable word width processor control
US3806877A (en) * 1971-07-28 1974-04-23 Allen Bradley Co Programmable controller expansion circuit
US3827027A (en) * 1971-09-22 1974-07-30 Texas Instruments Inc Method and apparatus for producing variable formats from a digital memory
US3828316A (en) * 1973-05-30 1974-08-06 Sperry Rand Corp Character addressing in a word oriented computer system
US4109310A (en) * 1973-08-06 1978-08-22 Xerox Corporation Variable field length addressing system having data byte interchange
US3883847A (en) * 1974-03-28 1975-05-13 Bell Telephone Labor Inc Uniform decoding of minimum-redundancy codes
US4037213A (en) * 1976-04-23 1977-07-19 International Business Machines Corporation Data processor using a four section instruction format for control of multi-operation functions by a single instruction
GB2007889B (en) * 1977-10-25 1982-04-21 Digital Equipment Corp Central processor unit for executing instructions with a special operand specifier
US4206503A (en) * 1978-01-10 1980-06-03 Honeywell Information Systems Inc. Multiple length address formation in a microprogrammed data processing system
US4291370A (en) * 1978-08-23 1981-09-22 Westinghouse Electric Corp. Core memory interface for coupling a processor to a memory having a differing word length
US4240142A (en) * 1978-12-29 1980-12-16 Bell Telephone Laboratories, Incorporated Data processing apparatus providing autoincrementing of memory pointer registers
US4293907A (en) * 1978-12-29 1981-10-06 Bell Telephone Laboratories, Incorporated Data processing apparatus having op-code extension register
US4250545A (en) * 1978-12-29 1981-02-10 Bell Telephone Laboratories, Incorporated Data processing apparatus providing autoloading of memory pointer registers
CA1174370A (en) * 1980-05-19 1984-09-11 Hidekazu Matsumoto Data processing unit with pipelined operands
USRE32493E (en) * 1980-05-19 1987-09-01 Hitachi, Ltd. Data processing unit with pipelined operands
US4403284A (en) * 1980-11-24 1983-09-06 Texas Instruments Incorporated Microprocessor which detects leading 1 bit of instruction to obtain microcode entry point address
US4814978A (en) * 1986-07-15 1989-03-21 Dataflow Computer Corporation Dataflow processing element, multiprocessor, and processes
US5127104A (en) * 1986-12-29 1992-06-30 Dataflow Computer Corporation Method and product involving translation and execution of programs by automatic partitioning and data structure allocation
US5072372A (en) * 1989-03-03 1991-12-10 Sanders Associates Indirect literal expansion for computer instruction sets
US5168571A (en) * 1990-01-24 1992-12-01 International Business Machines Corporation System for aligning bytes of variable multi-bytes length operand based on alu byte length and a number of unprocessed byte data
JP3428741B2 (en) * 1994-02-14 2003-07-22 松下電器産業株式会社 Arithmetic unit, address generator, and program controller

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1163267A (en) * 1956-12-12 1958-09-24 Electronique & Automatisme Sa Improvements to digital calculators
US3200380A (en) * 1961-02-16 1965-08-10 Burroughs Corp Data processing system
US3275989A (en) * 1961-10-02 1966-09-27 Burroughs Corp Control for digital computers
US3223982A (en) * 1962-04-06 1965-12-14 Olivetti & Co Spa Electronic computer with abbreviated addressing of data

Also Published As

Publication number Publication date
DE1499193A1 (en) 1970-03-12
NL6509102A (en) 1966-01-17
DK129814B (en) 1974-11-18
DE1499193C3 (en) 1974-03-14
FI46100C (en) 1972-12-11
BE666942A (en) 1965-11-03
NO119855B (en) 1970-07-13
SE341282B (en) 1971-12-20
FI46100B (en) 1972-08-31
DK129814C (en) 1975-05-12
DE1499193B2 (en) 1973-08-16
CH448574A (en) 1967-12-15
GB1115765A (en) 1968-05-29
AT261940B (en) 1968-05-27
US3331056A (en) 1967-07-11

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Legal Events

Date Code Title Description
VJC Lapsed due to non-payment of the due maintenance fee for the patent or patent application
NL80 Information provided on patent owner name for an already discontinued patent

Owner name: HONEYWELL