NL152998B - Rekeninrichting. - Google Patents

Rekeninrichting.

Info

Publication number
NL152998B
NL152998B NL656509472A NL6509472A NL152998B NL 152998 B NL152998 B NL 152998B NL 656509472 A NL656509472 A NL 656509472A NL 6509472 A NL6509472 A NL 6509472A NL 152998 B NL152998 B NL 152998B
Authority
NL
Netherlands
Prior art keywords
calculator
Prior art date
Application number
NL656509472A
Other languages
English (en)
Other versions
NL6509472A (nl
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of NL6509472A publication Critical patent/NL6509472A/xx
Publication of NL152998B publication Critical patent/NL152998B/nl

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/533Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5334Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • G06F7/5336Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
    • G06F7/5338Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm each bitgroup having two new bits, e.g. 2nd order MBA
    • AHUMAN NECESSITIES
    • A63SPORTS; GAMES; AMUSEMENTS
    • A63HTOYS, e.g. TOPS, DOLLS, HOOPS OR BUILDING BLOCKS
    • A63H33/00Other toys
    • A63H33/008Playhouses, play-tents, big enough for playing inside
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/535Dividing only
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5352Non-restoring division not covered by G06F7/5375

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
  • Machine Translation (AREA)
  • Error Detection And Correction (AREA)
NL656509472A 1964-07-22 1965-07-21 Rekeninrichting. NL152998B (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US384362A US3293420A (en) 1964-07-22 1964-07-22 Computer with compatible multiplication and division

Publications (2)

Publication Number Publication Date
NL6509472A NL6509472A (nl) 1966-01-24
NL152998B true NL152998B (nl) 1977-04-15

Family

ID=23517035

Family Applications (1)

Application Number Title Priority Date Filing Date
NL656509472A NL152998B (nl) 1964-07-22 1965-07-21 Rekeninrichting.

Country Status (7)

Country Link
US (1) US3293420A (nl)
CH (1) CH432892A (nl)
DE (1) DE1259122B (nl)
ES (1) ES315571A1 (nl)
GB (1) GB1053686A (nl)
NL (1) NL152998B (nl)
SE (1) SE314234B (nl)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3504167A (en) * 1967-01-13 1970-03-31 Ibm Carry select divide decode
US3997771A (en) * 1975-05-05 1976-12-14 Honeywell Inc. Apparatus and method for performing an arithmetic operation and multibit shift
US4495593A (en) * 1982-07-01 1985-01-22 Hewlett-Packard Company Multiple bit encoding technique for combinational multipliers
JPS60140429A (ja) * 1983-12-28 1985-07-25 Hitachi Ltd 10進乗算装置
US4665500A (en) * 1984-04-11 1987-05-12 Texas Instruments Incorporated Multiply and divide unit for a high speed processor
GB2411974C (en) * 2003-12-09 2009-09-23 Advanced Risc Mach Ltd Data shift operations

Also Published As

Publication number Publication date
NL6509472A (nl) 1966-01-24
GB1053686A (nl)
SE314234B (nl) 1969-09-01
US3293420A (en) 1966-12-20
CH432892A (de) 1967-03-31
ES315571A1 (es) 1965-11-16
DE1259122B (de) 1968-01-18

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Legal Events

Date Code Title Description
V1 Lapsed because of non-payment of the annual fee
NL80 Information provided on patent owner name for an already discontinued patent

Owner name: I B M