NL145097B -
PROCEDURE FOR MANUFACTURING A SEMICONDUCTOR PLATE COMPOSED OF MULTIPLE SLICES OF SEMICONDUCTOR MATERIAL CONNECTED TO EACH OTHER PLANE BY AN INSULATING LAYER, AND SEMICONDUCTOR PLATE MANUFACTURED ACCORDING TO THE PROCEDURE.
- Google Patents
PROCEDURE FOR MANUFACTURING A SEMICONDUCTOR PLATE COMPOSED OF MULTIPLE SLICES OF SEMICONDUCTOR MATERIAL CONNECTED TO EACH OTHER PLANE BY AN INSULATING LAYER, AND SEMICONDUCTOR PLATE MANUFACTURED ACCORDING TO THE PROCEDURE.
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Priority claimed from US330690Aexternal-prioritypatent/US3290760A/en
Priority claimed from US354240Aexternal-prioritypatent/US3354354A/en
Application filed by Rca CorpfiledCriticalRca Corp
Publication of NL6414577ApublicationCriticalpatent/NL6414577A/xx
Publication of NL145097BpublicationCriticalpatent/NL145097B/en
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L23/00—Details of semiconductor or other solid state devices
H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/10—Details of semiconductor or other solid state devices to be connected
H01L2924/11—Device type
H01L2924/14—Integrated circuits
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Engineering & Computer Science
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Computer Hardware Design
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Microelectronics & Electronic Packaging
(AREA)
Power Engineering
(AREA)
Physics & Mathematics
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Condensed Matter Physics & Semiconductors
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General Physics & Mathematics
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Manufacturing & Machinery
(AREA)
Chemical & Material Sciences
(AREA)
Ceramic Engineering
(AREA)
Element Separation
(AREA)
NL646414577A1963-12-161964-12-15
PROCEDURE FOR MANUFACTURING A SEMICONDUCTOR PLATE COMPOSED OF MULTIPLE SLICES OF SEMICONDUCTOR MATERIAL CONNECTED TO EACH OTHER PLANE BY AN INSULATING LAYER, AND SEMICONDUCTOR PLATE MANUFACTURED ACCORDING TO THE PROCEDURE.
NL145097B
(en)
PROCEDURE FOR MANUFACTURING A SEMICONDUCTOR PLATE COMPOSED OF MULTIPLE SLICES OF SEMICONDUCTOR MATERIAL CONNECTED TO EACH OTHER PLANE BY AN INSULATING LAYER, AND SEMICONDUCTOR PLATE MANUFACTURED ACCORDING TO THE PROCEDURE.
Semiconductor device, comprising an epitaxial layer of semiconductor material grown on a semiconductor substrate, which is distributed in isolation of semi-conductive materials of low conductivity.
PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE PROVIDED WITH AN INSULATING GLASS LAYER AND SEMI-CONDUCTOR DEVICE MANUFACTURED ACCORDING TO THE PROCEDURE.
PROCEDURE FOR THE MANUFACTURE OF ARTICLES WITH TWO ELECTRICAL CONDUCTIVE LAYERS LOCATED AT A MINIMUM DISTANCE, AND ARTICLES, MANUFACTURED IN ACCORDANCE WITH THIS PROCESS.
SEMICONDUCTOR DEVICE CONTAINING A SEMICONDUCTOR BODY WITH TWO SEPARATED PARTS OF A SEMICONDUCTOR SWITCHING ELEMENT, WHICH ARE BORDERS TO A SURFACE OF THE SEMICONDUCTOR BODY, AND A SEMICONDUCTOR BODY WITH TWO SEPARATED PARTS OF A SEMICONDUCTOR SWITCHING ELEMENT, AND A SURFACE OF THE SEMICONDUCTOR BODY, AND AN INSULATING TEMPORARY LAYER OF THE OPERATING LAYER OF THE SEMI-CONDUCTOR.
PROCESS FOR MANUFACTURING A SEMICONDUCTOR DEVICE WITH AT LEAST ONE ELECTRICALLY INSULATED SEMICONDUCTOR AREA, AS WELL AS SEMI-CONDUCTOR DEVICE MANUFACTURED ACCORDING TO THIS PROCESS.
PROCEDURE FOR MANUFACTURE OF A PLANAR SEMICONDUCTOR DEVICE, PROVIDED WITH A LAYER ALREADY EXCLUSIVELY OF PALLADIUM, AND THE SEMI-CONDUCTOR DEVICE MANUFACTURED THEREFORE.
PROCESS FOR THE MANUFACTURE OF ELECTRICAL ACTIVE DEVICES WITH MONO-GRAIN LAYERS WITH ACTIVE GRAINS IN AN INSULATING FILLER, AS WELL AS ELECTRICAL EFFECTIVE DEVICE OBTAINED ACCORDING TO THIS PROCEDURE.
Semiconductor device having a layered region and an electrode layer separated by an insulating layer from the layered region, so that when the suitable electrode is applied to the electrodeposition layer, it is formed in a layered form.
PROCEDURE FOR MANUFACTURING A SEMICONDUCTOR PLATE COMPOSED OF MULTIPLE SLICES OF SEMICONDUCTOR MATERIAL CONNECTED TO EACH OTHER PLANE BY AN INSULATING LAYER, AND SEMICONDUCTOR PLATE MANUFACTURED ACCORDING TO THE PROCEDURE.
PROCEDURE FOR APPLYING A RECTANGULAR P, N-RETAINING LAYER IN A CRYSTALLINE SEMICONDUCTOR PLATE AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SEMI-CONDUCTOR PLATE MANUFACTURED ACCORDING TO THE PROCEDURE.