NL145096B - METHOD OF MANUFACTURING A SEMICONDUCTOR SYSTEM AND THE SEMICONDUCTOR SYSTEM OBTAINED WITH THIS METHOD. - Google Patents

METHOD OF MANUFACTURING A SEMICONDUCTOR SYSTEM AND THE SEMICONDUCTOR SYSTEM OBTAINED WITH THIS METHOD.

Info

Publication number
NL145096B
NL145096B NL6900980A NL6900980A NL145096B NL 145096 B NL145096 B NL 145096B NL 6900980 A NL6900980 A NL 6900980A NL 6900980 A NL6900980 A NL 6900980A NL 145096 B NL145096 B NL 145096B
Authority
NL
Netherlands
Prior art keywords
semiconductor system
manufacturing
system obtained
semiconductor
Prior art date
Application number
NL6900980A
Other languages
Dutch (nl)
Other versions
NL6900980A (en
Inventor
John Tudor Roberts
Original Assignee
Ferranti Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ferranti Ltd filed Critical Ferranti Ltd
Publication of NL6900980A publication Critical patent/NL6900980A/xx
Publication of NL145096B publication Critical patent/NL145096B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01068Erbium [Er]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Wire Bonding (AREA)
NL6900980A 1968-01-26 1969-01-21 METHOD OF MANUFACTURING A SEMICONDUCTOR SYSTEM AND THE SEMICONDUCTOR SYSTEM OBTAINED WITH THIS METHOD. NL145096B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB409068A GB1197272A (en) 1968-01-26 1968-01-26 Improvements relating to Semiconductor Circuit Assemblies

Publications (2)

Publication Number Publication Date
NL6900980A NL6900980A (en) 1969-07-29
NL145096B true NL145096B (en) 1975-02-17

Family

ID=9770554

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6900980A NL145096B (en) 1968-01-26 1969-01-21 METHOD OF MANUFACTURING A SEMICONDUCTOR SYSTEM AND THE SEMICONDUCTOR SYSTEM OBTAINED WITH THIS METHOD.

Country Status (3)

Country Link
DE (1) DE1903433A1 (en)
GB (1) GB1197272A (en)
NL (1) NL145096B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323035A (en) * 1992-10-13 1994-06-21 Glenn Leedy Interconnection structure for integrated circuits and method for making same
US5245750A (en) * 1992-02-28 1993-09-21 Hughes Aircraft Company Method of connecting a spaced ic chip to a conductor and the article thereby obtained

Also Published As

Publication number Publication date
GB1197272A (en) 1970-07-01
DE1903433A1 (en) 1969-08-28
NL6900980A (en) 1969-07-29

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