NL142825B - PROCESS FOR MANUFACTURE OF A SILICON SEMICONDUCTOR, AND SEMICONDUCTOR, OBTAINED ACCORDING TO THIS PROCESS. - Google Patents

PROCESS FOR MANUFACTURE OF A SILICON SEMICONDUCTOR, AND SEMICONDUCTOR, OBTAINED ACCORDING TO THIS PROCESS.

Info

Publication number
NL142825B
NL142825B NL7001170A NL7001170A NL142825B NL 142825 B NL142825 B NL 142825B NL 7001170 A NL7001170 A NL 7001170A NL 7001170 A NL7001170 A NL 7001170A NL 142825 B NL142825 B NL 142825B
Authority
NL
Netherlands
Prior art keywords
semiconductor
manufacture
obtained according
silicon semiconductor
silicon
Prior art date
Application number
NL7001170A
Other languages
Dutch (nl)
Other versions
NL7001170A (en
Original Assignee
Nippon Telegraph & Telephone
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph & Telephone filed Critical Nippon Telegraph & Telephone
Publication of NL7001170A publication Critical patent/NL7001170A/xx
Publication of NL142825B publication Critical patent/NL142825B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76245—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using full isolation by porous oxide silicon, i.e. FIPOS techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Local Oxidation Of Silicon (AREA)
NL7001170A 1969-01-29 1970-01-28 PROCESS FOR MANUFACTURE OF A SILICON SEMICONDUCTOR, AND SEMICONDUCTOR, OBTAINED ACCORDING TO THIS PROCESS. NL142825B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP597569A JPS4919030B1 (en) 1969-01-29 1969-01-29

Publications (2)

Publication Number Publication Date
NL7001170A NL7001170A (en) 1970-07-31
NL142825B true NL142825B (en) 1974-07-15

Family

ID=11625834

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7001170A NL142825B (en) 1969-01-29 1970-01-28 PROCESS FOR MANUFACTURE OF A SILICON SEMICONDUCTOR, AND SEMICONDUCTOR, OBTAINED ACCORDING TO THIS PROCESS.

Country Status (5)

Country Link
JP (1) JPS4919030B1 (en)
DE (1) DE2003952C3 (en)
FR (1) FR2029636B1 (en)
GB (1) GB1287221A (en)
NL (1) NL142825B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961353A (en) * 1974-10-21 1976-06-01 International Business Machines Corporation High power semiconductor device
US4016017A (en) * 1975-11-28 1977-04-05 International Business Machines Corporation Integrated circuit isolation structure and method for producing the isolation structure
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit
GB2038548B (en) * 1978-10-27 1983-03-23 Nippon Telegraph & Telephone Isolating semiconductor device by porous silicon oxide

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE671953A (en) * 1964-11-05

Also Published As

Publication number Publication date
DE2003952C3 (en) 1975-03-20
FR2029636A1 (en) 1970-10-23
NL7001170A (en) 1970-07-31
FR2029636B1 (en) 1973-10-19
GB1287221A (en) 1972-08-31
JPS4919030B1 (en) 1974-05-14
DE2003952B2 (en) 1974-08-01
DE2003952A1 (en) 1972-02-03

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Legal Events

Date Code Title Description
SNR Assignments of patents or rights arising from examined patent applications

Owner name: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

NL80 Abbreviated name of patent owner mentioned of already nullified patent

Owner name: NIPPON TELE

V4 Lapsed because of reaching the maxim lifetime of a patent