NL135201C - - Google Patents

Info

Publication number
NL135201C
NL135201C NL135201DA NL135201C NL 135201 C NL135201 C NL 135201C NL 135201D A NL135201D A NL 135201DA NL 135201 C NL135201 C NL 135201C
Authority
NL
Netherlands
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication of NL135201C publication Critical patent/NL135201C/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/5052Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination using carry completion detection, either over all stages or at sample stages only
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1608Error detection by comparing the output signals of redundant hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • Logic Circuits (AREA)
  • Complex Calculations (AREA)
NL135201D 1959-05-11 NL135201C (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US812504A US2998191A (en) 1959-05-11 1959-05-11 Asynchronous add-subtract system

Publications (1)

Publication Number Publication Date
NL135201C true NL135201C (pt)

Family

ID=25209776

Family Applications (2)

Application Number Title Priority Date Filing Date
NL250876D NL250876A (pt) 1959-05-11
NL135201D NL135201C (pt) 1959-05-11

Family Applications Before (1)

Application Number Title Priority Date Filing Date
NL250876D NL250876A (pt) 1959-05-11

Country Status (4)

Country Link
US (1) US2998191A (pt)
DE (1) DE1109422B (pt)
GB (1) GB875153A (pt)
NL (2) NL135201C (pt)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL246812A (pt) * 1958-12-29
US3233117A (en) * 1959-08-25 1966-02-01 Ibm High speed logical circuits employing a negative resistance device
BE639864A (pt) * 1962-11-14
US4994993A (en) * 1988-10-26 1991-02-19 Advanced Micro Devices, Inc. System for detecting and correcting errors generated by arithmetic logic units

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2861744A (en) * 1955-06-01 1958-11-25 Rca Corp Verification system

Also Published As

Publication number Publication date
US2998191A (en) 1961-08-29
DE1109422B (de) 1961-06-22
NL250876A (pt)
GB875153A (en) 1961-08-16

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