MY201868A - Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilization - Google Patents

Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilization

Info

Publication number
MY201868A
MY201868A MYPI2019006051A MYPI2019006051A MY201868A MY 201868 A MY201868 A MY 201868A MY PI2019006051 A MYPI2019006051 A MY PI2019006051A MY PI2019006051 A MYPI2019006051 A MY PI2019006051A MY 201868 A MY201868 A MY 201868A
Authority
MY
Malaysia
Prior art keywords
data
chunk
dnn
neural network
decompression
Prior art date
Application number
MYPI2019006051A
Inventor
Leon Corkery Joseph
Eliot Lundell Benjamin
Marvin Wall Larry
Balling Mcbride Chad
Ashok Ambardekar Amol
Petre George
D Cedola Kent
Bobrov Boris
Original Assignee
Microsoft Technology Licensing Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Technology Licensing Llc filed Critical Microsoft Technology Licensing Llc
Publication of MY201868A publication Critical patent/MY201868A/en

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Abstract

A deep neural network ("DNN") module can compress and decompress neuron-generated activation data to reduce the utilization of memory bus bandwidth. The compression unit (200) can receive an uncompressed chunk of data (202) generated by a neuron in the DNN module. The compression unit generates a mask portion (208) and a data portion (210) of a compressed output chunk. The mask portion encodes the presence and location of the zero and non-zero bytes in the uncompressed chunk of data. The data portion stores truncated non-zero bytes from the uncompressed chunk of data. A decompression unit (500) can receive a compressed chunk of data (204) from memory in the DNN processor or memory of an application host. The decompression unit decompresses the compressed chunk of data using the mask portion (208) and the data portion (210). This can reduce memory bus utilization, allow a DNN module to complete processing operations more quickly, and reduce power consumption. (Figure 4)
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Families Citing this family (116)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8515052B2 (en) 2007-12-17 2013-08-20 Wai Wu Parallel signal processing system and method
US10635969B2 (en) 2016-10-14 2020-04-28 International Business Machines Corporation Core utilization optimization by dividing computational blocks across cores
US10248906B2 (en) 2016-12-28 2019-04-02 Intel Corporation Neuromorphic circuits for storing and generating connectivity information
US10795836B2 (en) 2017-04-17 2020-10-06 Microsoft Technology Licensing, Llc Data processing performance enhancement for neural networks using a virtualized data iterator
US11164071B2 (en) * 2017-04-18 2021-11-02 Samsung Electronics Co., Ltd. Method and apparatus for reducing computational complexity of convolutional neural networks
WO2018214913A1 (en) * 2017-05-23 2018-11-29 上海寒武纪信息科技有限公司 Processing method and accelerating device
CN110502330A (en) * 2018-05-16 2019-11-26 上海寒武纪信息科技有限公司 Processor and processing method
US11514355B2 (en) * 2017-06-28 2022-11-29 General Electric Company Flat representation of machine learning model
JP7074777B2 (en) * 2017-11-20 2022-05-24 シャンハイ カンブリコン インフォメーション テクノロジー カンパニー リミテッド Tasks Parallel processing methods, appliances, systems, storage media and computer equipment
EP3489865B1 (en) * 2017-11-22 2021-01-06 Commissariat à l'énergie atomique et aux énergies alternatives A stdp-based learning method for a network having dual accumulator neurons
US10747844B2 (en) * 2017-12-12 2020-08-18 Tesla, Inc. Systems and methods for converting a matrix input to a vectorized input for a matrix processor
US10970080B2 (en) 2018-02-08 2021-04-06 Marvell Asia Pte, Ltd. Systems and methods for programmable hardware architecture for machine learning
US12112175B1 (en) 2018-02-08 2024-10-08 Marvell Asia Pte Ltd Method and apparatus for performing machine learning operations in parallel on machine learning hardware
US11995448B1 (en) * 2018-02-08 2024-05-28 Marvell Asia Pte Ltd Method and apparatus for performing machine learning operations in parallel on machine learning hardware
KR20190097930A (en) * 2018-02-13 2019-08-21 삼성전자주식회사 Memory device adjusting memory capacity for channel and Memory system having the same
US10948966B1 (en) * 2018-03-07 2021-03-16 Facebook, Inc. Systems and methods for optimizing power usage for systems within quality-of-service constraints
US11126362B2 (en) * 2018-03-14 2021-09-21 International Business Machines Corporation Migrating storage data
WO2019200545A1 (en) * 2018-04-17 2019-10-24 深圳鲲云信息科技有限公司 Method for operation of network model and related product
US10404276B1 (en) * 2018-04-27 2019-09-03 Nicira, Inc. Stable variable-length order-preserving encoding scheme
US20190340490A1 (en) * 2018-05-04 2019-11-07 Apple Inc. Systems and methods for assigning tasks in a neural network processor
US10997510B1 (en) 2018-05-22 2021-05-04 Marvell Asia Pte, Ltd. Architecture to support tanh and sigmoid operations for inference acceleration in machine learning
US11016801B1 (en) 2018-05-22 2021-05-25 Marvell Asia Pte, Ltd. Architecture to support color scheme-based synchronization for machine learning
US10360654B1 (en) * 2018-05-25 2019-07-23 Intel Corporation Software scoreboard information and synchronization
US10657087B2 (en) * 2018-05-31 2020-05-19 Toshiba Memory Corporation Method of out of order processing of scatter gather lists
US11561833B1 (en) * 2018-06-28 2023-01-24 Amazon Technologies, Inc. Allocation and placement of resources for network computation
CN112585589A (en) * 2018-08-09 2021-03-30 华为技术有限公司 Apparatus and method for compacting compressed data blocks and uncompressed data blocks
US12020146B2 (en) 2018-08-23 2024-06-25 Samsung Electronics Co., Ltd. Electronic device and operating method thereof of processing neural network model by using plurality of processors
EP3640810A4 (en) * 2018-08-28 2021-05-05 Cambricon Technologies Corporation Limited Data preprocessing method and apparatus, computer device, and storage medium
KR20200034499A (en) * 2018-09-21 2020-03-31 삼성전자주식회사 Data processing device and method of communicating with memory device
US11295205B2 (en) * 2018-09-28 2022-04-05 Qualcomm Incorporated Neural processing unit (NPU) direct memory access (NDMA) memory bandwidth optimization
CN109359732B (en) * 2018-09-30 2020-06-09 阿里巴巴集团控股有限公司 Chip and data processing method based on chip
CN112840356B (en) * 2018-10-09 2023-04-11 华为技术有限公司 Operation accelerator, processing method and related equipment
US20200117981A1 (en) * 2018-10-11 2020-04-16 International Business Machines Corporation Data representation for dynamic precision in neural network cores
KR20200053886A (en) 2018-11-09 2020-05-19 삼성전자주식회사 Neural processing unit, neural processing system, and application system
CN109669774B (en) * 2018-11-14 2020-12-08 新华三技术有限公司成都分公司 Hardware resource quantification method, hardware resource arrangement method, hardware resource quantification device and hardware resource arrangement device and network equipment
US11663001B2 (en) * 2018-11-19 2023-05-30 Advanced Micro Devices, Inc. Family of lossy sparse load SIMD instructions
KR102107077B1 (en) * 2018-11-20 2020-05-06 주식회사 아나패스 Line-based memory management method for performing convolution operation in convolutional neural network inference and its inference device
US10990525B2 (en) * 2018-12-12 2021-04-27 Mipsology SAS Caching data in artificial neural network computations
US11342933B2 (en) * 2018-12-14 2022-05-24 Advanced Micro Devices, Inc. Lossy significance compression with lossy restoration
CN109657788A (en) * 2018-12-18 2019-04-19 北京中科寒武纪科技有限公司 Data processing method, device and Related product
CN109740735B (en) * 2018-12-29 2020-12-29 百度在线网络技术(北京)有限公司 Multi-neural-network output method and device, server and computer readable medium
CN109922007B (en) * 2019-01-15 2022-04-01 西安仙农电子科技有限公司 Load balancing method based on convolutional neural network
CN111488114B (en) * 2019-01-28 2021-12-21 北京灵汐科技有限公司 Reconfigurable processor architecture and computing device
US11625554B2 (en) 2019-02-04 2023-04-11 International Business Machines Corporation L2-nonexpansive neural networks
US11687783B2 (en) * 2019-02-04 2023-06-27 International Business Machines Corporation L2-nonexpansive neural networks
US11521014B2 (en) 2019-02-04 2022-12-06 International Business Machines Corporation L2-nonexpansive neural networks
US11036545B2 (en) * 2019-03-15 2021-06-15 Intel Corporation Graphics systems and methods for accelerating synchronization using fine grain dependency check and scheduling optimizations based on available shared memory space
CN111767078B (en) * 2019-04-02 2024-08-06 上海寒武纪信息科技有限公司 Data operation method, device and related product
CN111782577B (en) * 2019-04-04 2023-03-24 安徽寒武纪信息科技有限公司 Data processing device and method and related product
CN109992225B (en) * 2019-04-04 2022-02-22 中科寒武纪科技股份有限公司 Data output method and related device
KR20200119164A (en) * 2019-04-09 2020-10-19 한국전자통신연구원 Information processing apparatus and operation method of neural network processing device therein
KR20200129957A (en) * 2019-05-10 2020-11-18 삼성전자주식회사 Neural network processor compressing featuremap data and computing system comprising the same
US10504005B1 (en) * 2019-05-10 2019-12-10 Capital One Services, Llc Techniques to embed a data object into a multidimensional frame
US11204745B2 (en) * 2019-05-23 2021-12-21 Xilinx, Inc. Dataflow graph programming environment for a heterogenous processing system
US11175898B2 (en) * 2019-05-31 2021-11-16 Apple Inc. Compiling code for a machine learning model for execution on a specialized processor
KR20200139909A (en) 2019-06-05 2020-12-15 삼성전자주식회사 Electronic apparatus and method of performing operations thereof
CN114008636A (en) * 2019-06-18 2022-02-01 高通股份有限公司 Optimizing machine learning model performance
US11403097B2 (en) * 2019-06-26 2022-08-02 Intel Corporation Systems and methods to skip inconsequential matrix operations
US11461622B2 (en) * 2019-06-28 2022-10-04 Amazon Technologies, Inc. Dynamic code loading for multiple executions on a sequential processor
US11630770B2 (en) * 2019-07-11 2023-04-18 Meta Platforms Technologies, Llc Systems and methods for reading and writing sparse data in a neural network accelerator
US20210081806A1 (en) * 2019-09-13 2021-03-18 Latent AI, Inc. Using a runtime engine to facilitate dynamic adaptation of deep neural networks for efficient processing
US10915811B1 (en) 2019-09-18 2021-02-09 International Business Machines Corporation Intercalation cells for multi-task learning
US11475283B2 (en) * 2019-10-24 2022-10-18 Apple Inc. Multi dimensional convolution in neural network processor
KR20210053384A (en) 2019-11-01 2021-05-12 삼성전자주식회사 Storage device and operating method of storage device
US11513799B2 (en) 2019-11-04 2022-11-29 Apple Inc. Chained buffers in neural network processor
KR20210065605A (en) * 2019-11-27 2021-06-04 한국전자통신연구원 Method and apparatus for controlling memory using prefetch information
CN111091184B (en) * 2019-12-19 2022-03-22 浪潮(北京)电子信息产业有限公司 Deep neural network quantification method and device, electronic equipment and medium
CN111162792A (en) * 2019-12-19 2020-05-15 深圳市航天泰瑞捷电子有限公司 Compression method and device for power load data
US11620516B2 (en) * 2019-12-23 2023-04-04 Arm Limited Specializing neural networks for heterogeneous systems
CN111178490B (en) * 2019-12-31 2021-08-24 北京百度网讯科技有限公司 Data output method, data acquisition method, data output device, data acquisition device and electronic equipment
CN111126589B (en) * 2019-12-31 2022-05-20 昆仑芯(北京)科技有限公司 Neural network data processing device and method and electronic equipment
KR102399197B1 (en) 2020-01-17 2022-05-18 경희대학교 산학협력단 Electronic device performing outlier-aware approximation coding and method thereof
US11023400B1 (en) 2020-01-20 2021-06-01 International Business Machines Corporation High performance DMA transfers in host bus adapters
US12072806B2 (en) * 2020-01-22 2024-08-27 Alibaba Group Holding Limited Compression and decompression module in a cache controller for reducing off-chip data traffic
KR102498066B1 (en) * 2020-02-20 2023-02-10 한국과학기술원 Deep Reinforcement Learning Accelerator
KR20210108749A (en) 2020-02-26 2021-09-03 삼성전자주식회사 Accelerator, method for operating the same and accelerator system including the same
CN111431539B (en) * 2020-03-04 2023-12-08 嘉楠明芯(北京)科技有限公司 Compression method and device for neural network data and computer readable storage medium
CN111290979B (en) * 2020-03-23 2021-08-17 优刻得科技股份有限公司 Data transmission method, device and system
CN111522643B (en) * 2020-04-22 2024-06-25 杭州迪普科技股份有限公司 Multi-queue scheduling method and device based on FPGA, computer equipment and storage medium
CN113592082A (en) * 2020-04-30 2021-11-02 意法半导体股份有限公司 Apparatus and method for distributing intermediate data from artificial neural network
KR20210136476A (en) * 2020-05-07 2021-11-17 삼성전자주식회사 Compressing device and method using parameters of a quad-tree method
US12015526B2 (en) * 2020-05-26 2024-06-18 Synopsys, Inc. Mixed-precision neural networks
GB202008299D0 (en) * 2020-06-02 2020-07-15 Imagination Tech Ltd Manipulation of data in a memory
WO2021254856A1 (en) * 2020-06-18 2021-12-23 Interdigital Vc Holdings France, Sas Systems and methods for encoding/decoding a deep neural network
CN111723053A (en) * 2020-06-24 2020-09-29 北京航天数据股份有限公司 Data compression method and device and data decompression method and device
US11275701B2 (en) * 2020-06-24 2022-03-15 Qualcomm Incorporated Secure timer synchronization between function block and external SOC
US20220004399A1 (en) * 2020-07-03 2022-01-06 Mediatek Inc. Dynamic loading neural network inference at dram/on-bus sram/serial flash for power optimization
CN111884658A (en) * 2020-07-09 2020-11-03 上海兆芯集成电路有限公司 Data decompression method, data compression method and convolution operation device
US11720404B2 (en) * 2020-07-16 2023-08-08 Samsung Electronics Co., Ltd. Systems and methods for arbitrating access to a shared resource
KR20230038509A (en) * 2020-07-17 2023-03-20 소니그룹주식회사 Neural network processing device, information processing device, information processing system, electronic device, neural network processing method and program
CN111858058A (en) * 2020-07-24 2020-10-30 成都成信高科信息技术有限公司 SGD load balancing method and device based on parallel computing and storage medium
FR3113158B1 (en) * 2020-08-03 2024-04-05 Commissariat Energie Atomique Systolic calculation architecture for the implementation of artificial neural networks processing several types of convolutions
JP6835285B1 (en) * 2020-09-15 2021-02-24 富士電機株式会社 Data compression method, data compression device, data compression program, data decompression method, data decompression device and data decompression program
US11470004B2 (en) 2020-09-22 2022-10-11 Advanced Micro Devices, Inc. Graded throttling for network-on-chip traffic
US12113712B2 (en) 2020-09-25 2024-10-08 Advanced Micro Devices, Inc. Dynamic network-on-chip throttling
JP2022094508A (en) 2020-12-15 2022-06-27 富士通株式会社 Arithmetic processing apparatus, arithmetic processing method, and arithmetic processing program
TWI745227B (en) * 2021-02-01 2021-11-01 國立陽明交通大學 Communication system and communication method for performing third party authentication between home service and foreign service
KR102298766B1 (en) * 2021-02-15 2021-09-07 주식회사 딥이티 Apparatus and method for converting deep learning model for target device
US20220383121A1 (en) * 2021-05-25 2022-12-01 Applied Materials, Inc. Dynamic activation sparsity in neural networks
US11256987B1 (en) * 2021-06-02 2022-02-22 SambaNova Systems, Inc. Memory efficient dropout, with reordering of dropout mask elements
JP2023018365A (en) 2021-07-27 2023-02-08 富士通株式会社 Information processing program, information processing method, and information processing device
US20230053575A1 (en) * 2021-08-18 2023-02-23 Cisco Technology, Inc. Partitioning and placement of models
US20230079975A1 (en) * 2021-09-10 2023-03-16 Arm Limited Power management for system-on-chip
US12112200B2 (en) 2021-09-13 2024-10-08 International Business Machines Corporation Pipeline parallel computing using extended memory
EP4429240A1 (en) * 2021-11-01 2024-09-11 LG Electronics Inc. Feature encoding/decoding method and apparatus, and recording medium storing bitstream
KR102700292B1 (en) * 2021-11-26 2024-08-29 건국대학교 산학협력단 Processor device dynamically reconfiguring communication characteristics of neural network accelerator, method for operating the same
EP4191476A1 (en) * 2021-12-01 2023-06-07 Nokia Technologies Oy Machine learning accelerator
US11816364B2 (en) * 2022-01-13 2023-11-14 Microsoft Technology Licensing, Llc Performance evaluation of an application based on detecting degradation caused by other computing processes
CN114466082B (en) * 2022-01-29 2024-01-09 上海阵量智能科技有限公司 Data compression and data decompression method and system and artificial intelligent AI chip
US11720252B1 (en) * 2022-03-04 2023-08-08 Microsoft Technology Licensing, Llc Method and apparatus for compressing and decompressing sparse data sets
US20230350678A1 (en) * 2022-04-28 2023-11-02 Qualcomm Incorporated Instruction Set Architecture for Neural Network Quantization and Packing
WO2023250093A1 (en) * 2022-06-22 2023-12-28 Brainchip, Inc. Method and system for implementing temporal convolution in spatiotemporal neural networks
KR20240002346A (en) * 2022-06-29 2024-01-05 삼성전자주식회사 Electronic apparatus for processing image using AI encoding/decoding and cotrol method thereof
KR20240007495A (en) * 2022-07-08 2024-01-16 리벨리온 주식회사 Neural core, Neural processing device including same and Method for loading data of neural processing device
CN115309349B (en) * 2022-10-12 2023-01-20 深圳鲲云信息科技有限公司 Deep learning sparse data storage method, computer device and storage medium
US11983128B1 (en) * 2022-12-16 2024-05-14 Amazon Technologies, Inc. Multidimensional and multiblock tensorized direct memory access descriptors

Family Cites Families (194)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4298954A (en) 1979-04-30 1981-11-03 International Business Machines Corporation Alternating data buffers when one buffer is empty and another buffer is variably full of data
JPH0642237B2 (en) 1983-12-28 1994-06-01 株式会社日立製作所 Parallel processor
EP0340901A3 (en) * 1988-03-23 1992-12-30 Du Pont Pixel Systems Limited Access system for dual port memory
US5056015A (en) * 1988-03-23 1991-10-08 Du Pont Pixel Systems Limited Architectures for serial or parallel loading of writable control store
EP0334624A3 (en) * 1988-03-23 1993-03-31 Du Pont Pixel Systems Limited Microcoded computer system
JP2703010B2 (en) 1988-12-23 1998-01-26 株式会社日立製作所 Neural net signal processing processor
US5369773A (en) 1991-04-26 1994-11-29 Adaptive Solutions, Inc. Neural network using virtual-zero
US5357597A (en) * 1991-06-24 1994-10-18 International Business Machines Corporation Convolutional expert neural system (ConExNS)
US5487153A (en) 1991-08-30 1996-01-23 Adaptive Solutions, Inc. Neural network sequencer and interface apparatus
WO1993014459A1 (en) 1992-01-17 1993-07-22 Caelum Research Corporation Modular parallel processing system
JPH06195322A (en) 1992-10-29 1994-07-15 Hitachi Ltd Information processor used as general purpose neurocomputer
JP2938711B2 (en) 1993-05-10 1999-08-25 松下電器産業株式会社 Parallel computer
US5859990A (en) 1995-12-29 1999-01-12 Intel Corporation System for transferring data segments from a first storage device to a second storage device using an alignment stage including even and odd temporary devices
US5933654A (en) 1996-09-24 1999-08-03 Allen-Bradley Company, Llc Dynamic buffer fracturing by a DMA controller
US6006325A (en) * 1996-12-19 1999-12-21 Institute For The Development Of Emerging Architectures, L.L.C. Method and apparatus for instruction and data serialization in a computer processor
US6547364B2 (en) * 1997-07-12 2003-04-15 Silverbrook Research Pty Ltd Printing cartridge with an integrated circuit device
KR100258355B1 (en) * 1997-12-26 2000-06-01 김영환 8-bit parallel cell unit interleaver
US6307867B1 (en) 1998-05-14 2001-10-23 Telefonaktiebolaget Lm Ericsson (Publ) Data transmission over a communications link with variable transmission rates
US6654761B2 (en) * 1998-07-29 2003-11-25 Inxight Software, Inc. Controlling which part of data defining a node-link structure is in memory
JP2000059227A (en) 1998-08-07 2000-02-25 Matsushita Electric Ind Co Ltd Encoding and decoding device and its method
JP2000261416A (en) * 1999-03-09 2000-09-22 Nec Eng Ltd Duplex data transfer circuit
US6785239B1 (en) 1999-06-01 2004-08-31 Cisco Technology, Inc. Reducing delays in a communication network using a re-fragmentation pipeline
JP2001188767A (en) 1999-12-28 2001-07-10 Fuji Xerox Co Ltd Neutral network arithmetic unit and method
US6424737B1 (en) 2000-01-24 2002-07-23 Sony Corporation Method and apparatus of compressing images using localized radon transforms
US6988154B2 (en) * 2000-03-10 2006-01-17 Arc International Memory interface and method of interfacing between functional entities
GB2382898B (en) 2000-12-29 2005-06-29 Zarlink Semiconductor Ltd A method of managing data
JP2002259939A (en) * 2001-03-05 2002-09-13 Kitakiyuushiyuu Techno Center:Kk Associative memory base computer
US6990079B2 (en) 2001-06-08 2006-01-24 International Business Machines Corporation Optimizing fragment sizes in frame relay networks
US7012893B2 (en) 2001-06-12 2006-03-14 Smartpackets, Inc. Adaptive control of data packet size in networks
US7106968B2 (en) 2001-07-06 2006-09-12 Optix Networks Inc. Combined SONET/SDH and OTN architecture
US6954744B2 (en) * 2001-08-29 2005-10-11 Honeywell International, Inc. Combinatorial approach for supervised neural network learning
US6836767B2 (en) 2001-10-03 2004-12-28 International Business Machines Corporation Pipelined hardware implementation of a neural network circuit
US6961719B1 (en) * 2002-01-07 2005-11-01 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Hybrid neural network and support vector machine method for optimization
US7245627B2 (en) 2002-04-23 2007-07-17 Mellanox Technologies Ltd. Sharing a network interface card among multiple hosts
US7539608B1 (en) 2002-05-10 2009-05-26 Oracle International Corporation Techniques for determining effects on system performance of a memory management parameter
US7020207B1 (en) * 2002-12-02 2006-03-28 Hitachi, Ltd. Video error concealment mechanism for block based video decompression
US7444637B2 (en) 2003-02-18 2008-10-28 Microsoft Corporation Systems and methods for scheduling coprocessor resources in a computing system
US7137021B2 (en) * 2003-05-15 2006-11-14 International Business Machines Corporation Power saving in FPU with gated power based on opcodes and data
GB0313986D0 (en) * 2003-06-17 2003-07-23 Zarlink Semiconductor Inc Data memory extension for use in double buffered TDM switches
US7774508B2 (en) 2003-12-09 2010-08-10 Panasonic Corporation Electronic apparatus, control method thereof, host device, and control method thereof
US20050125797A1 (en) * 2003-12-09 2005-06-09 International Business Machines Corporation Resource management for a system-on-chip (SoC)
US7480640B1 (en) * 2003-12-16 2009-01-20 Quantum Leap Research, Inc. Automated method and system for generating models from data
US7376853B2 (en) 2004-03-15 2008-05-20 Canon Kabushiki Kaisha Network apparatus, method for controlling the same, and program for the same
US7284075B2 (en) 2004-03-23 2007-10-16 Intel Corporation Inbound packet placement in host memory
US7644239B2 (en) * 2004-05-03 2010-01-05 Microsoft Corporation Non-volatile memory cache performance improvement
US9143393B1 (en) * 2004-05-25 2015-09-22 Red Lambda, Inc. System, method and apparatus for classifying digital data
US20050289253A1 (en) * 2004-06-24 2005-12-29 Edirisooriya Samantha J Apparatus and method for a multi-function direct memory access core
US7363397B2 (en) 2004-08-26 2008-04-22 International Business Machines Corporation System and method for DMA controller with multi-dimensional line-walking functionality
US20060050693A1 (en) * 2004-09-03 2006-03-09 James Bury Building data packets for an advanced switching fabric
US20060100997A1 (en) * 2004-10-27 2006-05-11 Wall Gary C Data caching
US8190796B2 (en) * 2004-11-02 2012-05-29 Standard Microsystems Corporation Hardware supported peripheral component memory alignment method
CN1790918A (en) 2004-12-17 2006-06-21 中国科学院半导体研究所 Lossless data compression method based on virtual information source and neural network
US20060143401A1 (en) * 2004-12-27 2006-06-29 Jacob Doweck Method and apparatus for prefetching based on cache fill buffer hits
EP1701249A1 (en) * 2005-03-11 2006-09-13 Interuniversitair Microelektronica Centrum Vzw Ultra low power ASIP (Application-Domain specific Instruction-set Processor) microcomputer
US7793040B2 (en) * 2005-06-01 2010-09-07 Microsoft Corporation Content addressable memory architecture
US7747070B2 (en) * 2005-08-31 2010-06-29 Microsoft Corporation Training convolutional neural networks on graphics processing units
CN101401100B (en) * 2006-03-14 2012-10-10 国际商业机器公司 Data mining by determining patterns in input data
CN101411134B (en) * 2006-03-31 2013-08-21 高通股份有限公司 Memory management for high speed media access control
US9542642B2 (en) 2006-04-06 2017-01-10 Samuel F. Wood Packet data neural network system and method
US7764710B1 (en) * 2006-04-25 2010-07-27 Altera Corporation Method and apparatus for processing communication protocol frame input
US7620784B2 (en) * 2006-06-09 2009-11-17 Microsoft Corporation High speed nonvolatile memory device using parallel writing among a plurality of interfaces
US8718065B2 (en) 2006-08-15 2014-05-06 Broadcom Corporation Transmission using multiple physical interface
US7496707B2 (en) 2006-08-22 2009-02-24 International Business Machines Corporation Dynamically scalable queues for performance driven PCI express memory traffic
US20080091868A1 (en) * 2006-10-17 2008-04-17 Shay Mizrachi Method and System for Delayed Completion Coalescing
US8249171B2 (en) 2006-11-10 2012-08-21 Texas Instruments Incorporated MPEG-2 transport stream packet synchronizer
US20080168013A1 (en) * 2006-12-05 2008-07-10 Paul Cadaret Scalable pattern recognition system
CN101715575A (en) * 2006-12-06 2010-05-26 弗森多系统公司(dba弗森-艾奥) Adopt device, the system and method for data pipe management data
WO2008067676A1 (en) 2006-12-08 2008-06-12 Medhat Moussa Architecture, system and method for artificial neural network implementation
CN101221541B (en) * 2007-01-09 2011-04-20 张立军 Programmable communication controller for SOC and its programming model
US7620749B2 (en) * 2007-01-10 2009-11-17 International Business Machines Corporation Descriptor prefetch mechanism for high latency and out of order DMA device
US8190834B2 (en) 2007-06-15 2012-05-29 Emc Corporation Process for contiguously streaming data from a content addressed storage system
JP5184824B2 (en) * 2007-06-15 2013-04-17 キヤノン株式会社 Arithmetic processing apparatus and method
US7822951B2 (en) 2007-08-01 2010-10-26 Advanced Micro Devices, Inc. System and method of load-store forwarding
US8200992B2 (en) * 2007-09-24 2012-06-12 Cognitive Electronics, Inc. Parallel processing computer systems with reduced power consumption and methods for providing the same
CN101183873B (en) 2007-12-11 2011-09-28 广州中珩电子科技有限公司 BP neural network based embedded system data compression/decompression method
US8244953B1 (en) 2007-12-18 2012-08-14 Emc Corporation System and method for faster data retrieval from tape media
US8244721B2 (en) * 2008-02-13 2012-08-14 Microsoft Corporation Using related users data to enhance web search
US7730244B1 (en) * 2008-03-27 2010-06-01 Xilinx, Inc. Translation of commands in an interconnection of an embedded processor block core in an integrated circuit
US8201166B2 (en) * 2008-04-30 2012-06-12 Hewlett-Packard Development Company, L.P. Virtualization platform configured with virtual connect control
GB0811057D0 (en) 2008-06-17 2008-07-23 Univ Ulster Artificial neural network architecture
US8566515B2 (en) * 2009-01-12 2013-10-22 Maxim Integrated Products, Inc. Memory subsystem
US20100180100A1 (en) 2009-01-13 2010-07-15 Mavrix Technology, Inc. Matrix microprocessor and method of operation
US8392687B2 (en) * 2009-01-21 2013-03-05 Micron Technology, Inc. Solid state memory formatting
JP5458629B2 (en) * 2009-03-31 2014-04-02 ブラザー工業株式会社 NODE DEVICE, NODE PROCESSING PROGRAM, AND SEARCH METHOD
US20100257174A1 (en) 2009-04-02 2010-10-07 Matthew Dino Minuti Method for data compression utilizing pattern-analysis and matching means such as neural networks
US20100281192A1 (en) 2009-04-30 2010-11-04 Novafora, Inc. Apparatus and method for transferring data within a data processing system
EP2259214B1 (en) 2009-06-04 2013-02-27 Honda Research Institute Europe GmbH Implementing a neural associative memory based on non-linear learning of discrete synapses
CN102460376B (en) * 2009-06-26 2016-05-18 英特尔公司 The optimization of Unbounded transactional memory (UTM) system
US8442927B2 (en) 2009-07-30 2013-05-14 Nec Laboratories America, Inc. Dynamically configurable, multi-ported co-processor for convolutional neural networks
US8316194B2 (en) * 2009-12-15 2012-11-20 Intel Corporation Mechanisms to accelerate transactions using buffered stores
US20110153877A1 (en) * 2009-12-23 2011-06-23 King Steven R Method and apparatus to exchange data via an intermediary translation and queue manager
CN102971997B (en) * 2010-01-18 2016-11-09 马维尔国际有限公司 The packet buffer of segmentation is described including data sectional and data
US8713260B2 (en) 2010-04-02 2014-04-29 Intel Corporation Adaptive block pre-fetching method and system
US8549506B2 (en) * 2010-04-27 2013-10-01 Microsoft Corporation Resumable methods
US8965819B2 (en) * 2010-08-16 2015-02-24 Oracle International Corporation System and method for effective caching using neural networks
US8701099B2 (en) * 2010-11-02 2014-04-15 International Business Machines Corporation Accelerating generic loop iterators using speculative execution
US9300321B2 (en) * 2010-11-05 2016-03-29 University of Maribor Light detection and ranging (LiDAR)data compression and decompression methods and apparatus
US8515882B2 (en) 2010-11-18 2013-08-20 International Business Machines Corporation Efficient storage of individuals for optimization simulation
CN102480337B (en) 2010-11-30 2016-04-13 国际商业机器公司 Radio software system and for its decoding device and method
US8966413B2 (en) * 2011-02-17 2015-02-24 The Board Of Trustees Of The Leland Stanford Junior University System and method for a chip generator
US8892488B2 (en) * 2011-06-01 2014-11-18 Nec Laboratories America, Inc. Document classification with weighted supervised n-gram embedding
US9288251B2 (en) * 2011-06-10 2016-03-15 Citrix Systems, Inc. Adaptive bitrate management on progressive download with indexed media files
CN102332162A (en) 2011-09-19 2012-01-25 西安百利信息科技有限公司 Method for automatic recognition and stage compression of medical image regions of interest based on artificial neural network
US9015092B2 (en) * 2012-06-04 2015-04-21 Brain Corporation Dynamically reconfigurable stochastic learning apparatus and methods
US9326075B2 (en) 2011-10-07 2016-04-26 Cochlear Limited Flexible protocol for an implanted prosthesis
US9235799B2 (en) * 2011-11-26 2016-01-12 Microsoft Technology Licensing, Llc Discriminative pretraining of deep neural networks
CN102523452B (en) 2011-12-29 2014-12-17 西安空间无线电技术研究所 Method for conversion, compression and transmission of images
CN102609222B (en) * 2012-02-13 2015-03-25 山东华芯半导体有限公司 Flash memory control method based on command descriptors
US9128925B2 (en) * 2012-04-24 2015-09-08 Freescale Semiconductor, Inc. System and method for direct memory access buffer utilization by setting DMA controller with plurality of arbitration weights associated with different DMA engines
KR101619686B1 (en) * 2012-04-25 2016-05-10 엠파이어 테크놀로지 디벨롭먼트 엘엘씨 Workload prediction for network-based computing
US9703500B2 (en) * 2012-04-25 2017-07-11 International Business Machines Corporation Reducing power consumption by migration of data within a tiered storage system
US9015096B2 (en) * 2012-05-30 2015-04-21 Qualcomm Incorporated Continuous time spiking neural network event-based simulation that schedules co-pending events using an indexable list of nodes
US9432489B2 (en) * 2012-06-05 2016-08-30 Intel Corporation Systems and methods for processing encoded data streams
US9159020B2 (en) * 2012-09-14 2015-10-13 International Business Machines Corporation Multiplexing physical neurons to optimize power and area
US20160013773A1 (en) * 2012-11-06 2016-01-14 Pavel Dourbal Method and apparatus for fast digital filtering and signal processing
WO2014085975A1 (en) * 2012-12-04 2014-06-12 中国科学院半导体研究所 Dynamically reconfigurable multistage parallel single-instruction multi-data array processing system
DE112012007063B4 (en) 2012-12-26 2022-12-15 Intel Corp. Merge adjacent collect/scatter operations
WO2014116712A1 (en) * 2013-01-22 2014-07-31 Samplify Systems, Inc. Data compression and decompression using simd instructions
US10909137B2 (en) 2014-10-06 2021-02-02 Fisher-Rosemount Systems, Inc. Streaming data for analytics in process control systems
CN104050200B (en) 2013-03-15 2017-12-08 伊姆西公司 Method and apparatus for data copy
US9760346B2 (en) * 2013-05-31 2017-09-12 Microsoft Technology Licensing, Llc Deeply parallel source code compilation
WO2014204331A1 (en) 2013-06-17 2014-12-24 Llc "Topcon Positioning Systems" Nand flash memory interface controller with gnss receiver firmware booting capability
EP3047390A1 (en) * 2013-09-19 2016-07-27 Sysomos L.P. Systems and methods for actively composing content for use in continuous social communication
US9280465B2 (en) * 2013-10-08 2016-03-08 Globalfoundries Inc. Techniques for moving checkpoint-based high-availability log and data directly from a producer cache to a consumer cache
US20150286873A1 (en) * 2014-04-03 2015-10-08 Bruce L. Davis Smartphone-based methods and systems
US9286171B2 (en) * 2013-12-12 2016-03-15 International Business Machines Corporation Priming failover of stateful offload adapters
US20160350250A1 (en) * 2013-12-23 2016-12-01 Intel Corporation Input output data alignment
GB2521828A (en) 2013-12-23 2015-07-08 Sony Corp Data encoding and decoding
US9851771B2 (en) 2013-12-28 2017-12-26 Intel Corporation Dynamic power measurement and estimation to improve memory subsystem power performance
US10097372B2 (en) * 2014-01-09 2018-10-09 Ciena Corporation Method for resource optimized network virtualization overlay transport in virtualized data center environments
EP2896428B1 (en) * 2014-01-16 2016-11-09 Sorin CRM SAS Neural network assembly for evaluating and adapting an anti-tachycardia therapy by an implantable defibrillator
US20150206050A1 (en) * 2014-01-23 2015-07-23 Qualcomm Incorporated Configuring neural network for low spiking rate
US9563369B2 (en) * 2014-04-14 2017-02-07 Microsoft Technology Licensing, Llc Fine-grained bandwidth provisioning in a memory controller
KR101925905B1 (en) * 2014-04-15 2019-01-28 인텔 코포레이션 Methods, systems and computer program products for neuromorphic graph compression using associative memories
US9219499B2 (en) 2014-05-16 2015-12-22 Robert Bosch Gmbh Run time compression method for a vehicle communication bus
US9892125B1 (en) * 2014-05-23 2018-02-13 MapD Technologies, Inc. Method for logging update queries
US9959142B2 (en) 2014-06-17 2018-05-01 Mediatek Inc. Dynamic task scheduling method for dispatching sub-tasks to computing devices of heterogeneous computing system and related computer readable medium
EP3192012A4 (en) * 2014-09-12 2018-01-17 Microsoft Technology Licensing, LLC Learning student dnn via output distribution
US9990307B1 (en) 2014-10-29 2018-06-05 Netronome Systems, Inc. Split packet transmission DMA engine
EP3035249B1 (en) 2014-12-19 2019-11-27 Intel Corporation Method and apparatus for distributed and cooperative computation in artificial neural networks
EP3035204B1 (en) * 2014-12-19 2018-08-15 Intel Corporation Storage device and method for performing convolution operations
US10223635B2 (en) 2015-01-22 2019-03-05 Qualcomm Incorporated Model compression and fine-tuning
CN104573064B (en) * 2015-01-23 2017-12-08 四川中科腾信科技有限公司 A kind of data processing method under big data environment
US10234930B2 (en) * 2015-02-13 2019-03-19 Intel Corporation Performing power management in a multicore processor
US20160267377A1 (en) * 2015-03-12 2016-09-15 Staples, Inc. Review Sentiment Analysis
US10262190B2 (en) * 2015-03-26 2019-04-16 Beijing Kuangshi Technology Co., Ltd. Method, system, and computer program product for recognizing face
US9378044B1 (en) * 2015-03-28 2016-06-28 Vmware, Inc. Method and system that anticipates deleterious virtual-machine state changes within a virtualization layer
US9928144B2 (en) * 2015-03-30 2018-03-27 Commvault Systems, Inc. Storage management of data using an open-archive architecture, including streamlined access to primary data originally stored on network-attached storage and archived to secondary storage
FR3035243B1 (en) * 2015-04-20 2018-06-29 Commissariat A L'energie Atomique Et Aux Energies Alternatives PLACING A CALCULATION TASK ON A FUNCTIONALLY ASYMMETRIC PROCESSOR
US9965824B2 (en) * 2015-04-23 2018-05-08 Google Llc Architecture for high performance, power efficient, programmable image processing
US20160328644A1 (en) 2015-05-08 2016-11-10 Qualcomm Incorporated Adaptive selection of artificial neural networks
US20160335119A1 (en) 2015-05-12 2016-11-17 minds.ai inc Batch-based neural network system
US10083395B2 (en) * 2015-05-21 2018-09-25 Google Llc Batch processing in a neural network processor
US9595002B2 (en) * 2015-05-29 2017-03-14 Sas Institute Inc. Normalizing electronic communications using a vector having a repeating substring as input for a neural network
CN106203619B (en) * 2015-05-29 2022-09-13 三星电子株式会社 Data optimized neural network traversal
US20160350653A1 (en) * 2015-06-01 2016-12-01 Salesforce.Com, Inc. Dynamic Memory Network
US20160358069A1 (en) * 2015-06-03 2016-12-08 Samsung Electronics Co., Ltd. Neural network suppression
CN106250981B (en) * 2015-06-10 2022-04-01 三星电子株式会社 Spiking neural network with reduced memory access and bandwidth consumption within the network
US20160378491A1 (en) 2015-06-26 2016-12-29 Microsoft Technology Licensing, Llc Determination of target location for transfer of processor control
US10275001B2 (en) 2015-06-26 2019-04-30 Intel Corporation Thermal throttling of electronic devices
US20160379109A1 (en) * 2015-06-29 2016-12-29 Microsoft Technology Licensing, Llc Convolutional neural networks on hardware accelerators
US11244225B2 (en) 2015-07-10 2022-02-08 Samsung Electronics Co., Ltd. Neural network processor configurable using macro instructions
WO2017062382A1 (en) 2015-10-04 2017-04-13 Atomwise Inc. Systems and methods for applying a convolutional network to spatial data
US11029949B2 (en) * 2015-10-08 2021-06-08 Shanghai Zhaoxin Semiconductor Co., Ltd. Neural network unit
CN106485318B (en) * 2015-10-08 2019-08-30 上海兆芯集成电路有限公司 With mixing coprocessor/execution unit neural network unit processor
US10471594B2 (en) * 2015-12-01 2019-11-12 Kindred Systems Inc. Systems, devices, and methods for the distribution and collection of multimodal data associated with robots
CN105488563A (en) * 2015-12-16 2016-04-13 重庆大学 Deep learning oriented sparse self-adaptive neural network, algorithm and implementation device
US10007519B2 (en) * 2015-12-22 2018-06-26 Intel IP Corporation Instructions and logic for vector bit field compression and expansion
US11232085B2 (en) * 2016-01-07 2022-01-25 Amazon Technologies, Inc. Outlier detection for streaming data
CN105512723B (en) * 2016-01-20 2018-02-16 南京艾溪信息科技有限公司 A kind of artificial neural networks apparatus and method for partially connected
US10565207B2 (en) * 2016-04-12 2020-02-18 Hsilin Huang Method, system and program product for mask-based compression of a sparse matrix
CN106203624B (en) * 2016-06-23 2019-06-21 上海交通大学 Vector Quantization and method based on deep neural network
CN106204468B (en) * 2016-06-27 2019-04-26 深圳市未来媒体技术研究院 A kind of image de-noising method based on ReLU convolutional neural networks
US10528864B2 (en) * 2016-08-11 2020-01-07 Nvidia Corporation Sparse convolutional neural network accelerator
WO2018058452A1 (en) * 2016-09-29 2018-04-05 北京中科寒武纪科技有限公司 Apparatus and method for performing artificial neural network operation
US10296292B2 (en) * 2016-10-20 2019-05-21 Advanced Micro Devices, Inc. Dynamic variable precision computation
CN106530200B (en) 2016-10-23 2020-01-07 深圳大学 Steganographic image detection method and system based on deep learning model
CN106529670B (en) * 2016-10-27 2019-01-25 中国科学院计算技术研究所 It is a kind of based on weight compression neural network processor, design method, chip
US9959498B1 (en) 2016-10-27 2018-05-01 Google Llc Neural network instruction set architecture
US10067710B2 (en) * 2016-11-23 2018-09-04 Advanced Micro Devices, Inc. Detecting buffer overflows in general-purpose GPU applications
US20180164866A1 (en) * 2016-12-13 2018-06-14 Qualcomm Incorporated Low-power architecture for sparse neural network
US10037490B2 (en) * 2016-12-13 2018-07-31 Google Llc Performing average pooling in hardware
US10169296B2 (en) * 2016-12-30 2019-01-01 Intel Corporation Distributed matrix multiplication for neural networks
US11562115B2 (en) 2017-01-04 2023-01-24 Stmicroelectronics S.R.L. Configurable accelerator framework including a stream switch having a plurality of unidirectional stream links
US10096134B2 (en) * 2017-02-01 2018-10-09 Nvidia Corporation Data compaction and memory bandwidth reduction for sparse neural networks
US10333549B1 (en) * 2017-03-08 2019-06-25 iDensify LLC System and components for encoding integers
US10909447B2 (en) 2017-03-09 2021-02-02 Google Llc Transposing neural network matrices in hardware
US10795836B2 (en) 2017-04-17 2020-10-06 Microsoft Technology Licensing, Llc Data processing performance enhancement for neural networks using a virtualized data iterator
US10671349B2 (en) * 2017-07-24 2020-06-02 Tesla, Inc. Accelerated mathematical engine
US20190081637A1 (en) * 2017-09-08 2019-03-14 Nvidia Corporation Data inspection for compression/decompression configuration and data type determination
KR20190066473A (en) * 2017-12-05 2019-06-13 삼성전자주식회사 Method and apparatus for processing convolution operation in neural network
US12014505B2 (en) * 2019-01-31 2024-06-18 Samsung Electronics Co., Ltd. Method and apparatus with convolution neural network processing using shared operand
US11671111B2 (en) * 2019-04-17 2023-06-06 Samsung Electronics Co., Ltd. Hardware channel-parallel data compression/decompression
CN112465129B (en) * 2019-09-09 2024-01-09 上海登临科技有限公司 On-chip heterogeneous artificial intelligent processor

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