MY188501A - Method of forming graphene bump structure - Google Patents
Method of forming graphene bump structureInfo
- Publication number
- MY188501A MY188501A MYPI2018002936A MYPI2018002936A MY188501A MY 188501 A MY188501 A MY 188501A MY PI2018002936 A MYPI2018002936 A MY PI2018002936A MY PI2018002936 A MYPI2018002936 A MY PI2018002936A MY 188501 A MY188501 A MY 188501A
- Authority
- MY
- Malaysia
- Prior art keywords
- substrate
- bump structure
- graphene
- epoxy
- metal catalyst
- Prior art date
Links
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title abstract 4
- 229910021389 graphene Inorganic materials 0.000 title abstract 4
- 238000000034 method Methods 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 abstract 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 239000004593 Epoxy Substances 0.000 abstract 3
- 239000003054 catalyst Substances 0.000 abstract 3
- 239000002184 metal Substances 0.000 abstract 3
- 229920002120 photoresistant polymer Polymers 0.000 abstract 3
- 238000000151 deposition Methods 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 230000002194 synthesizing effect Effects 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02491—Conductive materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02527—Carbon, e.g. diamond-like carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1606—Graphene
Abstract
The present invention relates to a method (200) of forming graphene bump structure (100) comprising the steps of providing (210) a substrate (1 0); etching (220) the substrate (10) to form a cavity structure (20); growing (230) a silicon dioxide layer (30) on top of the substrate (10); depositing (240) a thin metal catalyst layer (40) on top of the substrate (30); synthesizing (250) graphene layer (50) on top of the metal catalyst layer (40); depositing (260) an epoxy-based photoresist (60); removing (270) the thin metal catalyst layer (40), the silicon dioxide layer (30) and the epoxy-based photoresist (60) from the substrate (1 0); and patterning (280) the epoxy-based photoresist (60) to remove from the cavity structure (20) to form the graphene bump structure (100). Drawing accompanying abstract: Figure 2.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
MYPI2018002936A MY188501A (en) | 2018-12-26 | 2018-12-26 | Method of forming graphene bump structure |
PCT/MY2019/050132 WO2020139077A1 (en) | 2018-12-26 | 2019-12-26 | Method of forming graphene bump structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
MYPI2018002936A MY188501A (en) | 2018-12-26 | 2018-12-26 | Method of forming graphene bump structure |
Publications (1)
Publication Number | Publication Date |
---|---|
MY188501A true MY188501A (en) | 2021-12-16 |
Family
ID=71127381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI2018002936A MY188501A (en) | 2018-12-26 | 2018-12-26 | Method of forming graphene bump structure |
Country Status (2)
Country | Link |
---|---|
MY (1) | MY188501A (en) |
WO (1) | WO2020139077A1 (en) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101219769B1 (en) * | 2009-08-18 | 2013-01-18 | 세종대학교산학협력단 | Carbon nanostructured material pattern and manufacturing method of the same, and carbon nanostructured material thin film transistor and manufacturing method of the same |
KR20160070073A (en) * | 2013-09-16 | 2016-06-17 | 그리피스 유니버시티 | Process for forming graphene layers on silicon carbide |
KR101564038B1 (en) * | 2014-02-11 | 2015-10-29 | 광주과학기술원 | Method for direct growth of patterned graphene |
EA201890168A1 (en) * | 2015-07-13 | 2018-08-31 | Крайонано Ас | NANO WIRES OR NANOPYRAMIDS GROWN ON GRAPHITE SUBSTRATE |
KR101687313B1 (en) * | 2015-11-06 | 2016-12-16 | 한국과학기술원 | Method and board for growing high quality graphene layer using high pressure annealing |
-
2018
- 2018-12-26 MY MYPI2018002936A patent/MY188501A/en unknown
-
2019
- 2019-12-26 WO PCT/MY2019/050132 patent/WO2020139077A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2020139077A1 (en) | 2020-07-02 |
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