MY182400A - A method for protecting a programmable gate array design - Google Patents

A method for protecting a programmable gate array design

Info

Publication number
MY182400A
MY182400A MYPI2013700744A MYPI2013700744A MY182400A MY 182400 A MY182400 A MY 182400A MY PI2013700744 A MYPI2013700744 A MY PI2013700744A MY PI2013700744 A MYPI2013700744 A MY PI2013700744A MY 182400 A MY182400 A MY 182400A
Authority
MY
Malaysia
Prior art keywords
programmable gate
gate array
array design
protecting
uids
Prior art date
Application number
MYPI2013700744A
Inventor
Santosh Palai Smruti
Prasad Devi
Hafez Bin Nawi Ahmad
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mimos Berhad filed Critical Mimos Berhad
Priority to MYPI2013700744A priority Critical patent/MY182400A/en
Priority to PCT/MY2014/000081 priority patent/WO2014182154A1/en
Publication of MY182400A publication Critical patent/MY182400A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/10—Protecting distributed programs or content, e.g. vending or licensing of copyrighted material ; Digital rights management [DRM]
    • G06F21/12—Protecting executable software
    • G06F21/121—Restricting unauthorised execution of programs
    • G06F21/123—Restricting unauthorised execution of programs by using dedicated hardware, e.g. dongles, smart cards, cryptographic processors, global positioning systems [GPS] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Technology Law (AREA)
  • Multimedia (AREA)
  • Remote Sensing (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Storage Device Security (AREA)

Abstract

The present invention relates to a method for protecting a programmable gate array design. The method uses secure keys, unique identifications (UIDs), encrypted bit stream, as well as license server and software IDs for better protection of a programmable gate array design.
MYPI2013700744A 2013-05-08 2013-05-08 A method for protecting a programmable gate array design MY182400A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
MYPI2013700744A MY182400A (en) 2013-05-08 2013-05-08 A method for protecting a programmable gate array design
PCT/MY2014/000081 WO2014182154A1 (en) 2013-05-08 2014-04-28 A method for protecting a programmable gate array design

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2013700744A MY182400A (en) 2013-05-08 2013-05-08 A method for protecting a programmable gate array design

Publications (1)

Publication Number Publication Date
MY182400A true MY182400A (en) 2021-01-25

Family

ID=51261194

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2013700744A MY182400A (en) 2013-05-08 2013-05-08 A method for protecting a programmable gate array design

Country Status (2)

Country Link
MY (1) MY182400A (en)
WO (1) WO2014182154A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108848153A (en) * 2018-06-08 2018-11-20 山东超越数控电子股份有限公司 A kind of high-availability cluster software License registration, Activiation method and system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0114317D0 (en) * 2001-06-13 2001-08-01 Kean Thomas A Method of protecting intellectual property cores on field programmable gate array
US8417965B1 (en) * 2010-04-07 2013-04-09 Xilinx, Inc. Method and circuit for secure definition and integration of cores

Also Published As

Publication number Publication date
WO2014182154A1 (en) 2014-11-13

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