MY180765A - Fabrication method of thick bottom oxide in deep trench of metal oxide semiconductor field effect transistors - Google Patents

Fabrication method of thick bottom oxide in deep trench of metal oxide semiconductor field effect transistors

Info

Publication number
MY180765A
MY180765A MYPI2012002621A MYPI2012002621A MY180765A MY 180765 A MY180765 A MY 180765A MY PI2012002621 A MYPI2012002621 A MY PI2012002621A MY PI2012002621 A MYPI2012002621 A MY PI2012002621A MY 180765 A MY180765 A MY 180765A
Authority
MY
Malaysia
Prior art keywords
oxide layer
trench
semiconductor substrate
field effect
semiconductor field
Prior art date
Application number
MYPI2012002621A
Inventor
Zakaria Anifah
Hezri Abu Bakar Mohd
Arifin Fadzilah
Hilmy Azuan Hamzah Mohd
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mimos Berhad filed Critical Mimos Berhad
Priority to MYPI2012002621A priority Critical patent/MY180765A/en
Priority to PCT/MY2013/000101 priority patent/WO2013187751A1/en
Publication of MY180765A publication Critical patent/MY180765A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Weting (AREA)

Abstract

A method of fabrication of an oxide layer at the bottom of a trench in a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is provided. The method includes deposition of a pad oxide layer on a semiconductor substrate of the MOSFET (102); etching the pad oxide layer and the semiconductor substrate to form a trench in the semiconductor substrate(104); depositing a silicone oxide layer to fill the trench in the semiconductor substrate (108); etching the silicone oxide layer to remove the silicone oxide layer from a plurality of sidewalls of the trench (110); coating the semiconductor substrate and silicone oxide layer with a photoresist to protect them of etching (112); etching the photoresist and the silicone oxide layer until surface of the semiconductor substrate is reached (114); and removing the photoresist from inside the trench to obtain a thick bottom oxide (TBO) layer in the trench.
MYPI2012002621A 2012-06-11 2012-06-11 Fabrication method of thick bottom oxide in deep trench of metal oxide semiconductor field effect transistors MY180765A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
MYPI2012002621A MY180765A (en) 2012-06-11 2012-06-11 Fabrication method of thick bottom oxide in deep trench of metal oxide semiconductor field effect transistors
PCT/MY2013/000101 WO2013187751A1 (en) 2012-06-11 2013-05-27 Fabrication method of thick bottom oxide in deep trench of metal oxide semiconductor field effect transistors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2012002621A MY180765A (en) 2012-06-11 2012-06-11 Fabrication method of thick bottom oxide in deep trench of metal oxide semiconductor field effect transistors

Publications (1)

Publication Number Publication Date
MY180765A true MY180765A (en) 2020-12-08

Family

ID=48953419

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2012002621A MY180765A (en) 2012-06-11 2012-06-11 Fabrication method of thick bottom oxide in deep trench of metal oxide semiconductor field effect transistors

Country Status (2)

Country Link
MY (1) MY180765A (en)
WO (1) WO2013187751A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6596653B2 (en) * 2001-05-11 2003-07-22 Applied Materials, Inc. Hydrogen assisted undoped silicon oxide deposition process for HDP-CVD
CN1812127A (en) * 2004-12-14 2006-08-02 松下电器产业株式会社 Vertical trench gate transistor semiconductor device and method for fabricating the same
JP5222466B2 (en) * 2006-08-09 2013-06-26 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
CN101536164B (en) * 2006-09-27 2012-06-20 巨能半导体股份有限公司 Power mosfet with recessed field plate

Also Published As

Publication number Publication date
WO2013187751A1 (en) 2013-12-19

Similar Documents

Publication Publication Date Title
TW201613097A (en) Semiconductor device and method of fabricating non-planar circuit device
EP2620983A4 (en) Semiconductor element and manufacturing method therefor
WO2012087613A3 (en) Fabrication of through-silicon vias on silicon wafers
WO2014004012A3 (en) High voltage three-dimensional devices having dielectric liners
SG10201805702QA (en) Method of forming an integrated circuit and related integrated circuit
EP2590233A3 (en) Photovoltaic device and method of manufacturing the same
TW200614507A (en) Finfet transistor process
WO2015013628A3 (en) Methods of forming buried junction devices in silicon carbide using ion implant channeling and silicon carbide devices including buried junctions
GB2517854A (en) Shallow trench isolation structures
JP2012235103A5 (en) Manufacturing method of semiconductor device and semiconductor device
EP2755237A3 (en) Trench MOS gate semiconductor device and method of fabricating the same
JP2010135762A5 (en) Method for manufacturing semiconductor device
TW201130087A (en) Semiconductor structures and methods for forming isolation between fin structures of FinFET devices
GB2510768A (en) Nanowire field effect transistor device
JP2013508981A5 (en)
JP2012160716A5 (en)
WO2012107263A3 (en) Optoelectronic component having a transparent cover and method for producing the same
GB2526959A (en) Planar device on fin-based transistor architecture
TW200725745A (en) Method for forming semiconductor device having fin structure
GB201102122D0 (en) Semiconductor devices and fabrication methods
WO2014138116A3 (en) Method of forming finfet having fins of different height
GB2529953A (en) Nanostructures and nanofeatures with Si (111) planes on Si (100) wafers for III-N epitaxy
TW201613094A (en) Structure of fin feature and method of making same
GB2541146A (en) Method of manufacturing a germanium-on-insulator substrate
JP2011100985A5 (en)