MY151464A - A method of fabricating a semiconductor device - Google Patents
A method of fabricating a semiconductor deviceInfo
- Publication number
- MY151464A MY151464A MYUI2010005859A MY151464A MY 151464 A MY151464 A MY 151464A MY UI2010005859 A MYUI2010005859 A MY UI2010005859A MY 151464 A MY151464 A MY 151464A
- Authority
- MY
- Malaysia
- Prior art keywords
- sacrificial layer
- fabricating
- semiconductor device
- depositing
- onto
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00349—Creating layers of material on a substrate
- B81C1/00373—Selective deposition, e.g. printing or microcontact printing
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
THE PRESENT INVENTION RELATES TO A METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE USING A LIFT-OFF METHOD. THE METHOD COMPRISES THE STEPS OF DEPOSITING AND PATTERNING A SACRIFICIAL LAYER (22) ONTO A SUBSTRATE (21), WHEREIN AT LEAST ONE PORTION OF THE SUBSTRATE SURFACE (21A) IS COVERED BY THE SACRIFICIAL LAYER (22) AND AT LEAST ONE PORTION OF THE SUBSTRATE SURFACE (21B) IS EXPOSED; DEPOSITING AND PATTERNING A CHEMICAL RESIST (23) ONTO THE SACRIFICIAL LAYER (22) AND THE EXPOSED SUBSTRATE SURFACE (21 B); REMOVING THE SACRIFICIAL LAYER (22); DEPOSITING A SEMICONDUCTOR FILM (24) ONTO THE SUBSTRATE (21) AND THE CHEMICAL RESIST (23); AND REMOVING THE CHEMICAL RESIST (23) AND THE SEMICONDUCTOR FILM (24) DEPOSITED ON THE CHEMICAL RESIST (23).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
MYPI2010005859 | 2010-12-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
MY151464A true MY151464A (en) | 2014-05-30 |
Family
ID=46207363
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYUI2010005859 MY151464A (en) | 2010-12-09 | 2010-12-09 | A method of fabricating a semiconductor device |
Country Status (2)
Country | Link |
---|---|
MY (1) | MY151464A (en) |
WO (1) | WO2012078025A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10297497B2 (en) * | 2017-01-19 | 2019-05-21 | Texas Instruments Incorporated | Sacrificial layer for platinum patterning |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4497684A (en) * | 1983-02-22 | 1985-02-05 | Amdahl Corporation | Lift-off process for depositing metal on a substrate |
US6495311B1 (en) * | 2000-03-17 | 2002-12-17 | International Business Machines Corporation | Bilayer liftoff process for high moment laminate |
US7319076B2 (en) * | 2003-09-26 | 2008-01-15 | Intel Corporation | Low resistance T-shaped ridge structure |
US8183162B2 (en) * | 2008-09-12 | 2012-05-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a sacrificial layer |
-
2010
- 2010-12-09 MY MYUI2010005859 patent/MY151464A/en unknown
-
2011
- 2011-06-20 WO PCT/MY2011/000112 patent/WO2012078025A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2012078025A1 (en) | 2012-06-14 |
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