MY123942A - Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure - Google Patents

Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure

Info

Publication number
MY123942A
MY123942A MYPI9803738A MY123942A MY 123942 A MY123942 A MY 123942A MY PI9803738 A MYPI9803738 A MY PI9803738A MY 123942 A MY123942 A MY 123942A
Authority
MY
Malaysia
Prior art keywords
adp
packet
packet counter
application
bus structure
Prior art date
Application number
Inventor
Scott D Smyres
Original Assignee
Sony Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Electronics Inc filed Critical Sony Electronics Inc
Priority to MYPI9803738 priority Critical patent/MY123942A/en
Publication of MY123942A publication Critical patent/MY123942A/en

Links

Landscapes

  • Bus Control (AREA)
  • Multi Processors (AREA)

Abstract

AN ASYNCHRONOUS DATA PIPE (ADP)(20) AUTOMATICALLY GENERATES TRANSACTIONS NECESSARY TO COMPLETE A SYNCHRONOUS DATA TRANSFER OPERATIONS FOR AN APPLICATION OVER A BUS STRUCTURE (58). THE ADP INCLUDES A REGISTER FILE (26) WHICH IS PROGRAMMED AND INITIATED BY THE APPLICATION (12). THE REGISTER FILE (26) INCLUDES THE BUS SPEED, TRANSACTION LABEL, TRANSACTION CODE, DESTINATION NODE IDENTIFIER, DESTINATION OFFSET ADDRESS, LENGTH OF EACH DATA PACKET, PACKET COUNTER, PACKET COUNTER BUMP FILED, CONTROL FIELD, AND A STATUS FIELD. DURING A DATA TRANSFER OPERATION, THE ADP (20) GENERATES THE TRANSACTIONS NECESSARY TO COMPLETE THE OPERATION OVER THE APPROPRIATE RANGE OF ADDRESS, USING THE INFORMATION IN THE REGISTER FILE (26) AS A TEMPLATE. THE ADP (20) INCREMENTS THE VALUE IN THE DESTINATION OFFSET ADDRESS FIELD FOR EACH TRANSACTION ACCORDING TO THE LENGTH OF EACH DATA PACKET, UNLESS THE INCREMENTING FEATURE HAS BEEN DISABLED AND THE TRANSACTIONS ARE TO TAKE PLACE AT A FIXED ADDRESS. THE PACKET COUNTER REPRESENTS THE NUMBER OF TRANSACTIONS REMAINING TO BE GENERATED. THE PACKET COUNTER VALUE IS DECREMENTED AFTER EACH PACKET OF DATA IS TRANSFERRED. THE APPLICATION (12) CAN INCREMENT THE PACKET COUNTER VALUE BY WRITING TO THE PACKET COUNTER BUMP FILED. A MULTIPLEXER (40) IS INCLUDED WITHIN A SYSTEM HAVING MULTIPLE ADPS (20) FOR MULTIPLEXING THE INFORMATION FROM THE ADPS (20) ONTO THE BUS STRUCTURE (58). A DEMULTIPLEXER (42) IS INCLUDED WITHIN A SYSTEM HAVING MULTIPLE ADPS (20) FOR ROUNTING INFORMATION FROM THE BUS STRUCTURE (258) TO THE APPROPRIATE ADP (20).(FIG.2)
MYPI9803738 1998-08-17 1998-08-17 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure MY123942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
MYPI9803738 MY123942A (en) 1998-08-17 1998-08-17 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI9803738 MY123942A (en) 1998-08-17 1998-08-17 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure

Publications (1)

Publication Number Publication Date
MY123942A true MY123942A (en) 2006-06-30

Family

ID=47264455

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI9803738 MY123942A (en) 1998-08-17 1998-08-17 Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure

Country Status (1)

Country Link
MY (1) MY123942A (en)

Similar Documents

Publication Publication Date Title
AU2129997A (en) Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure
US5724348A (en) Efficient hardware/software interface for a data switch
WO1997033230B1 (en) Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure
CA2244713A1 (en) Application programming interface for data transfer and bus management over a bus structure
US6799232B1 (en) Automatic byte swap and alignment for descriptor-based direct memory access data transfers
TW347494B (en) Method and system for facilitating byte ordering interfacing of a computer system
FI20002477A (en) A method for intercepting network packets on a computer device
IT8420666A1 (en) "Multiple byte serial data transfer protocol."
CA2307816A1 (en) Buffering data that flows between buses operating at different frequencies
EP1045558A2 (en) Very wide memory TDM switching system
DE69839374D1 (en) MULTI-MEMORY USING INTELLIGENT DATA BUS INTERFACE
DE69838693D1 (en) Clock Data Transfer System for Type 1 ATM Adaptation Layer (AAL 1)
GB2252434A (en) Synchronous/asynchronous data bus with message priority handling capability and segmented memory transfer
KR930020903A (en) Byte tracking system and method
EP0382358A3 (en) Full address and odd boundary direct memory access controller
US6748442B1 (en) Method and apparatus for using a control signal on a packet based communication link
ATE476062T1 (en) COMMUNICATION SYSTEMS
MY123942A (en) Asynchronous data pipe for automatically managing asynchronous data transfers between an application and a bus structure
GB2348526A (en) System and method to maintain synchronization of data between multiple parallel front-end pipelines
EP1031092B1 (en) Byte alignment method and apparatus
JP3961666B2 (en) Telecommunication exchange
GB2372359A (en) Method and apparatus for an improved interface between computer components
WO2002007383A3 (en) In-band management of a stacked group of switches by a single cpu
CA1265271C (en) Bit interleaved multiplexer system providing byte synchronization for communicating apparatuses
金玄坤 An object-oriented view-driven approach for information system design