MXPA99007458A - Radio transceiver on a chip - Google Patents

Abstract

An entire radio transceiver (100) can be completely integrated into one IC chip. In order to integrate the IF filters (120, 124) on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO (118) is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO (118). A TDD scheme (114) is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme (124) is used to provide a number of other implementation advantages.

Description

RADIO TRANSCEIVER IN A CHIP BACKGROUND OF THE INVENTION TECHNICAL FIELD OF THE INVENTION The present invention relates, in general, to the field of wireless communications and, in particular, to a short range radio transceiver manufactured in an integrated circuit chip.

Description of the Related Art A high level of possible circuit integration with modern technology has allowed manufacturers of portable communications equipment (eg, cell phones) to substantially reduce the size of their products. As a general rule, these smaller products consume less energy and eventually become more economical in their production. In the past, numerous attempts have been made to manufacture a complete radio transmitter / receiver (transceiver) on a single integrated circuit (IC) chip. In general, these attempts have been unsuccessful and only part of these radios have been placed on a single chip. For example, U.S. Patent No. 5,428,835 to O anobu describes a receiver circuit formed on a single semiconductor chip. The ary reason for this lack of full integration can be found in the specifications of the radio system. Most of the specifications of the standard air interface for radio communications systems establish high requirements with respect to frequency accuracy, adjacent channel interference, modulation operation, etc. However, signal processing techniques in existing chips have not yet reached a level that can satisfy the operating criteria established for these air interface specifications.

COMPENDIUM OF THE INVENTION An object of the present invention is to significantly reduce the overall size of a radio transceiver. Another objective of the present invention is to produce a short range wireless radio link that is less expensive than the cable link. Still another objective of the present invention is to produce a short range radio transceiver on a single integrated circuit chip. In accordance with the present invention, the above and other objects are achieved by a radio transceiver architecture that can be fully integrated into a semiconductor IC chip. To integrate the IF filters of the transceiver into the chip, a heterodyne architecture with relatively low IF is used. A single directly modulated VCO is used for upconversion during transmission and downconversion during reception. Union wires are used as resonators in the oscillator tank for the VCO. A duplex scheme is used for time division in the air interface to eliminate crosstalk or leakage. A binary FSK modulation scheme, of Gaussian form, is used to provide several other disadvantages of the instrumentation.

BRIEF DESCRIPTION OF THE DRAWINGS A more complete understanding of the method and apparatus of the present invention can be had by referring to the following detailed description when taken in conjunction with the accompanying drawings, wherein: FIGURE 1 is a functional, basic block diagram of a radio transceiver architecture, which may be used to facilitate the understanding of the present invention; FIGURE 2 is a block diagram of a conventional receiver section, which can be used to instrument the functions of the receiver section shown in FIGURE 1; FIGURE 3 is a block diagram of a stage of the image rejection mixer that can be used for downward conversion with the architecture of the receiver illustrated in FIGURE 1; FIGURE 4 is a block diagram, schematic of the architecture of the single-chip transceiver, which can be used to realize the apparatus and method of the present invention; and FIGURE 5 is a block diagram of a detailed circuit of a radio transceiver on a single IC chip, according to a second embodiment of the present invention.

DETAILED DESCRIPTION OF THE DRAWINGS The preferred embodiment of the present invention and its advantages are better understood by reference to FIGURES 1-5 of the drawings, the like numbers being used for like and corresponding parts of the different drawings. For the preferred embodiment, the specification of the air interface allows the digital transmission of voice and data. This air interface that can be used is described in US Patent Application Serial No. 08 / 685,069 of Dent, et al., Filed July 13, 1996, entitled "Short Range Radio Communications System and Method of Use. " The frequency band that can be used is the Industrial, Scientific, Medical (ISM) band without a 2.4 GHz license, which has a bandwidth of 83.5 MHz available for use. However, in the United States, the Federal Communications Commission (FCC) requires frequency dispersion for operations where the transmitted power is greater than OdBm. There may be numerous "interfering" or "disturbing" cooperating in this band (for example, microwave ovens are noticeable "interferers" in this band.) Consequently, a frequency hopping scheme is used to provide increased immunity for this interference It is important to note that, contrary to the direct sequence frequency dispersion, the immunity of the interference provided by the frequency hopping dispersion is independent of the transmitted power of the pertubator.In addition, with respect to the preferred embodiment, the average dispersion Frequency over the entire 83.5 MHz band originates without having to process wide bandwidth signals, although the spectrum of the frequency at which the built-in transceiver can be operated is quite wide to provide dispersion, bandwidth snapshot may be small, which allows the front end of the transceiver to be operated in a It's narrow. In the preferred system, the instantaneous bandwidth (channel) is 1 MHz, while the hop is performed in a pseudo-random way over 79-hop channels (79 MHz extension). The preferred modulation scheme used is the formation of signals by Gaussian frequency offset (GFSK) This method provides a robust wireless communications link and allows the use of relatively simple transmitter and receiver circuits.

For the preferred embodiment, the information signals are transmitted in packets. The Automatic Repeat Request error correction (ARQ) is used to retransmit received packets with errors in the data field. The voice field is not retransmitted, but the Continuous Variable Slope Delta modulation scheme (robust (CVSD, Continuous Delta Slope Variable) is used to encode speech.The CVSD is a type of adaptive delta modulation scheme by which the operation is degrades in the presence of noise To obtain a complete-oble communication link, a time-division duplex (TDD) scheme is used, a duplex frame lasts 1.25 s, in which a packet is sent in one direction for the first 625 μs , and the other packet is sent in the opposite direction during the second 625 μs.Each transmission occurs at a new hop frequency, which is determined by the user-dependent pseudorandom hopping sequence.To better understand the invention, it will be useful in This point describes a radio transceiver in general terms: FIGURE 1 is a basic, functional block diagram of a radio transceiver architecture. gave (10), which can be used to facilitate the understanding of the present invention. Considering first the transceiver's receiver section, due to the imposed requirements based on the size of the antenna and propagation conditions, signals propagated by air are usually transported by radio frequency (RF) carriers. An RF signal received in the antenna 12 will be reduced in its frequency (14) to facilitate the processing of the signal. It should be noted that the information that is being carried has a much lower speed than the carrier frequency. Then, the reduced signal is filtered (16), to suppress all interference and noise outside the frequency band of interest, and thus improve the signal to noise ratio of the receiver. This process is commonly referred to as "channel filtering" since only the frequency band or channel of interest is filtered. Once the received signal has been filtered for the channel, the next step in the process is to retrieve the information (18) from the channel and convert it into a format that can be used. For example, the information retrieved may be in the form of small symbols (eg data output) such as those used in digital modulation schemes, or an analog signal for sound or video applications. It should be noted that, the key function of the receiver section is to filter the band of interest from the rest of the frequency spectrum. The transmitter section of the transceiver (10) converts or forms (20) the information that is to be transmitted in a signal format that can be carried by a carrier. This signal is then raised at the frequency (22) to the desired high frequency (RF) band and transmitted from the antenna (12). For the transmitter section, the key function is to confine the power of the transmitted signal to the band of interest (ie, to lose as little signal power as possible for frequencies outside the band of interest). FIGURE 2 is a block diagram of a conventional receiver section 30, which can be used to establish the functions of the receiver section shown in FIGURE 1. Most conventional radio receivers employ an architecture superheterodine of the receiver, such as the architecture of the receiver section 30 that is shown in FIGURE 2. The RF carrier received from the antenna 32 is reduced to a first intermediate frequency (IF) by mixing (34) the RF signal with a first signal from the local oscillator (36). A suitable band pass filter 38 (for example with exact cut characteristics) is used for channel filtering. The filtered signal for the channel is then raised to a baseband signal by mixing (40) the filtered signal with a second signal from the local oscillator (42). At this point, an additional filtering of the baseband signal can be used. The information that will be used (for example, the data) is retrieved by this means (44). A problem with integrating this receiver into a chip is to handle the integration of IF bandpass filters (eg, 38). For example, the operation of a filter is determined by its quality factor (Q). Q is a measure of a filter selectivity (which also filters) and can be represented by the expression: Q = f0 / BW, where (fo) is the center frequency of the filter and BW is the bandwidth of the filter. Therefore, a narrow filter centered at a high frequency would have a high Q. In general, bandpass filters can be manufactured by different techniques and integrated into semiconductor chips. However, the Q values available for these filters are significantly limited using conventional electronic components in silicon technology. The primary limiting factors are the loss that occurs between the electronic components on the chip. With respect to the reduction of interference and noise, only the bandwidth (BW) of the filter determines its operation in terms of the signal-to-noise ratio. For a fixed bandwidth, low Q filters can be integrated into a chip by reducing the center frequency, f0. For the extreme case F0 becomes zero and the band pass filter will be a low pass filter, which is much easier to integrate into a chip than a band pass filter. In this case, the signal that is being processed can be converted into a baseband only with a down-conversion or reduction step. Of course, this method is attractive from an integration p of view and is actually a way to obtain complete integration. However, a second problem occurs with this method, which is known as "homodyne" or "zero-IF" architecture. The problem known as "DC offset" (CD offset) occurs with a zero-IF architecture because the signal that is being processed is mapped directly to CD. Consequently, the interference in the CD can not be distinguished from the desired signal and can not be filtered. This problem also places more severe requirements on the even-order intermodulation characteristics of the receiver. Part of the CD offset can be eliminated with additional signal processing, but this method increases the circuit complexity and the power consumption of the IC. An intermediate method, which is suitable for integrating IF filters into a semiconductor chip, is to use a "low IF" architecture. With this method, the IF or filter center frequency, f0, is a relatively low frequency, but not zero. This type of architecture allows the fabrication of a low Q filter that is suitable for integration into a chip while avoiding CD problems. However, a third problem arises, which has to do with the carrier of the image. The process of mixing the received signal (RF) with a local oscillator carrier, f? 0, produces a low IF signal, f0, which not only maps the frequency band of interest in f? O + f0, but also maps the image band to fio-fo for the IF signal (or vice versa). This process gives rise to a significant problem because after the two RF bands are mapped in the same IF band, they are no longer distinguishable from each other. Therefore, an image rejection device should be used. FIGURE 3 is a block diagram of a stage of the mixer for the rejection of the image (50) that can be used for the down-conversion or reduction with the receiver architecture illustrated in FIGURE 1. Using this step, the signal of RF received from the antenna 12 is coupled to a first and second mixer (52, 54). A local oscillator signal (56) is directly coupled to the first mixer (52), and also shifts in phase 90 degrees (58) and couples with the second mixer (54). The reduced signal of the first mixer (52) moves in phase 90 degrees (60) and is algebraically added (62) to the reduced signal, displaced in phase of the second mixer (54), which finally works to suppress the band of the image. The amount of suppression of the image band that can be made with these circuits for rejection of the image (for example, FIGURE 3) depends on how well the circuit components can be coupled, and depends on the width of the image. band of the frequency over which the deletion is desired. With the components on the chip, a relatively high coupling accuracy must be achieved. However, in practice the rejection of the image actually obtainable for circuits on the chip is somewhat limited (for example approximately 30-40 dB for a bandwidth of 1 MHz). However, according to the present invention (as described above with respect to the air interface) a frequency hopping system is used in which each packet is transmitted in one of 79 available skip frequencies. Sometimes, interference like packet collision can occur if two different users occupy the same frequency jump at the same time. Consequently, with reduced operation in rejecting the image, it may be that the different user packets that are occupying the image bands of each may also interfere with each other. In any case, for the preferred embodiment, these occasional packet collisions, whether resulting from the co-channel, channel-image or interference from adjacent channels, are taken into account and compensated in air interface operations using a protocol ARQ suitable for data transfers and a robust voice coding format (eg CVSD) for voice transfers. In other words, the present invention compensates for the degraded performance of the receiver due to the interference of the image, by the use of frequency hopping dispersion, error correction and speech coding techniques specified for the air interface, which allows complete integration of the receiver and (as described below) sections of the transceiver transmitter on a single IC chip. Previously, when an attempt was made to place a transmitter and receiver on a single chip, a problem that occurred was that signals transmitted at relatively high power levels were lost at the receiver's input stage. In fact, this leak or "crosstalk" has been a major design problem in previous attempts to manufacture a complete transceiver on a chip. However, for the preferred embodiment of the invention, a TDD scheme is used for duplex operation on the air interface, which eliminates crosstalk and thereby facilitates the complete integration of the transceiver on a chip. In other words, the transmitter and receiver sections of the built-in transceiver are not simultaneously active, and the problem of crosstalk or leakage from the transmitter to the receiver in a fully integrated transceiver is solved. In addition, crosstalk or leakage can be further reduced by using different transmission and reception frequencies using a frequency division duplex (FDD) scheme. In general, the use of an FDD scheme would require a duplexer in the antenna stage of the transceiver to separate the transmitted and received signals. However, also using a TDD scheme according to the invention, this duplexer is not necessary. In addition, to further reduce the number of components on the chip, a single, controlled, variable oscillator (VCO) [sic] is used in the preferred embodiment, alternatively for upconversion in the transmission section and downconversion in the reception section . FIGURE 4 is a schematic block diagram of a single-chip transceiver architecture that can be used to realize the apparatus and method of the present invention. For the preferred embodiment, the binary FSK modulation scheme formed with a Gaussian filter is used. Specifically, the use of the FSK modulation for a single-chip transceiver has different advantages in its realization. For example, the detection function is performed directly on the IF with a discriminator stage (122) of the frequency modulation (FM). This method eliminates the need for a second downconversion to the baseband stage to retrieve information. The transmission section is then simplified so that the symbols of the information to be transmitted can be directly coupled with a VCO (for example, the HF oscillator 118), which converts these symbols into an FM signal. With this approach, a single VCO is sufficient for the transmission section, and the need for a separate upconversion mixer is eliminated. Still another advantage of the use of FSK is that the non-coherent detection of FSK signals is relatively intense for frequency errors. In this case, a frequency error shows how a CD moves the signal at the output of the FM detector. However, it is possible to use an automatic frequency control (AFC) stage to quickly compensate for the displacement. This method eliminates the need for highly stable local oscillator stages or precise frequency tracking schemes. Yet another advantage of the FSK modulation is that the received signal may be limited after the filtering of the channel. The information that is received is contained only in the phase and not in the amplitude of the signal. Consequently, this method eliminates the need for circuitry for automatic gain control (AGC) and amplitude tracking schemes. The AGC operation would also be severely impeded by the frequency jump defined in the air interface due to the fading of the uncorrelated signal at the different jump frequencies. Returning to FIGURE 4, making appropriate adjustments to the air interface (as already described) to compensate for instrumentation problems encountered with previous attempts to integrate a complete transceiver into a single IC chip, it is possible to use the architecture relatively simple that is shown in FIGURE 4 (according to the present invention). In comparison with the architecture described in FIGURE 1, the main blocks of FIGURE 1 are still recognizable. Note that each main block shown in FIGURE 1 can be replaced by only one circuit in the architecture shown in FIGURE 4. For example, in FIGURE 4, the step of reduction or down-conversion is performed in the reject mixer of image (166), which converts the RF signal to a low IF. A bandpass filter (120), which selective in this low IF, performs the channel selection. This filtered signal for the channel is then recovered in an FM discriminator (122). It should be noted that, no second step of downward conversion for a lower IF or baseband frequency is required since the FM discriminator (122) can detect the received signal directly in the low IF. In the transmitter section of FIGURE 4, the signal to be transmitted is formed with a Gaussian filter (124) to suppress the power of the out-of-band signal. The formed signal is directly coupled to a VCO (118), which generates the FM signal directly to the desired RF. It should be noted that only one VCO is necessary for the complete transceiver. This same VCO (118) performs the downconversion function during the reception cycle, and the upconversion function during the transmission cycle. The low IF used is selected at a suitable frequency to allow integration into the chip of a band pass filter (120) with sufficient selectivity. For the preferred mode, 3 MHz IF (f0) is used, which allows the realization of a CMOS rotating filter (on the chip) with a bandwidth of 1 MHz and, thus, a Q of 3. The low pass filter (124) and the low pass detection filter (not explicitly shown) subsequent to the FM discriminator can be performed in a similar manner. The FM detector (122) is preferably manufactured as a quadrature detector. For the VCO stage (118), connecting wire inductors are used as resonators in the oscillator tank, without external components (outside the chip). Preferably, all filters are tuned to a common reference circuit to compensate for manufacturing tolerances. FIGURE 5 is a detailed circuit block diagram of a short range radio transceiver mounted on a single IC chip, according to a second embodiment of the present invention. Nevertheless, although the radio transceiver shown is described with respect to the realization of a single IC chip, this description is for illustrative purposes only and the present invention is not intended to be so limited. For example, some of the components shown in FIGURE 5 may be located outside the IC chip. Returning to FIGURE 5, the transceiver on a chip (200) includes a transmit / receive antenna 202 coupled to a low noise amplifier (LNA) 204 at the front end of the receiver. The output of the LNA is coupled with a mixer for rejection of the image, which is composed of a first mixer 206 for channel I, a second mixer 208 for channel Q, a phase shifter of 45 ° 210, a shifter of phase of 135 ° 212, a phase shifter of 90 ° 214 and a combiner 216. A signal of the local oscillator is coupled to the phase shifter of 90 ° 214 from a VCO 218. Accordingly, the rejection of the image is performs by recombining the IF signals I and Q shifted in phase to produce an output IF signal of the combiner 216.

For this mode, the selected IF signal is approximately 3.0 MHz. The output of the IF signal from the combiner 216 is coupled with the IF receiver circuitry which includes a bandpass filter 220 for suppressing the signals in adjacent channels. The bandpass filter is preferably a stepped tuning IF filter which uses a type C transconductance filtering. The IF receiver circuits also include a hard limiter (HL) 222, an FM discriminator 224 and a low pass filter 226. The IF receiver circuitry may also include an RSSI indicator with an A / D converter (not explicitly shown). The IF signal is detected (224), and the recovered information is sent from the low pass filter 226. The transceiver 200 on a chip also includes a phase locked circuit, which is composed of a phase detector 230, a loop filter 236 and a pre-scaler with module logic 240. The phase-locked circuit is a component of a synthesizer that includes phase detector 230, charge pump 232, regulating filter 234, a loop filter 236, the pre-scaler 240, the circuitry of the module logic 238, the VCO 218 and a buffer 219. As such, the input information signal (eg data entry) formed by the formation filter 256 is used to directly modulate the VCO. A sampling and retention circuit (S / H) (not shown explicitly) stabilizes the input voltage for the VCO, while the VCO is being directly modulated. The VCO 218 is also a component of the transmitter section. For transmissions, the output of the VCO 218 is coupled to a power amplifier 242 and to the antenna 202. The fully differential signal paths are used to suppress common mode noise and interference signals. In addition, all reception filters, transmission filters and FM discriminator are applied to electronic circuits with similar characteristics. The self-tuning of all the filters and the discriminator is provided by a reference filter which is engaged with the crystal oscillator 248. The transceiver 200 also includes digital circuitry 244 to provide downward control of the power, programming of certain analog blocks in the chip due to variations in the process, and logic of the synthesizer control. The digital circuitry 244 is connected to a serial digital interface connection 246. Various common functional circuit blocks are also included in the chip, such as, for example, a crystal oscillator (XO) 248, frequency adjustable low power oscillator (LPO), on-reset (POR) 252, and finite state machine (FSM) 254. Accordingly, the transceiver of a chip shown in FIGURE 5 includes power reduction logic for all analog circuit blocks, logic for tuning the blocks of the analog circuit, a serial to parallel converter and decoding logic. In summary, as shown by the modalities shown in FIGURES 4 and 5, an entire radio transceiver is fully integrated into an IC chip. To integrate the IF filters into the chip heterodyne architecture with a relatively low IF is used. A single directly modulated VCO is used for upconversion and downconversion, and junction threads are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate the diphon or leak. A binary FSK modulation scheme with Gaussian form is used to provide other advantages of the instrumentation (as already described). Although a preferred embodiment of the method and apparatus of the present invention have been illustrated in the accompanying drawings and described in the aforementioned detailed description, it will be understood that the invention is not limited to the described modes, but is capable of numerous rearrangements, modifications and modifications. substitutions without departing from the spirit of the invention as set forth and defined by the following claims.

Claims (22)

1. A radio on a single IC chip, consists of: an antenna section for transmitting and receiving a plurality of high frequency signals, the radio including the means for transmitting and receiving the plurality of high frequency signals in a time division duplex mode; a downward conversion section coupled to the antenna section to reduce a first high frequency signal of the plurality of high frequency signals to a low intermediate frequency signal; a low pass filter coupled with the down conversion section; a discriminator coupled with the bandpass filter; an upconversion section coupled with the antenna section for raising an information signal to a second high frequency signal of the plurality of high frequency signals, the upconversion section comprises a portion of the downconversion section; and a forming filter coupled with an output of the upconversion section.

2. The radius of claim 1, wherein the low intermediate frequency signal is centered at about 3 MHz.

3. The radius of claim 1, wherein the downconversion section includes a variable, controlled oscillator [sic].

The radius of claim 1, wherein the upconversion section includes a variable, controlled oscillator.

5. The radius of claim 1, wherein the upconversion section includes a controlled, variable, directly modulated oscillator.

6. The radius of claim 1, wherein the down-conversion section includes a step of the mixer for rejecting the image.

The radius of claim 1, wherein the forming filter consists of a Gaussian formative filter.

8. The radius of claim 1 further comprises a binary frequency offset modulation means.

9. The radius of claim 1, further comprising an error correction means for requesting automatic retransmission for data transfer.

10. The radius of claim 1, further comprising the variable delta continuous, variable modulation means for transferring speech.

The radius of claim 1, wherein the discriminator consists of a frequency modulation discriminator.

12. The radius of claim 1 further comprises the frequency hopping means for providing interference immunity.

13. The radius of claim 1, further comprising the self-tuning means for self-tuning a plurality of filters and an FM discriminator.

The radius of claim 1, wherein all of the active components are integrated into a single IC chip, and at least one passive cycle filter or a passive VCO resonator is located external to the single IC chip.

15. A short range radio on a semiconductor chip, consists of: the receiver's half input to perform the downconversion of a high frequency signal to a low intermediate frequency signal and reject an image signal; a bandpass filter coupled to the input means of the receiver, the bandpass filter tuned to pass the low intermediate frequency signal; a step of the frequency modulated discriminator coupled to a bandpass filter output for retrieving information; a controlled, variable oscillator coupled to a power amplifier stage for upconversion, and coupled with the receiver input means for downconversion, the controlled, variable oscillator modulated by an information signal to be transmitted.

The radius of claim 15, wherein the variable, controlled oscillator includes a phase synchronization circuit.

The radius of claim 15, wherein the low intermediate frequency is about 3 MHz.

The radius of claim 15, wherein the variable, controlled oscillator consists of a portion of a frequency synthesizer.

The radius of claim 15, wherein the variable, controlled oscillator uses junction wires as resonators.

20. A radio architecture consisting of: an antenna section for transmitting and receiving a plurality of high frequency signals, the radio architecture includes the means for transmitting and receiving the plurality of high frequency signals in a duplex mode by division of weather; a downward conversion section coupled to the antenna section to reduce a first high frequency signal of the plurality of high frequency signals to a low intermediate frequency signal; a band pass filter coupled with the down conversion section; a discriminator coupled to the bandpass filter; an upconversion section coupled with the antenna section for raising an information signal to a second high frequency signal of the plurality of high frequency signals, the upconversion section comprises a portion of the downconversion section; and a forming filter coupled with an input of the upconversion section.

21. A method for using a short range radio transceiver in a semiconductor chip, comprises the steps of: modulating the short range radio transceiver in a time division duplex mode; reduce a signal received from a high frequency to a low intermediate frequency; perform the channel filtering of the low intermediate frequency signal; detecting a first information signal of the filtered signal of the channel; give Gaussian form to a second information signal; and raising the second information signal formed to the high frequency.

22. The method of claim 21, wherein the low intermediate frequency is about 3 MHz.