MXPA99005603A - Efficient fixed-length block compression and decompression - Google Patents

Abstract

Compression and decompression apparatus and methods for producing fixed-length compressed data blocks with variable-length compression are described. The compression system receives and N-bit word from a data block (60) and determines the variable compression length for the word (62). A bit counter keeps track of the number of bits remaining (64) and determines if sufficient bits have been used to ensure that the fixed-length compressed data block will be filled (66). If so, the compressed word is output (70). If not, prior to output the compressed word is padded with an appropriate number of bits (68), which may be null bits.

Description

COMPRESSION AND EFFICIENT DECOMPRESSION OF FIXED LENGTH BLOCKS Field of the Invention This invention relates to efficient data coding with a fixed length output block. BACKGROUND OF THE INVENTION Data compression is an important aspect of data transmission and storage. Known compression methods allow data to occupy less bandwidth or storage space without loss of data or with an acceptable loss of data. There are several data compression methods, both lossless and with acceptable loss, including Huffman coding, quantization and direct cosine transformation. The particular application will normally determine the compression method used. For the transmission of image data that requires high data rates, JPEG and MPEG are two well known and accepted data compression methods. In general, the data transmitted or stored in these formats are transformed, quantified and then compressed to a variable length to meet the bandwidth or storage requirements of the system. The compressed data blocks are not limited to have any particular length. When the end of a data block arrives, an end-of-block (EOB) code or flag is appended to the data to alert the system to the end of the current data block and the beginning of another. However, there are instances where data, such as image data, must be stored or transmitted in blocks of fixed length. Known systems using variable length compression methods ensure that the data compression is sufficient to fit with the allocated space for each data block. It is not uncommon for compression to use less space or bandwidth than it is allocated. In this case, the known systems place a block end code leaving the remaining space free, or filling the remaining space with zeros or some other expected bit pattern. The placement of a block end code or padding with zeros causes the output of the data system to stop while handling the remaining space of the block, thus reducing the efficiency of the system. As the data rate increases to the limit of the system output, the placement of a block end code or padding with zeros may cause an overflow of data in the compensators causing a data omission. Similar problems may exist during decompression, stopping data output and creating the same unwanted results. Therefore, it is convenient to implement a system that produces compressed data blocks of fixed length with variable length compression, which will efficiently use the storage space or output bandwidth, without stopping the flow of data by placing a block end code or filling with zeros of the space left over from the block. Brief Description of the Invention In accordance with the principles of the present invention, a compression system that creates a fixed-length output data compresses the input data with variable length compression. Variable length compression will sometimes compress a block of input data with fewer bits than those allocated in the fixed-length output block. In these instances, the compression system will recognize that there is excess output space during compression and will fill with zeros the selected compressed data words, causing the final length of the compressed data block to equal the length of the assigned output block. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 shows an exemplary embodiment of the compression system in accordance with the present invention. Figure 2 is a flowchart describing data compression in the system of Figure 1. Figure 3 is a flow chart describing the data decompression associated with the data compression performed on the system of the Figure 1 and Figure 2. Figure 4 illustrates a data stream produced by a system in accordance with the present invention. Figure 5 shows an exemplary data processor in which the present invention can reside.

Detailed Description of the Preferred Modes The following description occurs in an MPEG compression system that requires storing fixed length recompiled data blocks in frame memory. The selection of an M PEG system is not intended to be limiting. The invention can be applied to any compression system with input data capable of being formatted into compressed output data blocks of fixed length. Figure 1 shows a compression system that will throw blocks of compressed data of predetermined fixed length. The variable length compressor (VLC) 10 accepts blocks of data from a source (not shown). The data may already be compressed to some degree, perhaps by discrete cosine transformation. The variable length compressor 10 can compress prediction data representative of values of m ≤ < differential pulse code (DPCM) or similar simulations of a known m ¡nera. The differential pulse code modulation processing is known in the art and is beyond the scope of this description. The variable length compressor 10 produces compressed data of varying length. For example, the variable length compressor 10 can quantize word input data from eight bits to three, four, five or six bits. The amount of compression depends on variables such as the output network and the amount of data loss that is acceptable by the system. Three-bit compression is used, for example, when the value presented for compression is relatively small in value. Six-bit compression is used, for example, when the value presented for compression is relatively large in value. The value presented for compression generally depends on the relative change in value of the input data within the context of a prediction network, for example. For image data, for example, a frame containing negligible movement and / or object material will generally produce small prediction error values for compression. A frame containing a large amount of movement and / or several subjects is more likely to produce larger prediction error values for compression, but it will still produce small prediction error values anyway. As the variable length compressor 10 produces compressed data of varying length, the bit counter 20 keeps track of the number of bits used in total and per word of the input data block. If, for example, the output block can only use an average of four bits per word for each block of data, and each block consists of eight-bit words in an eight-by-eight matrix, the output of the compressed data block of fixed length should be 256 bits. Longer or shorter output blocks will confuse the system and may cause data to be contaminated during rebuilding. Four bits per word is a design parameter that exemplifies the allowable loss of data in a given compression system. The bit counter 20 identifies when there are not enough remaining bits in the output block to maintain the average of four bits per compressed word and tells the variable-length compressor 10 to compress the input words with three bits. The bit counter 20 also identifies when a three-bit compression has occurred very frequently for a given data block, and the remaining data words of a given block can be compressed with more than four bits each. In this case, when the compression system determines that compressing additional data words with less than five bits provides acceptable results in terms of data loss parameters, the bit counter sends a control signal to the filler with zeros 30 and fills the end of the word compressed with zeros to exceed the average of four bits per word to the range determined by the bit counter 20 to ensure that the final compressed block will be the fixed length. The compressed word "padded" may be five or six bits in this exemplary system. An internal algorithm used by the bit counter 20, and repeated in the decoder, determines the number of bits that will be filled at the end. However, the total length of the compressed compressed word may not exceed the length of the output register, the change register, or any other implicit computing equipment that transfers the compressed data outside the compressor. By keeping the maximum length of each word compressed to the length of the output register, a cylinder shifter for example, the data flow is not interrupted or stopped by padding with interleaved zeros. In contrast, the data flow is more likely to be interrupted or stopped when a zero-filled data is used at the end of the data, or when a block end code is appended to the end of the output data block. Stopping the data flow to move the filling with zeros to the end of the block, or to restart the pointers when an end-of-block code is found, requires additional computer equipment and computer programs that are unnecessary when the data output is continuous . The data record or registers that handle the input data in the decoder / decompressor are of the same length as the output register of the compressor. In the current example, both registers would be six bits long as long as the maximum length of the compressed word is six bits. If, for example, the maximum length of the compressed word is five bits, then the records that handle the compressed data would be five bits each. The common maximum length of the word reduces the complexity of the system. The compression system records the length of each compressed data word, and transfers the words to the Compensator / Multiplexer 40 either directly from the bit counter 20 or from the filler with zeros 30. Here, the data words are concatenated and appended by or to G header information, if necessary. The bit counter 20 will compensate the header information, when necessary, while retaining the required number of bits during the compression of the data. The Compensator / Multiplexer 40 transfers the compressed fixed length data block to the memory 50 for storage. Alternatively, the fixed length block can be transmitted if desired, or sent to some other device or data path, which allows the fixed data length or fixed bandwidth. Alternative embodiments include performance of zero-padding on the variable-length compressor 10 or, if separate, transfer of compressed words without requiring padding with zeros through the filler with zeros 30 without adding zeros, instead to ignore element 30 as shown in Figure 1. When the compressed data reside in the memory 50 it is necessary for the reconstruction, that a decompression occurs in a substantially inverse manner as described above. Therefore, the associated apparatuses will no longer be explained in more detail herein. However, it is understood that the padding with previous zeros is applicable and necessary for a decompressor to receive the compressed data. The algorithm used to record the use of bits and send control signals to the variable length compressor 10 and the zero-filled filler 30 also has a reverse counterpart employed by the decompressor.

Figures 2 and 3 are flow diagrams describing the steps of data compression and decompression when the selected words are padded with zeros to produce a block of compressed data of fixed length. Figure 2 is first described and refers to elements of Figure 1. In step 60, a N-bit data word is received in the variable length compressor 10. Step 62 evaluates the number of bits to be used to compress the received word and compresses the data word. The number of bits is determined by the algorithm that counts for the system-dependent parameters, and the average number of bits per compressed word and the number of bits already used by the data block to which the current data word belongs. Once the compression length is determined, the word is compressed. The number of bits used for compression is included in several counters by the bit counter 20 as determined by the compression algorithm in step 64. Next, if the word is less than the maximum length, the system determines whether it is it is necessary to fill in with zeros in step 66. If so, the appropriate number of bits is added to the word and the counters are updated in step 68. Step 70 yields as a result the compressed word, which may or may not be filled in . Figure 3 describes the decompression steps of the data word received from the previous compressor, which may or may not be padded with zeros. In step 80, the system determines whether the total number of bits used for the next word is to be decompressed from the fixed-length data block. This includes the filled bits. In step 82, the word is retrieved and the number of bits used is included in several counters that track the decompression process according to the decompression algorithm. In step 84 the number of filled bits is determined if any, and the de-filling occurs in step 86 if necessary. In step 88, the compressed word without filling is transferred to the decompressor from the desalter or, if the word was not filled, from the entry. The word is decompressed to its original length of N bits. Finally, the decompressed word is transferred to an output network in step 90. A compression / decompression system in accordance with the principles of the present invention allows fixed length compressed data blocks to be produced continuously without stopping the output and the data processing. If a block end code is placed at the end of each compressed block, data processing can be stopped to adjust the pointers and perform other header functions. If the data blocks are filled with zeros at the end to fill the unused space, the system must use a sufficient number of clock cycles to eliminate the zeros attached, depending on the length of the change record. An alternative could be to make the change register appropriately large, but this increases the complexity and cost of the system.

Figure 4 illustrates the solution of the problem by the present invention. Two streams of data are output from a compression network to the memory, and enter from the memory to the decompression network. The data stream 100 includes filling with zeros at the end of the fixed length data block. The data stream 102 illustrates the interleaved zero padding in accordance with the principles of the present invention as described above. For example, compressed data streams can be compressed to fifty percent. For an eight-by-eight data block, each word has eight bits, fifty-percent compression translates to 256 bits for each block of fixed length. The data is still moved in and out of memory by the multiplexers in eight-bit portions. Therefore, 32 clock cycles are required to transfer data to and from memory in a compression network at fifty percent. The data streams 100 and 102 include demarcations indicating the bits representing individual compressed data words, and not the number of bits shifted in a clock cycle. During decompression, the data must be decompressed from the variable bit format to eight-bit words again. In the data stream 100 the first 27 clock cycles contain all the data information, and the last five clock cycles are filled with zeros to satisfy the fixed block length requirements. The decompressor will output 64 eight-bit values in 64 clock cycles with data from 27 input clock cycles. The remaining five input clock cycles containing zeros must be removed from the compensator before the next block of data is enabled. An alternative to eliminate zeros could be to reset the compensator pointer to the next block of data. Both require stopping the data output; both require more complex computer equipment and computer programs to obtain valid data. Additionally, once the data flow on the decompression side is interrupted for sufficient time, the decompression network will also stop the data processing unless there is enough space in the compensator / memory large enough to maintain processing. The data stream 102 includes padding with zeros interleaved in the selected data. Having the padding with zeros expands the valid data through all 32 clock cycles. As described above, the system controller knows how many bits the current data word that is being decompressed represents, including how many of the bits, if any, are filled with zeros. Padding with zeros is easily discarded without delaying the system at this point. This allows fixed length data blocks to flow continuously and uninterrupted through both the compression and decompression networks. The complexity of the system is reduced because the system uses the existing shift / shifter register to move the individual variable bit-length compressed data words. As soon as the 256 bit of a compressed data block is decompressed, bit 1 of the subsequent compressed data block is next in the data path ready to be recovered. Figure 5 illustrates and exemplifies the system in which the invention can be used. The system is a high definition television receiver capable of receiving, decoding and displaying a high definition transmission signal, in an MPEG format for example. The high-definition television signal input 110 receives the demodulated signal and supplies it to be decoded in an MPEG format and decompressed by the element 1 12. The partially decoded video data is fully transferred to the recompressor 1 14 which recompresses the data in the spatial domain to reduce the size of the frame memory 1 16. The partially decoded data is stored in the frame memory 1 16 while subsequently the current data is decoded and decompressed. Then, the partially decoded data is retrieved from the memory 16, decompressed by the decompressor 1 18, processed by the motion compensation unit 120, and combined with the data of the element 12 in the adder 122 to reconstruct the final decoded data. The motion compensation process forms predictions from the above decompressed and decoded images to produce final decoded data samples, as is known. Motion compensation is part of the MPEG standard relative to frames I, P and B, and therefore, will not be discussed further here. The final decoded data is recompressed by the recompressor 1 14 and stored in the frame memory 16 until they are needed for the reconstruction of the subsequent frames as discussed above, and until they are needed for deployment. When the recompressed data is needed for deployment, they are transferred to the decompressor 124 and are again stored as pixel data of full bit length. The pixel data is then transferred to the display processor 126 to perform the display format and send them to a display device (not shown). The pixel data is processed as described above in 8x8 pixel blocks. The invention of Figures 1 and 2 resides on the compression side in the recompressor 14, and on the decompression side in the decompressors 1 18 and 124 (Figure 3). Both decompressors are substantially identical in operation.

Claims (20)

1. ftE | VlNP | CA? | QNES 1. A data compression system that produces fixed-length block data, each block includes a plurality of variable-bit-length data words, said system comprising: an input to receive words from N-bit data as input data to be compressed; a variable length data compressor (10) coupled to such an input for compressing said input data to variable length compressed data words having less than N bits, and having an output; a bit counter (20) coupled to such an output to count the number of bits resulting from the compression of a predetermined amount of said input data; and a filler (30) for adding one or more bits to a plurality of said compressed data words selected as a function of said bit counter by such a bit counter in order to reformat the aforementioned predetermined amount of data in said data. fixed length block for output.
2. 2. The system of claim 1, after compression: means (40) for concatenating said compressed data words into a block of compressed data of said fixed length.
3. The system of claim 1, wherein: said input data comprising compressed data blocks in fixed length data blocks by said system.
4. The system of claim 1, wherein: said bit counter provides control signals to said variable length compressor to determine such compression length of the data words; and said bit counter provides control signals to said filler to select which compressed data words are filled and how many bits are filled into such selected compressed data words.
5. The system of claim 1, wherein: said variable length data compressor is a quantizer capable of producing compressed data words of at least two bit lengths.
6. 6. The system of claim 1, wherein: said variable length data compressor compresses prediction error values.
7. The system of claim 1, wherein: such added bits are null bits.
8. 8. A variable length data decompression system that responds to compressed block data of fixed length, each block includes a plurality of compressed data words of variable bit length, said system comprising: an input for receiving compressed data words to be decompressed; a bit counter coupled to such input for counting the number of bits comprising a compressed data word, including any padding bits; a disconnector for removing one or more stuffing bits from the compressed data words filled as a function of said number of bits counted by said bit counter; and a variable length data decompressor for receiving such compressed data words and decompressing said compressed data words to variable length decompressed data words.
9. 9. The system of claim 8, wherein: said bit counter indicates to said disconnector how many bits are de-filled from said compressed data words.
10. The system of claim 8, wherein: said variable length data decompressor is a dequantizer. eleven .
11. The system of claim 8, wherein: such variable length data decompressor decompresses prediction error values.
12. 12. A method for compressing data to a fixed length data block, each block includes a plurality of variable bit length data words, the steps comprising: receiving a variable bit length data word to be compressed (60) ); determining the variable bit length necessary to represent said data word (62); compressing said data word to said length (62) to produce a compressed word; determining whether said compressed word will be padded (66) to provide such a block of fixed length data; and filling said compressed word if it was determined (68) in such determination step.
13. 13. A method for decompressing compressed data words received from a block of compressed data of fixed length, each block includes a plurality of compressed data words of variable bit length, said compressed data block containing compressed data words filled , the steps comprise: determining the total number of bits used to represent a compressed data word (80); recovering said total number of bits (82); determining if any of said total number of bits are padding bits (84); removing said certain padding bits from said compressed data word, if any (86); and decompressing said compressed data word (88).
14. 14. In a system for processing a digital data stream received from fixed length data blocks representing enhanced resolution video image information, each block includes a plurality of variable bit length data words, a processing method of signals comprising the steps of: decoding and decompressing said video information to produce pixel data; recompressing such pixel data to fixed length data blocks; counting the number of bits resulting from the recompression of said pixel data; and filling in the selected recompressed pixel data as a function of the number of bits counted in said counting step for filling such fixed-length data blocks.
15. The method of claim 14, further comprising the step of: storing the recompressed data of said recompression step in a frame memory.
16. The method of claim 14, wherein: said digital data stream represents a high definition television signal.
17. The method of claim 14, wherein: said recompression step is in an MPEG motion compensation network that produces a final decoded and decompressed output.
18. 18. The method of claim 14, wherein: such recompression step compresses said pixel data into variable length. The method of claim 14, wherein: said padding required to fill the fixed length data block is sandwiched between the pixels. The method of claim 14, wherein: such a pad is filled in null.