MXPA99001985A - High-definition television system - Google Patents
High-definition television systemInfo
- Publication number
- MXPA99001985A MXPA99001985A MXPA/A/1999/001985A MX9901985A MXPA99001985A MX PA99001985 A MXPA99001985 A MX PA99001985A MX 9901985 A MX9901985 A MX 9901985A MX PA99001985 A MXPA99001985 A MX PA99001985A
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Abstract
The present invention relates to a high-definition television system that comprises the following elements:at least two television cameras;a unit comprising several analog-digital converters;a video-signal-standard converter;a RAM-type memory;means for synthesizing an output video signal which are connected to each other and to the outputs of the television cameras;and a central processor such as a (personal) computer. The means for synthesizing an output video signal comprise a multiple-channel geometric distortion corrector as well as a synchronizing unit. The above-mentioned means are used in a dynamic process for efficiently assembling image fragments into a full"seam-less"image, wherein said image has a definition of at least 3000 x 4000 elements with a resolution and a contrast at least equal to those of pictures on large-scale photographic or cinematographic X-ray films. The corrector is connected to the television camera outputs through the analog-digital conversion unit and to the (personal) computer input through the video-signal-standard converter and the RAM. The control input of the synchronising unit is connected to the synchronisation output of at least the last television camera, while the control outputs of said unit are connected to the clock input of the analog-digital conversion unit, to the address inputs of the corrector and to the control and address synchronisation inputs of the video-signal-standard converter.
Description
A HIGH RESOLUTION TELEVISION SYSTEM
THE TECHNIQUE
The invention relates to block diagrams for high resolution television systems that use at least two video cameras and devices "to join in points" an integral image from their components. Such systems may be used primarily for the functional diagnostic needs of radiography, for example: for angiographic studies using x-ray contrast media, in particular for the determination of vessel permeability and to determine the effectiveness of the blood supply of organs and tissues; for fluoroscopic monitoring of the course of legal operations using probes, catheters, etc, instruments introduced into the body through the esophagus, rectum or blood vessels; for fluoroscopy of the lungs, heart, stomach and other locomotor organs; for film-free radiographs in traumatology;
for fluorography without film in mass screening tests of the public; and for radiography in urology and other fields where periodic observation of the slow distribution of the x-ray contrast medium in the body is required.
Previous Technique Evaluations of the indicated types are carried out. they see more and more of a large scale and also, even more expensive as the medi-ciña develops. Therefore, the rejection of static and cinematic photography that uses film materials (and especially x-ray-sensitive films) that became accustomed until recently have ten i. I now have a serious problem during a great time. It is natural that at the contemporary level of development of television and computer technology, the shift to "non-film" radiographic diagnostics has been possible mainly through the creation of x-ray television systems. However, there are several fundamental difficulties throughout this course.
The first of these is determined by the fact that many physiological processes (especially circulatory) are deployed at a rate that the contrast agents of the x - rays produced in the vascular bed leave the observation area in approximately several seconds. . Therefore, there is an objective need for high-speed video shooting (at a frame rate of no less than 25 frames per second). In addition, the diagnostic value of x-ray television images depends to a substantial degree on their resolution. In other words, its spatial resolution (3 to 5 line pairs per mm) and the contrast should not be more limited than for film images. Correspondingly, the composition of the integral image in no less than 3000x4000 pixels should be acceptable. And, finally, x-ray television systems must be so simple and therefore technologically feasible to manufacture, allowable, reliable and convenient to operate. Separate compliance with these requirements through the construction of television systems using special television cameras does not present significant difficulties. In fact, the model KAF-16800 (Kodak) of television camera (abbreviated video camera), on base. to MOS structures (semiconductos of metallic oxide) and that also include MOS transistors in the exit stages with a format of 4096x4096 pixels, it is known (News Briefs, Tech Briefs ... Med i cal Imaging, The Business Magazine for Technlogy Management, Vol. 10, No. 12, 1995, p 20). The video camera, according to the available data, is unique in its resolution. However, due to the need for aberration correction, it has a highly complex construction (e spe ci almene the optical components), and therefore is expensive to manufacture and operate. In addition, the MOS structures provide a curing speed no greater than 0.5 frames per second; this is acceptable, for example, for film-free radiographs in traumatology, although it is important to infer that the required minimum of 25 frames per second for angiography and even to monitor the course of the surgical procedures (approximately 7 frames per second).
Therefore, an attempt is being made to increase the resolution and frame rate in x-ray television systems by using their camcorders which are less expensive and high with "lability than the traditional ones." Therefore, a television system with 2000 Line scan and resolution no greater than 350 pixels per line has been built based on a Philips XQ5002 tube (Murphy G., Bitler W., Lybroo J., Slevener T., Broemelsiek M. The application of a Tube Camera of Pluicon Television in 2000 - Line - Ssteste Proc. SPIE - 1994, Vol. 2163, p 333-339) Due to the limited frequency band of 20 VIHz of the video signal, the system has a speed of frame no greater than 7.5 frames per second Such a frame rate is sufficient, for example, for radiographic monitoring of the course of surgical procedures, although it is clearly inadequate for angiographic examinations.The standard calculations for specialists in this tea They have shown that extending the frequency band of the video signal up to 30 MHzT could achieve a resolution of up to 2000 pixels per line, although at the same frame rate of 7.5 frames per second. However, this enlargement is made difficult by the need to create a specialized video preamplifier using the broadband input stages, and by the need to lower the intrinsic noise level of the picture tube. An increase in the resolution of up to 2000 by 2000 pixels in a frame is achieved in the x-ray television system for examining one's gast. rointestinales through the use of SATICON video cameras that are optically connected to the source of x-rays through an optical separator and an optoelectronic x-ray transducer (Ogura N., Mas u da Y., -Fujita H. Technical and Clinical Evaluations of a 2048x2048 Matrix Digital Radiology System for Gastrointestinal Examinations, Lbid, 1991, Vol 1443, pp. 401-408). Ester makes it possible to get a frame rate of only 0.94 frames per second. ,,, To avoid amplification of the frequency band of the video signal by overcoming the aforementioned difficulties, it is advisable to use a television system only for the observation of physiological processes that develop lent. amenté, while the fast processes can be filmed in wide film (up to 100 mm) for further analysis. These devices are convenient (even if expensive) for diagnostic examinations in situations in which patients' lives are not at immediate risk, but are not applicable from a practical point of view for radiographic monitoring of the course of procedures. Surgical and are not suitable for large-scale fluorographic screening of the population. Attempts to use high resolution video cameras based on wide format charge coupled semiconductor devices (hereinafter abbreviated CCD), described by Z. Nin ov, et al. (Characterization of a Large Format CCD Array, Optical Engineering, 1995, Vol. 34, No. 1) in an x-ray television system with a frame rate of no more than 25 frames per second being associated with even greater requirements for the frequency band frequency width of the video signals. Therefore, the frequency band of the video signals for commercially available video cameras based on CCD dispositions does not exceed 30 MHz. However, the frequency bandwidth of the video signal must be approximately 100. MHz even for the decomposition of images in 2000 by 2000 pixels at a frame rate of 25 frames, per second. When changing to a 3000x4000 pixel format, which is close to the resolution of 30x40 cm of x-ray film, the frequency bandwidth of the video signal must now be about 300 MHz. This exceeds the capacity of existing camcorders based on CCD provisions by far. A natural way out of these difficulties can be achieved by creating multi-camera television systems, in which each of the high-speed video cameras with a standard frequency band of the video signal is directed to a part of the object under examination or observation, and the set of images obtained can be used to represent such an object as a whole. Television security and surveillance systems, for example, VC-Profi (V701-003), CSS-4223, and Videoman (JHV-501), in which at least two video cameras are connected to a common monitor ' and / or a composite image analyzer (see the catalog, "Equipment for Television Observation and Television Monitoring Systems," Ultra Star, South Korea, published by the Center for Security Technologies in Moscow, 1995, p.36), It can serve as the simplest example of the use of this principle. Such systems are completely effective for the discrimination of moving or low-contrast objects in a general field of observation. However, the composite image formed by them consists of individual parts that clearly correspond to the observation fields of the individual video cameras, with visible limits between those parts and the resolution of such systems is essentially the same to the -resolution of the monitor on which the composite images are displayed. Therefore, these systems can not be used without substantial improvements as components of integral object observation systems (which; they require detailed image training), and e s p 6; They are also used as components of X-ray diagnostic systems for the needs of angiography (as well as to monitor the course of surgical procedures).
However, systems of this type can serve as the basis for system creation. e-mas of high resolution x-ray television. - It can be assumed that with respect to the technical essence, a high-resolution television system
(in the original - "Multi-source Image Real Time
Mixi-ng and Anti-Aliasing ") according to the United States of America patent 5,351,067 (Lumelsky L. e al.) Is the closest to such system for the proposed system ema.The system has: at least two input source channels for 'parts of the required image, in particular, at least two video cameras, connected in series to each of the channels: analog to digital converters (hereinafter referred to as ADCs); internal (hereinafter RAM), and standard input video converters;
devices for the synthesis of salt signal: - of video connected to the outputs of the video cameras and comprising: at least two mixers that are connected to the outputs of those standard converters; at least two multiplexers, in which 1: - the control inputs are connected to a common control unit containing a personal computer (PC), temporary memory module, and a video separator, - such mixers are connected to the first data inputs and the standard converters are connected to the second inputs of atos, and - which, starting from the second, are connected in series through the third data inputs to the preceding multiplexers, while - a monitor high resolution (vi = ua 1 ization) is connected to the output of the last multiplexer; a central processor based on a PC.
A substantial amplitude (up to 260 MHz) of the common frequency band of the video output signal is achieved in the television system described by means of the multiplexers and the objective is therefore achieved by simultaneous display in the same screen of several images whose position can be selected as desired by the operator in various combinations and scales, and which can be replaced by another at a frequency of 25 frames per second and greater. However, even when the input video cameras are placed so that the aggregate of their fields of vision covers the entire area of any integral object under observation or examination, it is not possible to form an integral image at the output of the system without visible boundaries of the observation fields of the individual video cameras. This undesirable effect arises: first, due to the geometric distortions that are inevitable (even if each one is insignificant in an individual way), in each input stage, which will be more noticeable in the output video signal (synthesized), the closest to the 'objectives of the video cameras that are for the object under observation or examination;
second, especially because the devices used to obtain the initial data (ADCs video cameras, etc.) can not be absolutely identical in their operating characteristics. As a result, the system can not be used effectively as a component of systems for observing integral objects (which require detailed image information) and especially as components of high-resolution diagnostic x-ray television systems for image analysis in motion, in which the distance between the objectives of the video cameras and the object under examination (for example the circulatory system) or observation (for example a surgical probe, inserted along the length of a tubular organ) should be as short as possible. The need to minimize the distance is determined: first by the need to reduce the radiation exposure of the human organism (and this exposure can be mitigated by maximizing the flow of light at the output of the primary transducer that converts radiation x to light visible);
second, by the need to obtain the most detailed possible images of objects under display or observation.
The Essence of the Invention In relation to the above, the objective of creating such a high resolution television system that could effectively provide for the "points" of individual images in an integral image (avoiding "seams") of a dynamic process, characterized by a resolution of not less than 3000x4000 pixels with spatial resolution and cont. Scratch not inferior to the images in fixed image or movement of x-rays, improving the composition and structure of the system, forms the basis of the invention. The goal is achieved by the fact that in a high resolution television system that has at least two video cameras, there is an analog to digital converter module
(ADCs), a standard video converter, an internal memory (RAM), devices for synthesizing the video output signal connected to the outputs of video cameras and interconnected, and a central processor based on a PC; according to the invention, the video output synthesizers are based on a multi-channel geometric distortion corrector and a synchronizer; the corrector is at the same time connected through the ADC module to the outputs of the video cameras and through the standard video and RAM converter to the PC input, while the synchronizer is connected through its own control input to the synchronization output of at least one video camera, and through its cont. outputs. role to the clock input of the ADC module, to direct the inputs of the corrector and to direct and synchronize the control inputs of the standard video converter. By making the devices for synthesis of the video output signal based on a multi-channel geometric distortion corrector and a synchronizer and its inclusion in the structure of the system, in the above-mentioned manner the necessary preconditions are ensured and enough stop. a substantial reduction in the influence of geometric distortions that arise in the stages of the television system's quality in the video output signal (synthesized) In fact, for the effective "points" of individual images of parts of an object that is to be examined or observed in an integral image, is sufficient in most cases to take into account and eliminate partial translaps of the fields of vision of individual video cameras and the geometric distortions introduced. The first additional distinction consists in the fact that the television system is equipped with a primary radiation source (x-rays) and a lightning-image converter. xa a visual image, which are mounted in front of the video cameras.In the majority of cases, this addition is sufficient for the use of the proposed television system as a composite of x-ray diagnostic systems. The second additional distinction consists in the fact that the television system is equi. With at least one calibration test object in the form of a three-dimensional lens that can be placed in front of the video cameras when the system is being adjusted. The adjustment of the television system proposed for the "points" and individual images of parts of an object that are to be examined or observed in an integral image of this object is thus facilitated. The third additional distinction consists in the fact that the television system is equipped with a means to place test objects in the field of observation and remove those test objects only from the field of view of the video cameras, which is connected to the synchronization control output of 1 sicronizer, while the synchronizer is additionally int reconnected with the PC and a feedback control circuit. The automatic adjustment of the television system when there is a need for online correction of the quality of the "points" of the integral image from the images of the individual video cameras is therefore achieved. The fourth additional distinction consists in the fact that the television system is equipped with a high resolution monitor that is connected to the data output of the standard video and RAM converter. The possibility is thus assured of the direct perception of the operator of the integral "dotted" image of the object under observation or examination (at a frequency of not less than 25 frames per second).
The fifth additional distinction consists in the fact that the multi-channel geometric distortion corrector has, in each of the television channels: at the input: at least two identical calculation circuits to generate the corrected coordinates along the the horizontal and vertical, respectively, of each of the pixels in the video output signal, calculated based on the initial coordinates of analog elements of the image in the video input signal and correction factors; - at least two identical secondary memory modules for the digital video input signal, connected to the calculation circuits, such as the sources of the addresses for reading data on the corrected pixels of the video output signal, while that in the output: an inverter, which is inserted between the above-mentioned synchronizer and one of the secondary memory modules, and an output multiplexer for alternating connection of the outputs of the secondary memory modules to the input of the standard converters of video mentioned above and RAM. Such a multi-channel geometric distortion corrector structure is preferable for x-ray television systems adjusted to "point-bond" the integral image from images formed by individual video cameras, using rigid three-dimensional lenses. The sixth additional distinction consists in the fact that the multiple channel corrector: each of the calculation circuits has at least: an input comparator with a fixed threshold digital code, connected to the output of one of the ADCs, a decoder connected to the address outputs for the pixel coordinates of the input image of the aforementioned synchronizer and which has two control inputs, - two logical AND circuits, each of which is connected to the output of the comparator and to the output of synchronizer control, and one of which is connected to the first and the other to the second control output of said decoder, - two non-volatile RAMs, in which: - the control inputs are independently connected to the outputs of the respective AND circuits a - the address and data inputs are also independently independently connected to the address inputs of the synchronizer to mentioned; - a decoder, connected to the address output of one of the coordinates of each one of the pixels of the input image from the aforementioned psychicizer (in the process, the signal corresponding to one of the coordinates of each one of the pixels of the input image is sent to the data inputs of the first and second non-volatile RAMs of the first calculation circuit, the signal corresponding to the second coordinate of each of the pixels of the input image which it arrives at the address inputs of the same RAMs in that said signals are sent in reverse order to the corresponding inputs of the first and second non-volatile RAMs and to the decoder of the second calcal circuit, a differential step with two data inputs connected separately to the data outputs of the non-volatile RAMs, - a normalizer for the integrated division of the digital parallel code of the signaling to the coordinate of each pixel of the distorted image, by means of the digital code of a constant fixation of one of the geometrical dimensions of the undistorted frame (respectively along the horizontal in a calculation circuit and along the vertical in the other calculation circuit, - a multiplier for multiplying the digital codes of one of the normalized coordinates of each of the pixels of the input image by the digital code of the active dimension of the distorted frame corresponding to coordinate, an adder to add the digital codes of the coordinates of the origin of the representation of the distorted field of the image and the current increment in the coordinate of the processed pixel of the image in the same frame, while each of the secondary memory modules has: - two input multiplexers, each of which is designed for the generation of corresponding digital codes of the coo]: decadas of the pixels of the input and the image corrected and connected to said multiplexers, - RAM for writing the video input signal to a -direction and reading of the video signal of the corrected image output from another saying. The described structure of the channels of the geometric distortion corrector more effectively facilitates the points of the integral image from fragmentary images formed by the individual video cameras, essentially with complete exclusion of the loss of information in the constructions. The seventh additional distinction consists of the fact that in the standard video converter it is combined with RAM and has: RAM banks with isolated data inputs, the number of banks is equal to the number of video cameras and for each of which are connected: - two multiple addresses and - two temporary frame memories;
a control decoder for RAM banks. a first digital-to-analog converter; the temporary RAM, which contains: memory modules connected in parallel, the number of which is equal to the number of video cameras, and a temporary RAM decoder and a second digital-to-analog converter. The combination of the video standards converter with RAM reduces the ins t r-umen t required to perform such functions as it applies to television and especially to x-ray television systems oriented to the points of the integral image from images formed by individual video cameras. The eighth additional distinction consists in the fact that in the video standard converter with RAM there are: (a) in each RAM bank: the data inputs of the frame memories are combined and connected to the corresponding outputs of the multi-channel geometric distortion corrector, and its data outputs are also combined (including between banks) and connected to the data input of the first digital-to-analog converter; the first inputs of the multiplexers are combined and connected to the synchronization outputs for the codes of the coordinates to write the corrected images in the temporary frame memories in the aforementioned synchronizer, while the second inputs of the multiplexers are also combined and they are connected to the synchronization outputs for the codes of the coordinates for the reading of the corrected images from the temporary frame memories in the previously set synchronizer; the first outputs of the first multiplexer are connected to corresponding address inputs of the first frame buffer, while the first outputs of the second multiplexer are connected to corresponding address inputs of the second frame buffer; the second control input of the first multiplexer and the second inverted control input of the second multiplexer are connected to the control output of the aforementioned synchronizer; the first outputs of the multiplexers are connected to the address inputs, their second outputs are connected to the microcircuit selection control inputs and their third inputs are connected to the control inputs of 1 ect ur a - it is cri tura of the Corresponding RAMs; (b) in all RAM banks: the first control inputs of the first and second multiplexers are combined. and connected respectively to the first, second, etc: outputs of the decoder, while the data outputs of all the frame-based memories are combined and connected to the data input of the first digital-to-analog converter; (c) the control input of the decoder is connected to the control output of the aforementioned synchronizer; (d) the first and second control inputs of the first digital-to-analog converter are respectively connected to the synchronization outputs of the aforementioned synchronizer, in that the data output of the first converter is connected to the aforementioned high resolution monitor; (e) the address entries of the temporary RAM modules are combined and connected to the aforementioned synchronizer synchronization outputs with the codes of the coordinates; its data inputs are connected to corresponding outputs of the aforementioned multi-channel geometric distortion corrector; its data outputs are combined with the data input of the second digital-to-analog converter; its control inputs of 1 ect ur a- es cr i tur a are connected to the control output of the aforementioned synchronizer, while the data input of the last memory module of the temporary RAM is connected to the data input corresponding to the nematode -.temporal frame; (f) the control inputs of the temporary RAM decoder are connected to corresponding control outputs of the aforementioned synchronizer, while the control outputs of the decoder are connected to the mic-block selection inputs of the memory modules so that the first of said outputs is connected to the input of the first memory module, the second to the input of the second memory module, etc .; i (g) the data input of the second digital-to-analog converter is connected to the combined data outputs of the memory modules; the control inputs of this converter are respectively connected to the synchronization outputs of said synchronizer, while its data output is connected to the aforementioned module, to access the video signals to the PC. The specific structure described of the combination of the video standards converter with RAM is preferable for the formation of a high resolution image of large and integral format forming many of the constituent parts (10 and more) each of which is characterized separately by substantially lower resolution. The ninth additional distinction consists in the fact that the synchronizer has: the first synchronization signal generator generator corresponding to the resolution standard of the video camera, whose clock output is connected to the clock inputs of the modules. Aforementioned ADC and the multi-channel threshold controller, and at least one second synchronization signal pulse generator, which corresponds to the high resolution standard for the synthesized image; two groups of counters respectively for the X and Y coordinates of the pixels of the images formed by each of the video cameras; and two groups of counters respectively for the coordinates Xm and Ym of the pixels of the high resolution image synthesized; at least one synchronization pulse selector designed to select the synchronization pulses from the total television signal and to form the horizontal and vertical output synchronization pulses; two digital comparators respectively for the codes of the coordinates Xm and Ym; two monostable multivibrators for the formation of horizontal (line) and vertical (frame) pulses corresponding to the resolution alt standard; at least one counter to count the number of pixels in the high resolution image synthesized; and an AND circuit for conjunction in the process of forming control signals for the aforementioned geometric distortion corrector; an input register to receive the control commands through the synchronizer sent from the PC; the output register to send information about the status of the synchronizer to the PC; and an address decoder for the programmable port of the computer for issuing the control commands to said synchronizer, in which case: the first pulse generator is connected to the counter input of the first set of co-ordinate counters x; the counter input of the second set of Y coordinate counters is connected to the output of the horizontal synchronization pulses of the synchronization pulse selector;
the first set of coordinate counters Xm is connected through the counter input for the output of the second synchronization signal drive generator; the counter input of the second set of coordinate counters Ym is connected to the salt i. gives the Xm coordinate counters through one of the digital comparators and one of the monostable multivibrators, connected in series; - the restoration inputs of the first group of X-coordinate counters and of the first set of coordinate counters Xm are connected to the output of the horizontal synchronization pulses of the synchronization pulse selector; the restoration input of the second set of Y coordinate counters is connected to the output of the synchronization pulse selector from which the synchronization pulses vert. ics that correspond to the full picture of output video cameras should be taken; the restoration input of the second set of coordinate counters Ym is connected to the output of the synchronization pulse selector from which the vertical synchronization pulses corresponding to the middle frame of output images of the video cameras must be taken; the output of the first set of Xm coordinate counters is connected: "- to the inputs of all the multiplexers and to the output of the memory bank control decoder of the aforementioned video standards converter with RAM and - from the first digital comparator and the first monostable multivibrator, connected in ser.Le, to the digital-to-analog converter of the same co-n RAM converter, and also - to the counter input of the second set of coordinate counters Ym, the output of the second set of counters of Ym coordinate is connected: - to the inputs of all the multiplexers of the video standards converter mentioned above with RAM, and - through the second digital comparator and the second multivibrator - monostable, connected in series, to the digital-to-analog converter of the same converter with RAM and also to the counter input of the number of pixels counter of the high resolution image synthesized; input sensor is connected: - through a data input parallel to the computer, through the first output of the restoration input of the number of pixels counter of the synthesized high resolution image and to the control input of the converter of video standards with RAM, through the second output to the second input of the AND circuit; through the third output to the restoration input of multivibrator D; the output region is connected: through the first input to the output of the vertical synchronization pulses of the synchronization pulse selector previously mentioned, - through the second input to the counter output of the number of pixels of the high resolution image synthesized, and - through the output to the PC; The programmable port address decoder of the PC for issuing control commands to the aforementioned synchronizer is connected: - through the input to the address bar of the PC, and - through the output to the input of the PC. check in; the pixel count of the synthesized high resolution image is additionally connected to the control input of the temporary RAM decoder of the aforementioned video standards converter with RAM. Despite the sewing abundance of the functional modules, the described construction of the synchronizer represents the simplest form of the inventive conception for the needs of the proposed high resolution x-ray television system. The tenth additional distinction consists in the fact that the synchronizer is additionally equipped with a second AND circuit and a mu 1 li vibrator D, and: the AND circuit is connected through an input to the output of the signaling generator that corresponds to the resolution standard of video cameras, through a second input to the inverted output of the multivibrator D , whereas the output can be used in a supplementary circuit for the generation of input signals for the aforementioned geometric distortion corrector, while the multivibrator D is connected: through the data input to the output of control of the aforementioned multi-channel threshold controller, - through the synchronization output to the output of the synchronization pulse selector corresponding to a complete picture of the input image, through the restoration input to the third exit of the aforementioned entry recorder. These additions facilitate the improvement of the quality of the operation of the geometric distortion corrector and, consequently, the quality of the output image. The eleventh additional distinction consists in the fact that the television system is in addition equipped with a digital video signal amplitude corrector, which is connected to the input of the multi-channel geometric distortion corrector, with signal accumulators of interframe digital video, whose number is usually equal to the number of video cameras and which is inserted between the ADC module and the digital video signal amplitude corrector, and with a multiple channel threshold controller, which is connected at the output of the correct digital video signal amplitude-r, which is connected through the aforementioned synchronizer to the control inputs of the interframe digital video signal accumulators and is equipped with an output, control feedback in a feedback loop with the source of rad i. primary ation (x-rays). A more complex high resolution television system of this type is preferable for the needs of x-ray diagnostics. The 12th adi-cial distinction is inThe fact that the digital signal amplitude corrector is multi-channel, and has cade, channel: two non-volatile RAMs, which are respectively intended to store the codes for the correction factors of the "black" level and the maximum displacement of the video signal for each pixel of the input image from the video camera or corresponding to the specified channel; a differential step for calculating the difference between the codes of the input signal and the "black" level for each pixel of the input image from the corresponding video camera; a splitter to calculate the normalized amplitude correction factors for the video input signals by dividing the constant code setting for the maximum displacement of the video signal for the selected video cameras and ADCs by means of the variation code corresponding to the displacement maximum of the video signal for each active pixel of the image input from the corresponding video camera; an address decoder for the programmable port of the PC for sending control commands to the specified channel of the digital video signal amplitude corrector, in which the input is connected to the address bar of the PC; an input register to receive control commands that come from the PC, in which: the first input is connected to the PC data bar, the second input to the output of the address decoder, while the outputs are connected to the control inputs of the non-volatile RAMs; an output multiplier for the generation of codes for the normalized video output by multiplying the normalized factors mentioned above by the code of the aforementioned difference signal, and: the first RAM is connected: through the data input to the output of the corresponding channel of the aforementioned ADC module, - through the control input to the first output of the input register, the second RAM is connected: through the data input to the output of the differential step, - through the control input to the second output of the input register, while both RAMs are connected through the address inputs to the output X, Y of the aforementioned synchronizer;
the differential stage is connected: through the first input to the output of the corresponding channel of the aforementioned ADC module, - from the second input to the output of the first RAM, through the output to the first input of said multiplier; The divider is connected between the output of the second RAM and the second input of the multiplier. The described structure of the digital video signal amplitude corrector is preferable for high resolution fluoroscopy television systems which, in the context of the permissible absorbed dose limitations, must operate consistently at x-ray energy densities that They are as low as possible. The use of such correctors in the systems used to monitor the course of surgical procedures is especially impor tant. The thirteenth additional distinction consists in the fact that the multi-channel threshold controller has: (a) in each channel: a first comparator to compare the pixel codes of the image formed by the video camera corresponding to the channel specified, with the threshold code, - an AND circuit, which through the first input is connected to the output of the comparator and is designed to select the pulse of the clock signal with the output signal of this comparator, an counter, the counter input that is connected to the output of the AND circuit, and that serves to calculate the number of such pixels, in the picture box that corresponds to the video camera connected to the specified channel, whose code exceeds the value of predefined threshold luminance, - a register, the data input of which is connected to the counter output and which serves to store the parallel output code of this cont. a second comparator whose input is connected through the register to the output of the counter and which serves to compare the output code of this counter with the preset threshold number of pixels of the image having a luminance not less than the value of the aforementioned threshold, and an actuator, in which the data input is combined with the output of the comparator and which serves to write the logic output signal of this comparator at the end of the frame synchronization pulse from the synchronizer before mentioned; and (b) the following, in common for all channels: an address decoder for the programmable port of the PC to output to the multi-channel threshold controller the codes of the luminance threshold values of the number of pixels with a luminance not less than the threshold value and the number of channels with logical level "i" in the outputs, in which the input is connected to the address bar of the PC, - an input register to receive the codes of the threshold values arriving from the PC, in which the first input (data) is connected to the data bar of the PC, while the second input (clock) is connected to the salt i. For the address decoder, the first input (of the luminance threshold value code) is connected to the first inputs of the first comparators of all channels, while the second output (of the number of pixels with a luminance not less than the preset value) is connected to the second combined inputs of the second comparators of all channels, - a multiplexer for the multiplexing of the output signals of all the channels, in which each of the data inputs is connected to the outputs of the actuators of the corresponding channels, while the control input is connected to the synchronization output of the previously mentioned synchronizer with the coordinate code X; - an AND circuit for selecting the pulse of the clock signal with the output signal of said multiplexer, in which the first input is connected to the output of the multiplexer, while the second input is connected to the second combined inputs of the AND circuits of each of the channels of the multiple threshold controller and is connected to the synchronizer clock output mentioned above;
a counter for counting the number of those channels whose signals at the output of the actuators have a logic level "1", and which is connected through the counting input to the output of the AND circuit, while it is connected through the restoration input-through the inverter to the output of the frame synchronization pulses of the aforementioned synchronizer; - a comparator for comparing the counter output code with the threshold value of the number of channels with the logical level 1 at the outputs, connected through the first and second data inputs respectively to the output of the cont. and the third exit of the entry register, as long as it is connected through the salt i. gives the controller of the primary radiation source (x-rays), - an actuator for writing and storing the comparator output signal, connected through the data input to the comparator output, through the clock input through said inverter to the above-mentioned synchronizer frame synchronization pulse output, and connected through the control output of the aforesaid interframe digital video signal accumulators through the aforementioned synchronizer; in which case: (c) in each of the channels, the following is combined and connected together to the output of the frame synchronization pulses of the aforementioned synchronizer: the restoration entries of the counters of the number of pixels with a luminance not less than the preset value, the clock inputs of all the registers and the clock inputs of all the driven ones is, while (d) the second inputs of the first comparators of all the channels are connected to the outputs of Corresponding data of the aforementioned digital video signal amplitude corrector. The proposed construction of the multiple channel threshold controller makes it possible, when used in the proposed x-ray television system for massive radiographic screening, to first effectively regulate the operation of the primary source of x-rays according to the criteria of permissible absorbed dose and the required quality of the synthesized integral image, and second optimizes the operation of the interframe accumulators.
Brief description of the diagrams
The essence of the invention is further explained by a detailed description of the proposed device with reference to the attached diagrams, wherein the following is illustrated: Figure 1 - block diagram of the high resolution television system proposed in the simplest form of embodiment mechanics of the inventive conception; figure 2 - block diagram of the high resolution tele vision system proposed in the improved form of the mechanical embodiment of the inventive conception; Figure 3 - functional block diagram of the multi-channel geometric distortion corrector; Figure 4 - functional block diagram of the standards converter with internal memory (RAM);
Figure 5 - functional block diagram of the synchronizer; FIG. 6 - functional block diagram of a channel of the video signal amplitude corrector of the multiple channel from FIG. 2; figure 7 - functional block diagram of a channel of the interframe accumulator of figure 2; Figure 8 - functional block diagram of the multiple channel threshold controller of Figure 2; Figure 9 - schematic of the test object with vertical arrangement of the three-dimensional lens; Figure 10 - schematic of the test object with horizontal arrangement of the three-dimensional objective.
Preferred views of the mechanical realization of the inventive conception
The proposed high resolution television system, in the simplest form of mechanical realization (see figure 1), has, as a minimum: at least two video cameras 1, which: are aligned together so that their fields of vision that overlap insignificantly (those cameras can be placed in horizontal and / or vertical rows, or when necessary, along the diagonal of an arbitrary rectangular profile) and electrically interconnected in typical form by a synchronization circuit vertical and horizontal sweep, which operates from the output of one of the video cameras; a module 2 of analog-to-digital converters (hereinafter, ADCs), the number of which s is equal to the number of "video 1" cameras electrically connected to their inputs and each of the ADCs has an input clock, which is not specially designed, a multi-channel geometric distortion connector 3, which has (without being specially designed as will be the case from here in cases if mj 1 res, since it is obvious to the specialists in c) tronic): - signal inputs connected to the outputs of the ADC 2 module, a control input for transferring instructions, clock pulses and commands, outputs of the digital video signals as: a standards converter 4 for the video image, combined with an internal memory
(RAM) b, for example, on static memory in particular that of SRAM type 128Kx8, in the commercially available form of microcircuits TOSHIBA TC558128AJ), which: is electrically connected to the signal inputs of the corrector 3, - it has a control input for the transmission of addresses, clock pulses and commands and is equipped with at least one data output, and preferably two data outputs for the transmission of digital video signals corrected to the users; input module for video 5 for accessing the video signals (again in digital form) inside the computer (preferably a personal computer), which is electrically connected to the data output of the converter 4 and has at least a pair of "data output-data entry"; a high-speed PC 6 which is electrically connected to the module 5 by direct coupling and feedback via the "data input-data output" pair; a synchronizer 7, having: a synchronization control input, electrically connected to at least the video cameras 1 to receive the vertical and horizontal scanning synchronization signals, - synchronization control outputs to the clock inputs of each one of the ADCs in module 2, - on / off for data feedback from PC 6; control and synchronization outputs for the address inputs of the multi-channel recorder 3, - control outputs and synchronization to the video and video image standards converter 4, and a control and synchronization output for the same and from here on the device designated stop. designate the system adjustment.
A high resolution monitor 8 may be connected to a second additional output of the video image standards converter 4 for direct demonstration of the television image (in particular, x-ray television) to the user of the visual information. The video cameras 1 may be conventional (for example, b on the VIDICON type q tubes) and b(which is preferable) to CCD arrangements, in particular of the Mintron Enterprises (USA) type MTV-1802, or the type Tek t onyx (USA) TK 2048 with 2048x2048 pixels with masked channel of three-phcontrol and a dynamic scale of 80 db (said arrangement measures 55.3x 55.3 mm and the pixel size is 27x27 μm). The video cameras of the first two types are preferable for high-speed x-ray television systems with a frame rate of not less than 25 frames per second. Video cameras of the third type are preferable for high resolution television systems for processing a large format of initial images with a minimum number of "seams" of the individual parts within the final integral image (for example, achieving the aerial or 'space photographs, in which the frame rate is not a critical parameter). Any suitable commercially available circuits, such as ADCs, can be used in module 2, for example,
Analog Device, USA, AD876; the use of a multichannel ADC with electrically isolated channels according to the number of video cameras 1 is also possible. The multi-pixel geometric distortion corrector 3 is described below in detail with reference to Figure 3. The video image standard converter 4 with RAM can be constructed b on the decoder 'multiple channel RAM, and multiple ores , as described below in detail with reference to Figure 4. The module 5 for accessing the video signal within the PC 6 can be constructed in the form of commercially available standard devices, well known to the specialists, for example the AVER series. Any suitable computer
(preferably b on Pentium processors) can be used as the high-speed PC.
The synchronizer 7, which is shown in greater detail in Figure 5 and described below in detail, can be performed based on the appropriate frame and the voters of the line sweep synchronization pulse and the appropriate control clock and the generators of I will say impulse; c - c ion, known to specialists in electronics. In the manner described, the television system; The proposed vision can be used as such for the needs, for example, of the electronic scope (in digital form) of the large format images (for example: aerial or ro or x photographs). And, finally, when the proposed tele vision system is used as a component of more complex systems (for example, x-ray diagnostic systems), it must have a converter 9 to convert the electromagnetic radiation from one frequency scale to another ( in particular, convert x radiation to visible radiation). This convector 9 typically has the shape of a fluorescent X-ray screen that is sensitive to x-rays without special design, or an optical or electronic x-ray transducer (XROET), or a flashing fiber optic board. At the same time, the objectives of all the video cameras 1 should be changed towards the spout 9 on its optical output side. Correspondingly a suitable primary radiation source 12 (in particular x-rays) must be provided in the system, placed at the optical input of the converter 9, the selection of which for the needs of genoscopy or radiography does not present any difficulties for the specialists. To facilitate the adjustment, especially in cases of alteration of the. number and / or relative placement of the video cameras 1 and / or their distance under the object under examination or observation and / or the converter 9, it is highly preferable that the following be included in the television system: calibration test 10 and a device 11 to place them in the field of view of the video cameras 1 during the alignment and adjustment of the television system and to remove them from the observation field of the video cameras 1 before they enter the mode of operation, connected to the synchronization control output of the synchronizer 7, and in order that the synchronizer 7 is connected to the PC 6 through the aforementioned data feedback circuit; the calibration test objects 10 comprise three-dimensional targets, which are described in greater detail below. Any suitable commercially available manipulator or projector can be used as the device 11 for placing and removing the test objects 10 for example, a standard x-ray film cartridge feeding mechanism that has an accurately accurate positioning accuracy (usually less than ± 1 mm). A more complex high resolution television system, which is preferable for the needs of x-ray diagnostics can be additionally equipped (see figure 2): with the digital video signal amplitude corrector 13, which is connected to the input of the multi-channel geometric distortion corrector 3, with inter-frame digital video signal accumulators 14, the number of which is usually equal to the number of video cameras 1 and which are inserted in the interval between the ADC module 2 and the digital video signal amplitude corrector 13, and with a multi-channel channel threshold controller 15. The multi-channel video geometric distortion corrector 3, wherein the number of channels equals the number of video cameras 1, is fundamentally a new module for the proposed television system in any of its possible embodiments, regardless of whether the specific area provides the use of calibration test objects 10 (three-dimensional vertical and / or horizontal objectives) during adjustment. This concealer 3 is designed to combine
("to join in points") the observation fields of the different video cameras 1 in a unified high resolution image field by eliminating the geometric distortions of the fragmentary images, which may be due to differences in the scales and the shape of such images without being noticeable when viewed separately and the inaccuracies in the assembly of individual video cameras 1.
In the simplest case, the individual optical parameters of the video cameras 1 and the geometric parameters of their specific relative arrangement must be taken into account in advance in said corrector 3 as factors that will be used later for the correction of video signals. or After that a more complicated version of the embodiment of the inventive conception has been shown, which provides the user with two three-dimensional objectives (vertical and horizontal) for the automatic adjustment of the television system. As it applies in such cases, the corrector 3 in each channel preferentially has in the middle (see Figure 3): two identical calculation circuits 16 for cale: ular codes for the coordinates Xc and Yc pixel pair of the image output , based on the codes of the original coordinates X and Y of the corresponding pixels of the image input and the correction factors, and two identical secondary memory modules
17 (possibly half a box, although preferably a full frame) for the digital video input, connected to the calculation circuits 16 as the sources for the directions for reading the information in the corrected elements of the video output . Each of the calculation circuits 16 has: an input comparator 18 with fixed value of the digital threshold code Ut connected to the output of one of the ADCs module 2; a decoder (DC) 19, connected to the address output (X or Y), of the synchronizer 7 and has two control outputs; two logic circuits AND (&) 20, each of which is connected to the output of the comparator 18 and to the control output Ustr of the synchronizer 7, and one of which is connected to the first control output of the decoder 19 and the second of which is connected to the second control output of the decoder 19; two non-volatile RAMs 21 (NRAM), in which: - the controller (1 reading - write ur and hence in the design "r / w") the inputs are independently connected to the outputs of the logic circuits AND (& 20), the address and data inputs are also independently connected respectively to the outputs X and Y of the synchronized 7 so that in the first and second RAM 21 of the first calculation step 16, the signal x is sent to the data inputs and the signal Y is sent to the address inputs, and vice versa in the third and fourth RAM 21 of the second calculation circuit 16: the signal Y is sent to the data inputs and the signal X it is sent to the address entries; the differential stage 22 with two data inputs separately connected respectively to the data outputs of the non-volatile RAMs (21) which is necessary to set the abscissa codes for the initial end Le (y) and Lb (y) in the first calculation circuit 16 and the codes of the final and initial ordinates He (x) and Hb (x) in the second calculation circuit 16 as the frame boundaries with respect to the test images of the three-dimensional objectives when the television system is adjusted; (preferably) a tabular normalizer 23 which provides integer division of the code for the digital readout of one of the input signals X or Y by the digital code of the constant adjustment of the geometric dimension of the undistorted frame L0 along the horizontal (or H0 to the long of the vertical) respectively for the first and second calculation circuits 16; a multiplier 24 to multiply the digital codes of the normalized coordinate X (or Y) by the digital code of the active dimension of the frame along the horizontal (or the vertical) and an addition 25 to add the digital codes of the coordinates of the origin of the representation of the distorted image field and the current increase in the coordinate of the processed image element (pixel) in the same frame. Each secondary memory module 17 has: two input multiplexers 26, each of which (the first MXX for the X coordinate and the second MXy for the Y coordinate) is designed for gene; the corresponding digital codes of the pixel coordinates of the input and corrected images, and connected to them are RAMs 27 (possibly half a box, but preferably full frame) to write the video input to an address and read the video output from another direction.
Together with the calculation circuit modules 16 and the secondary memory modules 17 described in detail above, the corrector 3 at the output of each channel has (see figure 3): an inverter 28, which is connected between the synchronizer aforementioned 7 and the control inputs of multiplexers 26 and RAM 27 of one of the secondary memory modules 17; an output multiplexer 29, which is designed for alternating connection of the outputs of the secondary memory modules 17 to the input of the video standard converter 4 with RAM. The number of outputs of decoders 19 ¡DC1 and DC2), logical circuits AND (&) 20 and non-volatile RAMs (NRAM) 21, shown in Fig. 3, corresponds to two lines of three-dimensional targets for each of the calibration test objects 10. With an increase in the number of lines in the targets, the number of such decoder outputs 19 and elements 20 and 2L must be increased accordingly, while between the outputs of RAMs 21 and the inputs of differential stages should include additional multiplexers, preferably of the same type as the multiplexers 26.
The video standard converter 4 with RAM (see figure 4) has: independent RAM banks, the number of which is equal to the number of video cameras 1 and in each of which are connected: - two address multiplexers ( MXA) and - two temporary frame memories 31; the control decoder 32 (DC) for RAM banks 10; the first digital-to-analog converter
(HRV DAC); Temporary RAM containing: - memory modules 34 connected in parallel (RAM l ^ - RAMN), the number of which is equal to the number of video cameras 1 and - the decoder 35 (DC CS) for the temporary RAM and the second digital-to-analog converter 36 (DAC TV). For each of the aforementioned RAM banks, the following is characteristic: in the time memories of frame 31, the data inputs (DI) are combined and connected to the corresponding outputs (U_.ll U_.12, .. U ? lN¡¡, U? 21, U? 22, .. U_.2NX, .. U? NyNx) of multiple channel geometric distortion corrector 3, while the data outputs (DO) are also combined (including also the memory banks) and are connected to the data input of the first digital-to-analog converter 33; in the multiplexers 30, the first inputs are combined and connected to the synchronization outputs of the synchronizer 7 with the codes of the coordinates X, Y to write the correct images to the frame 31 time memories, while the second inputs are combined also and connected to the synchronization outputs of the synchronizer 7 with the codes of the coordinates Xm, Ym for reading the correct images from the frame 31 frame memories; the first outputs of the first multiplexer are connected to the corresponding address inputs of the first frame buffer 31, while the first outputs of the second multiplexer 30 are connected to the corresponding address inputs of the second frame buffer 31.; the second control input (C) of the first multiplexer 30 and the second inverted control input (C \) of the second multiplexer 30 are connected to the control output of the synchronizer
7 (Urw); the first outputs of the multiplexers 30 are connected to the address inputs (A), their second outputs are connected to the selection control inputs (CS), and their third outputs are connected to the control outputs (r / w) of the corresponding RAMs 31. In all RAM banks, the first control circuits of the first and second multiplexers 30 are combined and connected respectively to the first, second, etc. decoder outputs 32. The control input of decoder 32 is. connected to the control output (U¿ic) of the synchro-node 7. In all RAM banks, the data outputs (DO) of the temporary frame memories 31 are combined and connected to the data input of the first digital-to-analog converter 33 (DAC
HRV). In the first digital-to-analog converter 33 (DAC-HRV): the first and second control inputs are respectively connected to the synchronization outputs (HHSI) and (HVSI) of the synchronizer 7, while the data output (Uout) ) is connected to the aforementioned high resolution monitor 8. In each memory module 34 (RAM 1_- RAM N) of the temporary RAM: the address inputs (A) are combined and connected to the synchronization outputs of the synchronizer 7 with the codes for the coordinates X, Y; the data inputs (DI) are connected to the corresponding outputs of the geometric distortion corrector of the multiple channel 3; the DO data outputs are combined and connected to the data input of the second digital-to-analog converter 36 and the control inputs (r / w) are connected to the control output of the synchronizer 7. In addition, the data input (DI ) of the last memory module 34 RAMN is connected to the corresponding data input (DI) of the frame buffer 31 (RAMNyNx).
The control inputs (Udoc) and (Uw) of the decoder 35 (DC SC) of the temporary RAM are connected to the corresponding control outputs of the synchronizer 7. The control outputs of the decoder 35 are connected to the selection inputs (CS ) of the memory modules 34 so that the first of said outputs is connected to the input of the prinier module 34, the second is connected to the input of the second module 34, etc. In the second digital-to-analog converter 36 (DAC TV): The data input is connected to the combined data outputs (DO) of the memory modules 34, the control inputs (HSI) and (VSI) are respective. are connected to the synchronization outputs of the synchronizer 7, while the data output Upc is connected to the module 5 to access the video signals within the computer. The synchronizer 7 has (see FIG. 5): a synchronization pulse selector 37, which is designed to extract the original synchronization pulses from the total input video signal (U_.ni) and to generate the line of saltation. outgoing (ie horizontal- HSI) and half-frame (ie vertical- VSI) synchronization pulses, and is connected: - through the input of the synchronization output of one of the video cameras 1, while - through the synchronization outputs
(HS) :) and (VSI) to the control inputs respectively of the digital-to-analog converter 36 of the video standards converter
4 c or p ~ RAM described above (shown in Figure 4); a frame pulse selector 38, the inputs of which are respectively connected to the line outputs (HSI) and the half frame synchronization pulses (VSI) of the selector 37, while the output üj._ is connected to the synchronization input of the multi-channel threshold controller 15 described hereinafter; a multiviewer counter T 39 (T), the input of which is connected to the output of the selector 38 while its output is connected to the control inputs of the multiplexers 30 of the video standard converter 4 with RAM (shown in figure 4); a drive generator 40 of the synchronization signals ("TV sync"), corresponding to the resolution standard of video cameras 1, the output (fi) of which is connected to the clock inputs of the aforementioned ADC modules 2 and the multi-channel threshold controller 15 and which is constructed, for example, based on the suitable commercially available quartz resonator; a generator of the codes for the cores]: X and Y dends not distinguished and without special design, which is built based on: - • - • counter 41 (CTX) to count the number of pixels per line of the image of each of the video camera 1, in which the counter input (+ 1) is connected to the output of the TV synchronization generator 40 while the restoration input (R) is connected to the output (HSI) ) of the synchronization pulse selector 37, and - the counter 42 (CTY) for counting the number of lines in the images formed by each of the video cameras 1, the input of the monitor (+ 1) of which the output (HSI) of the synchronization pulse selector 37 is connected;
an impulse generator 43 of the sin signals (chronization corresponding to the high resolution standard (HRV) of the high resolution image output synthesized and constructed, for example, based on a suitable commercially available quartz resonator; (CTXm) to count the number of pixels per line of the synthesized image, in which: - the counter input (+ 1) is connected to the generator output 43 (sync-HRV), the restoration input (R) is connected to the output (HSI) of the synchronization pulse selector 37, - the first output (Xm) is connected to the synchronization input (Xm), while - the 'second input (Udc) is connected to the input control of the video 4 standards converter with RAM as described above, a digital comparator 45 (HHSI): - connected through the data input to the second output (Udc) of the counter 44 (CTXm) to count the number of pixels by line of l in the image of the synthesized resolution and -; designed for sequential comparison of the codes for the coordinates (Xm) of active pixels in a line of the high resolution image synthesized with the fixed threshold code Nx of the coordinate for the end of 'the line of the specified image, determined by the number of video cameras 1 placed horizontally in a row; preferably, a monostable multivibrator 46, (HHSI) for the generation of line synchronization pulses for the video signal of the synthesized high-resolution image, in which: - the input can be connected to the control output of the counter 44 (CTXm) for counting the number of pixels per line of the high resolution image synthesized, while - the output (HHSI) may be connected to the control input of the aforementioned video standards converter 4 with RAM; the counter 47 (CTYm) for counting the lines of the high resolution image synthesized in which: - the counting input (+1) is connected to the output of the monostable multivibrator 46 (HHSI), - the restoration input (R ) is connected to the output (VIS) of the synchronization pulse selector 37 and - the output (Ym) is connected to the synchronization input (Ym) of the video standard converter 4 with RAM; a digital comparator 48 (HVSI) - is connected through the datcrs input to the output (Ym) of the counter 48 (CTYm) to cont. ar the number of lines in the high resolution image synthesized and - is designed for sequential comparison of the codes for the coordinates (Ym) of the lines of the high resolution image synthesized with fixed threshold code Ny for the coordinate of the end of a picture of the given image, determined by the number of video cameras 1 placed vertically in a column; preferably, a multistable monovibrator 49 (HVSI) for the generation of frame sync signals for the video signal of the synthesized high resolution image which may be connected: - through the input to the output of the comparator 48, while - through the output (HVSI) to the control input of the aforementioned video standards converter 4 with RAM; the counter 50 (CTUdoc) for controlling the reading from the temporary RAM of the video standard converter 4 with RAM when the synthesized image is accessed to the PC 6 in which the counter input (+ 1) is connected to the output of the monostable multivibrator 49 (HVSI); two logical circuits 51 AND (6) to execute the conjunction operation for the gene, ration of the control signals Ustr and Uc, env i. respectively: - to the multiple channel geometric distortion corrector 3 to switch the
Non-volatile RAMs (NRAM) for writing or reading modes of writing or reading the codes for the coordinates of the limits of the test images. do adjust the system and. - to interframe accumulators 14 to complete the accumulation when the system is adjusted. In order to do this, the first inputs of the logic circuits are combined and connected to the output (fi) of the drive generator 40, the output (Ust_) of the first circuit 51 AND (&;) is connected to the corresponding control input of the aforementioned geometric distortion corrector 3, while the output (Uc) of the second AND circuit (&) 51 is connected to the combined control inputs of the interframe accumulators 14; a multivibrator D 52, which is designed to synchronize the start of the generation and set the duration of the control signal Uc sent to the inter-frame accumulators 14, and in which: - the synchronization input (C) is connected to the output of the frame pulse selector 38, - the data input (D) is connected to the control output (Usn) of the multi-channel threshold controller 15 described in detail below, while - • the inverted output ( Q \) is connected to the second input of the second AND circuit (&;); an input register 53 (RG D) for the synchronizer 7 to receive the control commands sent from the PC 6, in the _c ua 1: - the parallel data input (D) is connected to the data bar of the PC 6, - the first output (U ") is connected to the restoration input (R) of the counter 50 (Ud? C) and the control input of the video standard converter 4 with RAM, - the second output (Uc_. b) is connected to the second input of the first AND circuit (&) and to the control input of the aforementioned device 11 to place the test objects in the observation field of the video cameras (see figure 2), and - the third output is connected to the restoration output (R) of the multivibrator D 52; an output register 54 (RG O) for outputting information on the status of the sicronizer 7 for the PC 6 in which: the first input is connected to the output (VSI) of the synchronization pulse selector mentioned above 37, second input is connected to the output of the counter 50, - while the output is connected to the data bar of the PC 6; an address decoder 55 (DC A) for the programmable port of the PC 6 for issuing the control commands to the synchronizer 7, in which: - the input is connected to the address bar of the PC 6, while - the output is connected to the input C of the input register 53. The multi-channel digital video signal amplitude corrector 13 as a whole is designed to 'equalize the video signals of the video cameras 1 with respect to the parameters of amplitude (usually with respect to the level of displacement and "black") mainly during prolonged radioscopic examinations or when monitoring surgical operations. This corrector 13 is a set of channels with isolated inputs, the number of channels of which is equal to the number of video cameras, and each channel (see figure 6) t i e n e: preferably two non-volatile RAMs 56
(NRAM1) and 57. (NRAM2) which are respectively designed to store the codes of the correction factors for the "black" level and the maximum displacement of the video signal for each pixel of the image input from the video camera 1 corresponding to the given channel; a differential step 58 for calculating the dif e; between the codes for the input signal U _. (x, y) and the "black" level Ub (x, y) for each pixel of the image input from the corresponding video camera 1; a divider 59 for calculating the normalized amplitude correction factors for the video input signals by dividing the constant setting (for the selected video cameras 1 and ADCs 2) the Umax code for the maximum displacement of the video signal by the variation code Uw (x, y) which corresponds to the maximum displacement: .mo of the video signal for each active pixel of the image input from the current video camera 1; an address decoder 60 (DC) for the programmable port of the PC 6 for outputting the control commands for the given channel of the digital video signal amplitude corrector 13, in which the input is connected to the address bar of PC 6; an input register 61 (RG) to receive the control commands that come from the PC 6, for which: - the first input is connected to the data bar of the PC 6 and the second input is connected to the output of the PC 6; address decoder 60, while - the outputs are connected to the control inputs (r / w) of the non-volatile RAMs 56 and 57 an output multiplier 62 to generate the codes for the normalized video output ücu (x, y) by multiplying the normalized factors mentioned above by the code of the difference signal. As previously stated, in the case of this preferred embodiment of the digital video signal amplitude corrector 13, in addition to that indicated, the aforementioned functional modules have the following external connections and interconnections: RAM 56 (NRAM1) is connected : - through the data input to the output of the corresponding channel of the aforementioned ADC module 2, - through the control input (r / w) haci. to the first exit of the entry register 61
(RG), RAM 57 (NRAM2) is connected: - through the data input to the output of the differential stage 58, - through the control input (r / w) to the second output of the data record input (RG), while through the address inputs, both RAMs 56 and 57 (NRAM 1 and 2) are connected to the output X, Y of the aforementioned synchronizer 7; the differential stage 58 is connected: - through the first input to the salt of the corresponding channel of the aforementioned ADC 2 module, - through the second input to the output of the RAM 56 (NRAMl), - through from the output to the first input of the multiplier 62; the divider 59 is connected between the RAM output 57 (NRAM2) and the second input of the multiplier 62. It is clear to the specialists that, in principle, they can be handled with a non-volatile RAM (NRAM) with insignificant losses in quality of amplitude correction. Each interframe accumulator 14 (see Fig. 7) has: two multipliers 63 and 64, which are respectively designed to multiply the code U? N (x, y) for each active pixel of the image input by the weighting factor A ._ and multiply the code U __ (x, y) for each pixel of the accumulated image by the weighting factor B) _; and the first input of the multiplier 63 is connected to the output of the corresponding channel of the aforementioned ADC module 2; an add-on 65 for calculating the weighted sum of the codes for each active pixel of the image input and the corresponding pixel of the accumulated image, in which the first and second inputs are respectively connected to the outputs of multipliers 63 and 64; a RAM module 66 for storing the codes U _. (x, y) of the pixels of the accumulated image, in which: - the first input is connected to the output of the adder 65, - the second input is connected to the outputs of synchronization of the aforementioned synchronizer 7 with the codes of the coordinates X, Y, - the third input is connected to the control output Uc of the aforementioned synchronizer 7, while - the data output U __ (x, y) is the output of the accumulator, interframe and is connected: - • - to the corresponding channel input of the aforementioned digital video signal amplitude corrector 13 (see figure 6), and - - to the first input of the multi licator 64; an address decoder 67 (DC) for the PC programmable port 6 to output the interframe accumulator 14 the codes for the weighting coefficients A], and Bk, in which the signal is connected to the address bar of PC
6; an entry register 68 (RG) to receive the codes of the weighting factors A | < and Bk, sent from the PC 6, in which the first one is connected to the PC data bar 6 while the second one (C) is connected to the output of the address decoder 67, the first output is connected to the second input of the multiplier 63, while the second output is connected to the second input of the mult. 64. Interframe accumulators can be easily selected by specialists from a wide variety of commercially available products of this type. The multi-channel threshold controller 15 as a whole is designed to control: (directly) the primary x-ray source 12 according to the allowable absorbed dose criteria and the required quality of the synthesized integral image, mainly in the radiographic examinations massive, and (through the synchronizer 7 mentioned above) the accumulators of interframe 14. This is a set of channels with isolated inputs, in a number of channels that is equal to the number of video cameras, and in which each channel ( see: figure 8) has: a first comparator 69 for comparing the pixels for the pixels of the image formed by the video camera 1 corresponding to the given channel with the threshold code U_; an AND circuit (&) 70, which is connected to the output of the comparator 69 through the first input and is designed to drive the pulse 'of the clock signal f i with the output signal of this comparator;
a counter 71, the count input (+ 1) of which is connected to the output of the AND circuit
(&) 70 and used to count the number of such pixels in the picture box corresponding to the video cam 1 connected to the given channel, the codes of which exceed the threshold U_; a register 72 (RG), the data input (D) of which is connected to the output of the counter 71 and which serves to store the parallel output code of this counter: a second comparator 73, which is connected to the output of the counter 71 through register 72 and serves for 'comparison of the exit code of this counter 71 with the threshold Un; an actuator 74 in which the input D is connected to the output of the comparator 73 and which serves to write the logic output signal of this comparator at the end of the synchronization frame pulse U k_. from the synchronizer 7 mentioned above. In addition, for all channels of the multi-channel threshold controller 15, the following general functional modules are provided, and s, e also show in Figure 8: an address decoder 75 (DC) for the PC 6 programmable port to emit towards the multi-channel threshold controller 15 the threshold codes U_., Un and 2 f in which the ent. ada is connected to the address bar of PC 6; an input register 75 (RG_D) to receive the codes for the thresholds Ui, Un and 1 2, sent from the PC 6, in which: - the first input is connected to the bar 2: a data of the PC 6 , whereas - the second input (C) is connected to the output of the address decoder 75, - the first output is connected to the first combined inputs of the aforementioned comparators 69 for all channels, while the second output is connected to the second combined inputs of the aforementioned comparators 73 for all channels; a multiplexer 77 (MX) for multiplexing the output signals of all channels, in which: - each data input is connected to the output of the actuators 74 of the corresponding channels, while • - • the control input is connected to the synchronization output of the synchronizer 7 mentioned above with the code for the X coordinate; an AND circuit (&) 78 to select the pulse of the clock signal f _. with the output signal of the multiplexer 77, in which: - the first input is connected to the output of the multiplexer 77, - the second input is connected to the second combined inputs of the AND circuits (&;) 70 of each of the channels of the multi-channel threshold controller 15 and is connected to the output of the driving generator 40 of the synchronization signals ("TV sync") (see FIG. 5), that is, to the output of synchronizer clock 7 mentioned above; a counter 79 for counting the number of channels for which the signals at the outputs of the actuators 74 have the logic level 1, and to which it is connected: - through the counting input (+1) to the output of the circuit AND (&) 78, while - through the restoration input (R) to the synchronization output Ukl of the aforementioned synchronizer 7 through the inverter 80; a comparator 81 designed to compare the output code of the counter 79 with the threshold Ui2 and connected: - through the first input of the counter output 79, - through the second input to the third output of the input register before mentioned 75 (RG_D), and - through the output to the non-specialized shown controller of the source 12 cié primary radiation (x-rays) (see Figure 2); an actuator 82 for recording and storing the output signal of the commutator 81, connected through the input D to the output of this comparator 81, through the clock input C through the inverter 80 the synchronization output Ukl of the previously mentioned synchronizer 7 (see figure 5), and - through the output Usn to the input D of the actuator 52 of the synchronizer 7 previously mentioned.
In addition, in each channel the following inputs are combined and connected together to the synchronization output U l of synchronizer 7 mentioned above: the restoration input (R) of each with 1: deco 71, the clock input (C) of each register 72, and the clock input (C) of each actuator 74; And, finally, the second inputs of the comparators 6'9 of all the channels of the multi-channel threshold controller 15 are connected to the corresponding data outputs Ocu? (x, y). . ÜCUN (x, y) of the aforementioned digital video signal amp 1 corrector 13. The vertical positioning test objects 10. ical (see figure 9) and horizontal placement
(see figure 10) of the three-dimensional lenses are similar in construction and contain a rigid rectangular board 83 made of x-ray transparent material, such as ordinary glass or ple iglás, and thin flexible conductors
(filaments) 84 made of material opaque to x-rays, such as steel, which are embedded in the board or spread on it. A rigid box can be used instead of the board. The format of the board (or box) 83 corresponds to the shape of the total field of vision, while its dimensions are greater than the dimensions of the total field of view of all the video cameras 1. The flexible conductors 84 are placed in advance of way that the field of vision of each one. of the video cameras is limited approximately during the adjustment, while after the adjustment is clearly delimited by two adjacent flexible conductors along the horizontal for the first test object 10 and along the vertical for the second object of test 10. In this case, each internal flexible conductor 84 (without being on an edge) simultaneously delimits the observation field of two adjacent video cameras 1 due to the partial overlap (up to 5%) of their fields of vision. In particular, one of the test objects has vertical flexible conductors Nx + 1 84 while the second test object has horizontal flexible coniuctors Ny + 1 (in the operating position) 84, where Nx and Ny are respectively the number of Video cameras 1 placed along the horizontal and vertical in the form of a three-dimensional grid. In this case, the product Nx * Ny = N, ie the total number of video cameras 1. In figures 9 and 10, as an example, diagrams for the calibration test objects 10 are shown for the cases when Nx = 3 and Ny = 3 and N = 9"Regardless of the specific embodiment of the inventive conception, the use of the proposed high-resolution television system involves the following: preparation for the operation by at least the adjustment of the corrector -of geometric distortion 3 to produce certain correction factors, and the proper operation provided by the formation of the fragmentary video input signals' of the video cameras 1 of a video output signal, corresponding to the integral image and, as necessary, digital recording of the video output signal for subsequent analysis. Preparation for the operation begins with the mounting of the video cameras 1 on an arbitrary rigid support so that their fields of vision partially overlap, while their aggregate field of view overlaps the area of the i-gen converter 9. In the simplest case, when the composition and structure of the proposed television system corre- sponds mainly to Figure 1 and when modules 10, 11 and 12 are not included in it, the geometric distortion corrector 3 must be adjusted in advance. by the operator. In order to do this, all video cameras 1 must be examined on a test table (which is a trivial matter for assembly specialists) and the geometric distortions intrinsic to each of them must be determined quantitatively. Based on the data obtained, using a known algorithm (such as the algorithm for minimizing the mean square deviation of an image observed from the required image), taking into account information about the relative arrangement of the video cameras 1 within a individual unit, the distance of the observed object and, as necessary, factors such as the average luminance of the observed object, the correction factors must be calculated for the elimination of the geometric distortions and the correction of the video output signal. The correction factors obtained afterwards should be written into the non-volatile memory of the geometric distortion corrector 3, which makes it possible to proceed from the adjustment to use the proposed television system specifically under the conditions for which the video cameras 1 were examined and the correction factors were calculated. The essence of the correction for geometrical differences and the meaning of the calculations will become clearer from the detailed description of the algorithm for the automatic adjustment in a more complicated but preferable case, when the proposed television system corresponds to the figure 2 and is mainly used as an x-ray television system for real-time monitoring of physiological processes (principally rapid). In this case, the preparation for the operation involves the automatic adjustment of the geometric distortion corrector 3 and pr efer ibl ement the digital video signal amplitude corrector 13. The automatic adjustment of the corrector 3 starts with the placement of the vertical and horizontal calibration test objects of x-ray contrast 10 between the image converter 9 and the source 12 of main x-ray radiation according to the PC command 6, sent through the synchronizer 7 to the device 11. The video cameras operating synchronously 1 read the image formed by the converter 9 over its entire area with partial mutual overlap of the fields of view of the individual video cameras 1. The shadows from the flexible conductors 84 of the test objects 10 (see figures 9 and 10) in the field of view of each video camera 1 are in the form of fine lines (usually two): respectively vertical is for each video camera 1 in each horizontal row, and horizontal for each video camera 1 in each vertical row. The distances between the lines are determined res ectively by the expressions: L-L / Nx (1) where L is the horizontal dimension of the total image field; Li is the horizontal distance between the lines Nx is the number of video cameras 1 in a horizontal row, and where H is the vertical dimension of the total image field; Hi is the vertical distance between lines Ny is the number of video cameras 1 in a vertical fil. The lines of each test item partition 10 of the image field in rectangles, for each of which corresponds the field of view of one of the video cameras 1. The optical systems of the video cameras 1 are consecutively aligned and the video cameras 1 are fixed so that in the field of view of each of them when the first test object 10 is observed, the vertical lines are located near the left and right boundaries, while the horizontal lines are located near the upper and lower limits of the field of vision.
The video signal of each video camera 1 in the corrector 3 is sent to the two comparators 18 corresponding to it (see figure 3), which compares the code of the video signal with the fixed threshold code Ut and detects respectively the vertical and horizontal lines (the limits of the frame) in the images of the test objects 10. In this case, the first decoder 19 limits the area of protection for the initial and final lines on the images of the objects test 10 with respect to the X coordinate, and the second decoder 19 does the same with respect to the Y coordinate. When the comparator 18 detects a line (a shadow from the flexible conductor 84) in a specific area, the control signal Ustr generated by the synchronizer 7 through the AND circuit (&) 20 is sent to the control input (r / w) of the non-volatile RAMs (NRAM) 21. In this case, the first and second NRAM 21 respectively set the abscissa initial Lb (y) and end Le (y) of the frame boundary with respect to the first test object 10, while the third and fourth NRAM 21 set the initial ordinates Hb (x) and the final He (x) of the limit of the frame with respect to the second test object 10. To do this, the synchronizer 7 sends the code for the coordinates Y to the address inputs of the first and second NRAM 21 and, on the other hand, sends the code for the X coordinate to the data inputs of the first and second NRAM 21, while sending the code for the coo i 'X to the address entries of the third and fourth NRAM 21 and, on the other hand, send the code for the Y coordinate towards the data inputs of the third and fourth NRAM 21. After the values Lb (y), Le (y)? Hb (x) and He (x) have been recorded, the device 11 removes the last calibration test objects 10 from the field of view of the video cameras 1, the control signal Ustr generated by the synchronizer 7 switches all the NRAMs 21 for the reading mode, and the automatic adjustment of the corrector 13 is terminated. The values of Lb (y) and Le (y) then serve to correct a fragment of the image output by calculating the Xc coordinates of the pixels along the horizontal and the values of Hb (x), He (x ) serve to correct a fragment of the image output by calculating the coordinates Yc of the pixels along the veri: ical. The essence of such correction, necessarily in any possible modes of operation of the proposed television system, mainly reduces the implementation of the following operations. The codes for the coordinates Xc and Yc of the pixels of the corrected image are calculated by differential stages 22, tabular normalizers 23, multipliers 24 and addresers 25 of the first and second aforementioned calculation circuits 16, respectively according to the following algorithm: ^ Xc (y) -X (y) * (Le (y) ~ Lb (y)) / L0 + Lb (y), (3) Xc (x) -Y (x) * (Le (x) -Lb (x)) / H0 + Lb (y), (4) where L0 and H0 are respectively the vertical and horizontal undistorted dimensions of the images for the video camera 1. The pixel codes for the corrected image U c (x and y) are read from RAM 27 of one of the two secondary memory modules 17 according to the calculated coordinates Xc and Yc. Simultaneously with the reading, the codes for the pixels of the original image (U _. (X, y) are written for the RAM 27 of the second secondary memory module 17 in the X and Y directions, sent from the synchronizer 7 The addresses for writing and reading from RAM 27 of the first and second secondary memory modules 17 are generated by the multiplexers 26. The multiplexers 26 and RAM 27 of the first secondary memory module 17 are controlled by the Urw signal of the synchronizer 7, while the multiplexers 26 and RAM 27 of the second secondary memory module 17 are controlled by the inverted signal Urw from the outputs of the inverters 28. In this case, the first and second secondary memory modules operate in the opposite phase: when the first modules are reading the pixel codes of the corrected image from the Xc and Yc addresses, the second modules are writing the codes for the pixels of the original image to the X and Y directions, and vice versa. The alternation of the "read-write" cycles occurs at a frequency equal to the frame rate of the video cameras 1.The output multiplexer 29 multiplexes the signal from the RAM outputs 27 of the first and second secondary memory modules 17 according to the logic level (0 or 1) of the Urw signal of the synchronizer 7. As noted above, after adjusting all the channels of the geometric distortion corrector 3, it is advisable to adjust the digital video signal amplitude corrector 13 (see figure 6) edinely. When said adjustment is initiated, the source 12 of primary radiation (x-rays) is turned off. The ADC 2 module for each of the video cameras 1 generates the codes for the readings (mi n) U __ (x, y), which correspond to the "black" level of the video output signal. In each channel of said corrector 13, according to the control commands from PC 6 sent through the input register 61 (RG) for each pixel of the fragmentary image the codes are written to the non-volatile RAM (NRAM) 56 of according to the X and Y directions that are generated by the synchronizer 7. Therefore, in all the channels of the corrector 13 they provide the writing of such codes for the entire image field. After writing, the non-volatile RAMs (NRAM) 56 on all channels of the corrector 13 are switched to the reading mode according to the command of the PC 6. Then said codes will be used directly as correlation factors Ub (x, y), which determine the "black" level in correction of the fragments of the integral video output signal. Analogically, after connecting the source 12 of primary radiation (x-rays), the ADC 2 module for each of the video cameras 1 generates codends for the readings, which correspond to the maximum displacement of the output signal of video. Then on each channel of the corrector 13, according to the control commands from the PC 6 sent through the input register 61 (RG) the following occurs for each pixel of the fractional image: in the differential stage 58: subtraction (max) U '_ (x, y) - [(min) ü_ (x, y) -Ub (x, y)], whereas in non-volatile RAM, (NRAM) 57, the difference between the codes it is recorded in accordance with the X and Y directions, which are generated by the synchronizer 7. Accordingly, in all the channels of the corrector 13 provision is made for writing such codes for the entire image field. The differences obtained will be used during the correction according to the correction factors Uw (x, y), which determine the maximum displacement of the fragments of the integral video output signal. After those factors have been written to RAM 57 of all the channels, those RAMs according to the commands from the PC 6 are switched to the reading mode, and the settings of the digital video signal amplitude corrector 13 are canceled. na The essence of amplitude correction, which is necessary when using the proposed television system for x-ray diagnostics of parts of the human body that have different X-ray transmission coefficients and especially when using automatic dose control Radiation (and in the remaining cases, it is only desirable), involves the following. In each channel of the video signal amplitude corrector 13, for each point with coordinates (X, Y) of the images formed by each video camera 1, the following operations must be performed as specified by the expression: Ucu (x y) -ü_ (x, y) -Ub (x, y)) * Umax / (uw (x, y) -Ub (x, y)) (5) where Ucu (x, y) is the signal of corrected video in the output of the corrector 13; U _. (X, y) is the code for the video signal in the input -of the corrector 13; Umax is the code for the maximum displacement of the video signal for the synthesized integral image; Ub (x, y) and Uw (x, y) are the codes for the correction factors, the physical meaning of which and the methods to obtain them are given above. The subtraction of the code for the video input signal U _. (X, y) of the corresponding code for the "black" level (such as the correction factor Ub (x, y), read from RAM (NRAM) 56 non-volatile , is made in the differential stage 58. The execution of this operation with the video output signals of all the video cameras 1 makes it possible to set an individual value for the code for the "necro" level for the video signal of the Synthesized integral image.
The result of the entire division of the code for the maximum displacement of the video signal for the integral image synthesized by the code for the maximum displacement of the fragmentary video signal (the correction factor Uw (x, y), read from the non-volatile RAM 57 (NRAM) is sent to the multiplier 62 from the output of the divider 59. Therefore, the divider 59 and the multiplier 62 reduce the fragmentary video signal to a common scale, which corresponds to the video signal In the operating mode, the proposed high-resolution television system can function as follows: In the simplest case, such as when high-resolution television images of the surface of the earth are formed on the basis of To cartographic images or photographic film "obtained by aerial or space photography, the original image is projected directly onto the optical systems of the video cameras. module ADC 2 converts the video output signals of the video cameras 1 corresponding to the fragmentary images, to the digital form in the common way and supplies them to the inputs of the geometric distortion corrector 3. This corrector 3, as shown in FIG. described earlier, eliminates those distortions of video signals from fragmentary images that hide their
"points" in an integral image with no visible boundaries between the fragments. The synthesis of the high resolution integral image occurs in a video standard converter 4 with RAM (see figure 4), for which the corrected fragmentary video signals are sent from the corrector 3 through the combined data inputs ( DI) of all the frame temporary memories 31 of the independent RAM banks. The formation of the high resolution integral image starts with the parallel writing of the video signals to the first frame memories 31 in the X and Y directions, supplied from the aforementioned synchronizer 7 through the first of the multiplexers of address 30. To do this, the control decoder 32 for the RAM banks generates control signals and sends them to each of the first RAMs 31 through the first multiplexers 30 that correspond to them. Accordingly, for those signals at the inputs (r / w), the first RAMs 31 to switch to write mode, while the signals at the inputs (CS) maintain the outputs (DO) of the same RAMs 31 in a state high impedance (Z). Therefore, each frame temporary memory 31 registers the first active frame of the corrected television imacfen of the corresponding video camera 1. The next active frame of such an image will be analogically written to the second frameless textual memory 31 of all the independent RAM banks', with the distinctions that the signals of the X and Y addresses from the aforementioned synchronizer 7 and the aforementioned cont or 1 signals from the decoder 32 will be supplied through the second address multiplexers. . In the same period, the first frame 31 temporary memories of all independent RAM banks will operate in sequential read mode to read the fragmentary corrected video signal lines of the previous frame according to the Xm and Ym addresses. , supplied by the synchronizer 7 through the first address multiplexers 30. In this case, the outputs (DO) of the first frame memories 31 are sequentially switched to the active state by the control signals which are supplied to the inputs (CS) of the aforementioned decoder 32 through the first corresponding multiplexers 30. The sequential reading is made as follows: when the first line of the picture frame of the aforementioned video cameras 1 starts to be written to the second frame memories 31, simultaneously the outputs are switched to the state active in the first frame buffer 31 of the RAM bank corresponding to the video camera 1 located in the first column and the first row, and the first line of the preceding frame written therein is read; then the outputs (DO). of the first frame buffer 31 are switched to the high impedance state, and the outputs are switched to the active state in the first frame buffer 31 of the next RAM bank, which corresponds to the video camera 1 located in the second column and the first row, and the first line of the preceding frame written on it is read;
the operations are repeated until the first lines of the preceding table are read from the first frame memories 31 of all the RAM banks corresponding to the video cameras 1 which are located in the first row; again the outputs (DO) are switched to the active state in the first frame buffer 31 of the RAM bank, which corresponds to the video camera 1 located in the first column and the first row, and the second line of the preceding frame is read; During parallel writing of the first line of the active frame to the second frame memories 31 of all RAM banks, the number of lines Ny (which is equal to the number of rows of video cameras 1) are read from the first frame 31 temporary memories of those RAM banks corresponding to the video cameras 1 located in the first row; when the second line of the active frame is written for the second frame 31 temporary memories, it is started by switching the outputs (DO) of the first frame 31 temporary memories to the active state and the reading of the lines of the preceding frame is presented in an analogous way, although starting from the line (Ny + 1); after the reading of the first temporary memories of table 31 of the RAM banks corresponding to the video cameras 1 located in the first row has been completed, the lines of the preceding table are read analogously from the RAM banks corresponding to the second row of video cameras 1 and so on. Then the parallel writing of the third and sub-active tables and the sequential output reading of the second and subsequent active frames of the corrected television images of the corresponding video cameras 1 are repeated many times, with alternation of the first and second time memories of participants table 31 of all independent RAM banks. Then the digital-to-analog converter 33 (DAC HRV) converts the digital code that corresponds to the integral high-resolution image supplied from the DO outputs of the temporary frame memories 31 to the analogue video signal U0ut • Simultaneously with the writing to the frame 31 temporary memories, the temporary memory RAM modules 34 (RAMl -_... RAM N), in accordance with the signal Uw of a logic level supplied by the PC 6 through the synchronizer 7 write in parallel the Fragmentary video signals corrected from the video cameras 1 for their subsequent input into the PC 6. In this case, the outputs (DO) of the memory module 34 are in the state of a 11 to impedance according to the control signals from the outputs of the RAM temp) oral 35 decoder (DC CS). When the high resolution image written to the temporary RAM is accessed, on the other hand, within the PC 6, the modules 34 are switched to the reading mode by the Uw command of the other logic level, and the control signals from the outputs of the decoder 35 alternately switch the outputs (DO) of those modules 34 to the active state. The video output signal of the video standard converter 4 with RAM is sent through the module 5 to the PC 6 for documentation, file or display on its own monitor (for inspection) and / or on the high resolution monitor 8
(pair "to online inspection or preliminary visual determination).
For the described application of the proposed television system, the system control functions are successfully handled by the PC 6 and the intruder 7, in which (see figure 5): a) the selector 37 extracts the synchronization-original pulses from the total telephone input signal U_.n? and based on those general impulses: the HSI output line and the half-frame VSI synchronization pulses used later in the digital-to-analog converter 36 of the aforementioned video standards converter 4 with RAM to generate the television signal.; total vision, sent to module 5 to access PC 6; b) the frame synchronization pulse selector 38 and the multivibrator 39 generate the control signal Urw for the address multiplexers 30 of the aforementioned video standards converter 4 with RAM for generation in this with ertidor (see figure 4): read and write addresses, control signals for the operating modes of the frame 31 temporary memories, including microcircuit selection commands (CS! and commands of 1 ec tur a / es cr it ur a (r / w), and control signals for input multiplexers 26 and RAM read / write modes 27 in the secondary memory modules 17 of the aforementioned geometric distortion corrector 3; c) the television synchronization generator 40 generates the clock signal flr which is sent: to the aforementioned ADC 2 module to set the synchronization of the "logical to code" conversions in the analog-to-digital converters included in this module. e module and for the counting input of the counter 41 to generate the codes for the abscissa X of the image pixels in the video cameras 1; d) counter 42, according to the signals of the synchronization pulses HSI of the synchronization pulse selector 37, generates the codes of the Y-ordinates of the image pixels of the video cameras; (then said codes for the X and Y coordinates are sent: - to the address multiplexer data entries 30 as addresses for writings to the frame temporary memories 31 in the operational mode, to the address entries of rnó du -Lo 34 of the aforementioned converter 4 at the input of the video signal of the synthesized image towards the aforementioned PC 6 through the input module 5 and - towards the aforementioned geometric distortion corrector 3, which includes: calculation circuits 16, the data inputs of the encoders is 19 for the generation of the control signals for the 1 ec t ura / esc ri t ur a modes of the non-volatile RAMs 21 (NRAM) and for the address entries of those RAMs 21 for reading the values Lb (y), Le (y), Hb (x), and He (x) recorded during the adjustment, which are necessary in the calculation of the codes for the coo i "corrected detas Xc and Ye in oper mode ativo, and - towards the secondary memory modules 17, for the multiplexer inputs 26 for the gene; ratio of the addresses for writing the codes of the video signals of the video cameras 1 in the operating mode);
e) the counter 44, according to the signals from the sync-HRV generator 43 generates the codes for: - the abscissa Xm for the pixels of the synthesized image and - the control signal Udc, sent to the decoder 32 for controlling the RAM banks of the aforementioned video standards provider 4 with RAM, for the selection of the RAM bank when reading the previously written codes for the pixel images of video camera 1 in the formation of a high resolution integral image in the operational mode; f) the HHSI comparator 45 and monostable monovibrator 46 HHSI generates the line synchronization pulses (HHSI) for the video signal of the synthesized image; g) a counter 47 according to the line synchronization pulse signals (HHSI) from the output of the monostable multivibrator 46, mentioned above, generates the codes for the ordinates Ym for the pixels of the synthesized image, which together with the The aforementioned codes for the abscissas Xm for the pixels of this image are sent to the data inputs of the address multiplexers 30 of the aforementioned video standards converter 4 with RAM for the read addresses from the frame 31 frame memories the operating mode in the fornation of the integral synthesized image of the aforementioned monitor 8; h) the 48 HVSI comparator and the 49 HVSI monostable multivibrator generate the frame synchronization pulses (HVSI) for the video signal of the synthesized image, which together with the line synchronization pulses (HHSI) mentioned above from the output of the aforementioned monostable multivibrator 46, are sent to the analog converter 33 of the aforementioned video standard converter 4 with RAM for training n the operating mode -of the total television video signal Uout of the high resolution integral image synthesized; i) a counter 50 according to the signals from the frame synchronization pulses (HVSI), generates the control signal Ud0c, sent to the decoder 35 of the temporary RAM for selection of the memory module 34 which is active in the specified time for accessing the video signal of the integral synthesized image to the aforementioned PC 6; j) register of the input 53, according to the synchronization signal of the address decoder 55 (DC A) for the PC programmable port
6, receives the commands from this PC and on the basis of those commands generates: the control signal Uw that allows the input of the video signal of the high resolution integral image synthesized to PC 6, which is sent to the above mentioned video standards converter 4 with RAM, the control signal Ucib for driving the adjustment mode, which is sent: - to the aforementioned device 11 for starting the positioning of the aforementioned calibration test objects 10 in the field of view of the video cameras 1 (during the automatic adjustment of the television system), and - the AND circuit 51, which is based on this signal, generates the control signal Ustr, env :. to the geometric distortion corrector 3 to switch the non-volatile (NRAM) to write the mode of writing of the codes for the coordinates of the limits of the images (during the automatic adjustment of the television system); k) the output register 54 sends to the PC
6 mentioned above a frame pulse (sync) signal generated by the frame pulse selector 38, and the control signal Ud0c from the output of the aforementioned counter counter 50. The operation of the other modules of the synchronizer 7 will be described below as it applies to other possible operating modes of the proposed television system, mainly for the needs of x-ray diagnostics, when it is advisable to use interframe accumulators 14 and multiple channel threshold controller 15 in order to increase the quality of the integral images . This mode is motivated, for example, by the requirement of automatic adjustment of the system for radioscopy monitoring of surgical operations using probes. In fact, in the preparation of the (x-ray) television system for such operations it is frequently necessary to change the relative arrangement of video cameras 1, taking into account the required configuration and the operational field area.
Since the effectiveness of such operations depends markedly on the accuracy with which the position of the probe in the patient's body is determined, as well as the geometric correction quality displayed on the monitor 8 (ie the fait of visible seams between Therefore, the effectiveness of the geometric distortion corrector 3 operation depends considerably on the accuracy with which the correction factors Ub (x, y) and Uw (x, y ) are determined in the digital video signal amplitude corrector 13. However, it is known that even when the x-ray source 12 is deactivated, the video signals U? n (x, y, t) after the ADC module 12 they are represented by the sum: U-.n, y, t) = Ub (x, y) + Un (x, y, t), (6)
Where Ub (x, y) is the constant component of the "black" levels (which for different pixels of the image from one of the video cameras 1 and even for different video cameras 1 may have insignificantly different values), and Un (x, y, t) is the fluctuating component, due to the noise in the radiation source 12, the converter 9 and the video cameras 1. When 'the video source is turned on (during the adjustment or when the television system is working in "vacuum"), the signal U? n (x, y, t) will be determined by the expression: U? n (x, y, t) = Uw (x, y) + Ub (x, y) + Un (x, y, t), (7)
Where Uw (x, y) is an essentially constant quantity for a specific video camera, which corresponds to the maximum displacement and defined as the product Kw (x, y) * UmaX where Umax is a signal corresponding to the maximum luminance of the image, in tant. or that Kw (x, y) is the attenuation coefficient
(typically less than unity), which is due to the slight lack of uniformity in the magnitude of the flow from the source 12, the lack of uniformity of the converter 9 and the transmission coefficients of the optical systems of the video cameras 1 and that they are automatically terminated and taken into account when the television is turned on; Ub (x, y) and Un (x, y, t) are the same as in (6). Using the mathematical model formation well known to specialists and / or explicimentally, it is not difficult to determine by ant: '. These coefficients average Ak and Bk = 1-A respectively for the input of U? n (x, y) and the output signals U _. (x, y) of interframe accumulators 14; when they are used, the effect of said components on the quality of the signals U ± (x, y, t) on the input of the video signal amplitude corrector 13 (and later, on the input to the distortion corrector geometric 3) will be attenuated ancial. Codes for said coefficients are set in the memory of PC 6 mentioned above. During automatic adjustment or when using the tel system; proposed view in most operating modes, their codes for the coefficients Ak and Bk, according to the control signal from the address decoder output 67 for the programmable port of PC 6, are sent for writing to the registers of entrance 68 of each of the inter-frame accumulators 14. Then in the recirculation circuits without special designation of the inter-frame accumulators 14, each of which are assembled based on two multipliers 63 and 64, the adder 65 and the RAM module 66 (see figure 7), the input signals U__n (xy) that comes from the corresponding salt of the aforementioned ADC module 2, is multiplied by the coefficient Ak and are added to the input signals U __ (x, y) of the digital video signal amplitude corrector 13 that has been multiplied by the coefficient Bk which reduces the quality of synthesized high resolution images. In order to control the interframe accumulators 14 during the adjustment of the vine system or proposed especially in the radiography operation mode, it is advisable to use a multi-channel threshold controller 15 (see FIG. 5). In fact each radiogram, written to PC 6 in the form of a high resolution digital video signal, should provide the reconstruction of an image quality that will be close to the quality of the images in wide format x-ray film. At the same time, it is desirable that this quality can be achieved at a time other than the typical exposure time for radiography procedure. Of course, minimizing the exposure time (and the dose of ionizing radiation absorbed by the patient) can not always be achieved only by selecting the video cameras 1 with adequate sensitivity. It is therefore desirable after a sufficient average of video signals in the inter-frame accumulators 14 to rapidly "freeze" the sat: fragments. sfactorios of the integral video output, to record them and to turn off the x-ray source 12. In order to do this, three thresholds are set in advance (before the first radiographs session): The minimum luminance threshold of the fragmentary video signals, which is selected as a fraction (preferably at least a quarter, but not more than a half) of the maximum displacement of the video signals of the video cameras 1 used within the video system. tele: vision and for which the code corresponds The maximum one as the maximum permissible number of pixels in each fragmentary image with less luminance than the specified code U i
(usually selected within the range of 20-35% of the total number of pixels in that image), and threshold A, which specifies (usually within the range of 15-35%) the number of channels M outside the number of channels N, wherein the number of pixels with luminance less than the specified code Ui is less than the pixel threshold number Un. Those thresholds are used later as follows. The fragmentary video signals UCui (X / -y) - - - UcuN (x, y), corrected in the digital amplitude corrector 13 are sent to the first inputs of the comparators 69 of the corresponding channels of the threshold controller. multiple channel 15, then the parallel code of the threshold Ui is sent to the second inputs of all the comparators 69 from the PC 6 previously mentioned through the input register 76 (RG D). Then in each channel: The signals in comparator 69 and the output of circuit AND 70 take logical level "i" when the following condition is satisfied:
The counter 71 counts the number of pixels of the fragmentary image, for which the expression (8) is valid, and consequently the luminance of which is smaller than the threshold value, the pulse sequence Ukl at a frequency equal to the speed of cu r or of the exp 1 television sentence and comes from synchronizer 7 mentioned above, restores the cont. 71, the pulses counted in the time required for a frame to pass are written in parallel to the register 72 at the end of the frame, to the first and second inputs of the comparator 73 respectively, are sent: as the signal of the counter 71 from the register 72, and the threshold code A of the PC 6 from the input register 76. The logic signal "] _ - in j_a output of the comparator 73 means that in this channel the required exposure time is maintained. The logic signals from the outputs of the comparators 73 of all the channels, through the actuators 74, at the end of the frame of the fragmentary video signal are sent to the inputs of the multiplexer 77, common for all the channels, for the input of control to which is sent the signal X from the synchronizer 7 previously mentioned. The counter 79, at a frequency equal to the frame rate of the video cameras 1, counts the number of channels in which the exposure is terminated. The comparator 81, towards one of the inputs of which the threshold code U is sent through the input register 76 from the PC 6, generates a logic signal "i" when the exposure is terminated in M channels out of N The output signal Usr of the comparator 81 sent to the controller from the aforementioned x-ray source 12 in order to turn it off. At the end of a frame, the output signal of the comparator 81 is rewritten to the actuator 82 and is sent to the aforementioned synchronizer 7 which generates a control signal for conrouting the interframe accumulators 14 to the memory mode and generation in its outputs of the signals for the "frozen" frequency images, which are sent to the PC 6 for storage and subsequent reconstruction and analysis of the high resolution integral image. For the synchronization of the operation of the modules for the proposed television system in its complete configuration, the synchronizer 7 (see figure 5), together with the aforementioned, receives and emits a series of additional signals, which synchronize the termination of the accumulation of an integral number of frames of fragmentary video signals in inter-frame accumulators 14 with frame synchronization pulses, and specifically: The -D input of the multivibrator of 52 receives the control signal Usn from the output of the channel threshold controller multiple before menu 15, a sequence of frame synchronization pulses from the output of the frame pulse selector 38 in the synchronizer 7 is sent to the clock input C of the same multivibrator -D 52, along the edge previous to each synchronization pulse of said sequence, this multivibrator "D 52 is set to a logic level corresponding to the control signal Usn, and is restored after each write operation (or in each drive) according to the commands that come from the PC 6 through the input register 53 of the synchronizer 7 to the -R input of this multivibrator D 52.
A signal from the inverted Q \ output of the multivibrator * D 52 is sent to the first input of the AND circuit 51 and a signal fi from the output of the aforementioned television synchronization generator 40 is sent to its second input. Therefore the control signal Uc is gene; This is a sequence of pulses with a fiy signal frequency that provides the accumulation of fragmentary video signals in inter-frame accumulators 14 (for the lower logical level of the Ugn signal) and the acquisition of a frozen fragmented image fed considerably noise (for the high logical level of the Usn signal).
Apply Commercial Capability
The commercial ability of the proposed high resolution television system is determined first by the possibility of manufacturing it based on the elements of the state of the art in various configurations, and secondly the possibility of application for integral image synthesis (without visible seams) with high resolution from fragmentary video signals of an ordered set of standard video cameras, which makes it possible to use such a system for the needs of, for example, cartography, and in combination with a source of x-rays for the needs of functional x-ray diagnosis, as demonstrated in detail above.
Claims (14)
1. A high-resolution television system that has at least two video cameras, an analog-to-digital converter module (ADCs), a video standards converter, internal memory (RAM), devices for synthesizing the output signal video connected to the output of the video cameras and interconnected, and a central processor based on a PC, distinguished by the fact that the synthesizers of video output are based on a corrector. of geometric distortion of the multiple channel and a synchronizer; The corrector is at the same time connected through the ADC module to the outputs of the video cameras and through video and RAM standards converters to the PC input, while the synchronizer is connected through the PC. its control input to the synchronization output of at least one of the video cameras and through its control outputs to the clock input of the ADC module, pair to the address inputs of the corrector and to Turn on the control and synchronization control inputs of the video standards converter.
2. The television system, according to claim 1, distinguished by the fact that it is equipped with a primary radiation source (x-rays) and a converter of the x-ray image to a visible image that are mounted in series with the video-cameras.
3. The television system, according to claim 1, distinguished by the fact that it is equipped with at least one calibration test object in the form of a three-dimensional lens that can be placed in front of the video cameras during the adjustment of the system.
4. The television system, according to claim 3, distinguished by the fact that it is equipped with a device for placing the calibration test subjects in the field of view and removing them from the field of vision of the video cameras, connected to the timing control output of the synchronizer while the synchronizer is interconnected with the PC in addition to a feedback control circuit '.
5. The television system, according to claim 1, distinguished by the fact that it is equipped with a high resolution monitor, which is connected to the data output of the video and RAM standards provider.
6. The television system, according to claim 1, distinguished by the fact that the multi-channel geometric distortion corr ector has, in each of the channels: at the input: - at least two identical computing circuits to generate the corrected coordinates along the horizontal and the vertical, respectively, of each of the elements (pixels) of the image in the video output signal, calculated based on the initial coordinates of the analog pixels of the image in the input video signal and the correction factors; at least two identical secondary memory modules for the digital video input signal, connected to the calculation circuits as the sources of the addresses for data readings in the corrected pixels of the video output signal while in the output: - an inverter, which is inserted between the synchronizer indicated above and one of the secondary memory modules, and an output multiplexer for the alternating connection of the outputs of the secondary memory modules to the input of the standard converters. video mentioned above and RAM.
7. The television system, according to claim 6, distinguished by the fact that: each of the calculation systems has at least: - an input comparator with fixed threshold digital code connected to the output of one of ADCs, - a decoder connected to the address output for the pixel coordinates of the input image of the aforementioned synchronizer, and that has two control inputs, - two logical AND circuits, each of which is connected to the output of the comparator and to the control output of the synchronizer, and one of which is connected to the first and the other at the next control output of said decoder. - two non-volatile RAMs, in which: - the control inputs are independently connected to the outputs of the respective AND logic circuits and - the address and data inputs are also independently connected in a respective manner to the address inputs of the synchronizer 'mentioned above; - a decoder, connected to the output of one of the coordinates of each of the pixels of the input image from the previously mentioned synchronizer (in the process, to the signal corresponding to one of the coordinates of each of the pixels of the input image is sent to the data inputs of the first and second RAMs, non-volatile of the first calculation circuit, to the signal corresponding to the second coordinate of each of the pixels of the image of input 11 e? ja in the address entries of the same RAMs, while said signals are sent in reverse order to the corresponding inputs of the first and second non-volatile RAMs and to the decoder of the second calculation circuit), a differential stage with two data inputs separately connected respectively to the data output of the non-volatile RAMs, - a normalizer for integral division of the digital parallel code of the signal that sets a coor denada of each pixel of the distorted image, med i. before the digital code of a constant that adjusts one of the geometrical dimensions of the non-distorted work (respectively along the horizontal in a calculation circuit and along the vertical in the other calculation circuit). - a multiplier for multiplying digital codes of one of the normalized coordinates of each of the pixels of the input image by means of the digital code of the active dimmsion of the distorted frame corresponding to this coordinate. an adder to add the digi codes. the coordinates of the origin of the representation of the distorted frame and the current increment in the coordinate of the processed pixel of the image in the same frame, while each secondary memory module has: - two input multiplexers, each one of which is designed for the generation of the corresponding digital codes of the pixel coordinates of the input and corrected image, and connected to said multiplexers - RAM for writing the input signal to an address and reading the signal video of the control image output from the other direction.
8. The television system, according to claim 1, distinguished by the fact that the video standards converter is combined with the RAM and has: RAM banks with isolated data inputs, the number of which is equal to the number of video cameras, and each of which is the following: - two address multiplexers and - two temporary frame memories; a memory bank control decoder; a first digital-to-analog converter; Temporary RAM, which contains: memory modules connected in parallel, the number of which is equal to the number to the video cameras, and temporary RAM decoder and a second digital-to-analog converter.
9. The television system, according to claim 8, distinguished by the fact that: (a) in each bank RAM: the data entries of the temporary frame memories are combined and connected to the corresponding output of distortion corrector multiple-channel georgetics, and their data outputs are also combined (including between banks) and connected to the data input of the first digital-to-analog converter; the first inputs of the multiplexers are combined and connected to the output of sicr sn ization of the codes for the coordinates for writing the correct images to the temporary frame memory in the aforementioned synchronizer, while the second inputs of the the multiplexers are also combined and connected to the synchronization output of the codes - for the coordinates for reading the corrected images from the temporary frame memories in the aforementioned synchronizer; the first outputs of the first multiplexer are connected to the corresponding address inputs of the first frame buffer while the first outputs of the second multiplexer are connected to the corresponding address inputs of the second frame buffer; the second control input of the first multiplexer and the second inverted control input of the second multiplexer are connected to the control output of the aforementioned syncizer; the first outputs of the multiplexers are connected to the address inputs, their second inputs are connected to the microcircuit selection inputs, and their third outputs are connected to the read-write control inputs of the corresponding RAMs; (b) in all RAM banks: the first control inputs of the first and second multiplexers are combined and connect respectively to the first, second, and so on, outputs of the decoder, while the data outputs of all the temporary memories of the The table is combined and connected to the data input of the first digital-to-analog converter; (c) the control input of the decoder is connected to the control output of the aforementioned synchronizer; (d) in the first and second control inputs of the first digital-to-analog converter are respectively connected to the sync outputs of the aforementioned synchronizer, while the data output of this converter is connected to the aforementioned high resolution monitor; (e) address entries of the temporary RAM modules are combined and connected to the sync outputs of the aforementioned synchronizer with the codes of the coordinates; its data inputs are connected to the corresponding outputs of the aforementioned multi-channel geometric distortion corrector; the data outputs are combined and connected to the data path of the second digital-to-analog converter; its read-write control inputs are connected to the control output of the aforementioned synchronizer, while the data input of the last temporary RAM module is connected to the corresponding data input of the frame temporary memory; (f) the control inputs of the temporary RAM decoder are connected to the salt i. corresponding control outputs of the aforementioned synchronizer, while the control outputs of said decoder are connected to the microcircuit selection inputs of the memory modules so that the first of said outputs are connected to the input of the first memory module, the second with the input of the second memory module, and so on; (g) the data input of the second digital-to-analog converter is connected to the output of 'combined data of the memory modules; in the control inputs of this converter are connected, respectively, to the synchronization synchronization outputs, in tant. or that its data output is connected to the aforementioned module to access the video signals to the PC.
10. The television system, according to claim 1, distinguished by the fact that the synchronizer has: a first synchronization signal generator generator corresponding to the resolution standard of the video cameras whose clock output is connected to the inputs of the clock of the aforementioned ADC modules and the multi-channel threshold controller, and at least one second synchronization signal generating actuator, which corresponds to the high resolution standard of the synthesized image; two groups of counters respectively for the X and Y coordinates of the pixels of the images formed by each of the video cameras; and two groups of counters respectively stop the Xm and Ym coordinates of the pixels of the high resolution image synthesized; at least one synchronization pulse selector, for selecting the original synchronization pulses from the television signal and for forming the horizontal and vertical output synchronization pulses; two digital comparators respectively for the codes of the coordinates Xm and Ym; two monostable multivibrators for horizontal (line) and vertical (quad) impulse formation that correspond to the high resolution standard; at least one counter of the number of pixels of the high resolution image synthesized; an AND circuit for conjunction in the process of forming control signals for the aforementioned geometric distortion corrector; an input register to receive the control commands of said synchronizer sent from the PC; an output logger to send information about the status of the synchronizer to the PC, and 'an address decoder for the programmable port of the PC to issue the control commands to said synchronizer, in which case: the first drive generator is connected to the count entry of the first group of X coordinate counters; the counting input of the second group of the Y coordinate counters is connected to the 1 s of the horizontal synchronization pulses of the synchronization pulse selector; the first group of coordinate counters Xm is connected through the counting input to the output of the second drive generator of the synchronization signals; the counting input of the second set of coordinate counters Ym is connected to the output of the coordinate counters Xm through the year of the digital * comparators and one of the monostable multivibrators connected in series; the restoration inputs of the first set of X coordinate counters and the first set of coordinate counters Xm are connected to the output of the horizontal synchronization pulses of the synchronization pulse selector; the restoration input of the second set of Y-coordinate counters is connected to that output of the synchronization pulse selector from which the vertical synchronization pulses corresponding to the complete picture of the output image of the video cameras must be taken; the restoration input of the second set of coordinate counters Ym is connected to the output of the synchronization pulse selector from which the vertical synchronization pulses which. correspond to half a picture of the output image of the video cameras should be taken; The output of the first set of Xm coordinate counters is connected: - to the inputs of all the modules and the input of the RAM control decoder RAM of the video standard converter with RAM, and through the first digital comparator and the first monostable multivibrator, connected in series, to the digital-to-analog converter of the same converter with RAM and also to the counting input of the second set of coordinate counters Ym; the output of the second set of counting counters Ym is connected: to the inputs of all multiplexers of the aforementioned video standards converter with RAM, and - through the second digital comparator and the second monostable multivibrator, connected in series ^ to the digital-to-analog converter of the same converter with RAM, and also to the count counter input of the number of pixels of the high resolution image synthesized; the input recorder is connected: through a data input parallel to it. computer, - through the first output to the restoration input of the number of pixels counter of the high resolution image synthesized and to the control input of the video standard converter with RAM, - through the second output to the second input of the AND circuit; through the third exit towards the restoration of the multivibrator; the output register is connected: through the first input to the output of the vertical synchronization pulses of the aforementioned synchronization pulse selector, through the second input to the counter output of the number of pixels of the image of high resolution synthesized, and through ealida to the PC; the decoder for the programmable port of the PC to issue the control commands to the aforementioned synchronizer is connected: through the input to the address bar of the PC, - through the output to the input of the input register; the counter of the number of pixels of the synthesized high resolution imacen is additionally connected to the control input of the temporary RAM decoder of the aforementioned video standards converter with RAM.
11. The television system, according to claim 10, distinguished by the fact that the synchronizer is additionally equipped with a second AND circuit and a multivibrator D, and: the AND circuit is connected through an input to the output of the drive generator of the synchronization signals corresponding to the resolution standard of the video cameras, through a second input of the inverted output of the multivibrator D, while the output can be used in a complementary circuit for generation of the input signals for the aforementioned geometric distortion corrector, while the multivibrator D is connected: - through the data input to the control output of the aforementioned multi-channel threshold controller, - through the input of synchronization towards the output of the synchronization pulse selector corresponding to the complete picture of the input image, through is from the restoration input to the third output of the aforementioned input register.
12. The television system, according to claim 2, distinguished by the fact that it is in addition equipped with a digital video signal amplitude corrector that is connected to the multi-channel geometric distortion corrector input, with accumulators of interframe digital video signal, whose number is the same as the number of video cameras and which is inserted between the ADC module and the digital video signal amplitude corrector, and with a multi-channel threshold controller, which is connects do to the outputs of corrector amplitude digital video signal, is connected across the synchronizer above to the control inputs of accumulators digital video signal interframe, and is equipped with a control output re feeds in a feedback loop with the primary radiation source (x-rays).
13. The television system according to eivindicación 12, distinguished by the fact that the corrector amplitude digital video is multichannel, and has in each channel: two non-volatile RAMs which are respectively intended for storing the Morse Code . of the "black" level correction factors and the maximum displacement of the video signal e or for each pixel of the input image from the corresponding video camera (towards the determined channel); • a differential step to calculate the difference between the codes of an input signal and the "black" level for each pixel of the input image from the corresponding video camera; a divider for calculating the normalized correction and amplitude factors for the video input signals by dividing the code adjustment by the maximum displacement of the video signal for the selected video cameras and ADCs by varying the code which corresponds to the maximum displacement of the video signal for each active pixel of the image input from the corresponding video camera; an address decoder for the programmable port of the PC to send the control commands to the determined channel of the digital video signal amplitude corrector, in which the input is connected to the address bar of the PC; an input register to receive the control commands that arrive from the PC, in which: the first input is connected to the PC data bar, the second to the output of the address decoder, while the outputs are connected to the control inputs of the non-volatile RAMs; an output multiplier for the generation of codes for the normalized video output signal by multiplying the above-mentioned normalized factors by the aforementioned difference signal code, and = the first RAM is connected: - through the data entry to the corresponding channel output of the aforementioned ADC module, - through the control input of the first output of the input register, the second RAM is connected: through the data input to the output of the differential stage, - through the control input to the second output of the input register, while both RAMs are connected through the address inputs to the X, Y output of the aforementioned synchronizer; the differential stage is connected: - through the first input to the corresponding channel output of the aforementioned ADC module, - through the second input to the output of the first RAM, through the output to the first entry of the multiplier; The splitter is connected between the output and the second RAM and the second input of the multiplier.
14. The television system, according to claim 12, distinguished by the fact that the multi-channel threshold controller has: in each channel: a first comparator for comparing the pixel codes of the image formed by the corresponding video camera for the channel determined with the threshold code, - an AND circuit that through the first input is connected to the output of the comparator and is designed to drive the pulse of the clock signal with the output signal of this comparator - a counter, the count input of which is connected to the output of the AND circuit, and which serves to calculate the number of such pixels, in the picture box corresponding to the video camera connected to the determined channel, whose code exceeds the value of pre-established threshold luminance, a recorder, the data input from which it is connected to the counter output and used to store the parallel output code of this counter, a second comparator whose input is connected through said recorder to the output of the counter and which serves to compare the output code of this counter with the preset threshold number of pixels of the image having a luminance not less than that the aforementioned threshold value, and an actuator, in which the data input is combined with the output of the comparator and which serves to write the logic output signal of this comparator at the end of the frame synchronization pulse from the synchronizer mentioned above; and the following, in common for all channels: an address decoder for the programmable port of the PC to output the luminance threshold value codes to the multi-channel threshold controller, the number of pixels with a non-luminance luminance. less than the threshold value, and the number of channels with the logic level «] _" in the outputs, in which the input is connected to the address bar of the PC, - an input register to receive the codes of the threshold values arriving from the PC, in which the first input (data) is connected to the data bar of the PC, while the second input (clock) is connected to the output of the address decoder, the first output (from the code of the luminance threshold value) is connected to the first combined inputs of the first comparators of all channels, while the second output, (the code of the number of pixels with a luminance no or that the preset value) is connected to the second combined inputs of the second comparators of all channels, a multiplexer for multiplexing the output signals of all channels, in which each of the data inputs is connected to the outputs of the actuators of the corresponding channels, while the control input is connected to the synchronization output of the aforementioned synchronizer with the coordinate code X; an AND circuit for selecting the pulse of the clock signal with the output signal of said multiplexer, in which the first input is connected to the output of the multiplexer, while the second input is connected to the second combined inputs of the multiplexers. AND circuits of each of the channels of the multi-channel threshold controller and is connected to the clock output of the aforementioned synchronizer; - a counter for counting the number of those channels whose signals at the outputs of the actuators have a logic level "1", and which is connected through the c.on input to the output of said AND circuit; while it is connected through the restoration input through the inverter to the frame synchronization pulse output of the aforementioned synchronizer; a comparator to compare the exit code of the counter with the threshold value of the number of channels with logic level ^] _ "in the outputs of the, connected through the first and second data inputs respectively to the output of the counter and to the third output of the input register, while it is connected through the alida to the controller of the primary radiation source (x-rays) , - an actuator for writing and storing the comparator output signal, connected through the data input to the comparator output, through the clock input through said inverter to the frame synchronization pulse output of the previously mentioned synchronizer, and connected through the control output of the aforementioned interframe accumulators through the synchronizer before mentioned.; fired in which case: in each of the channels, the following ones are combined and connected together to the synchronization frame output of the aforementioned synchronizer: the reset entries of the counters of * the numbers of pixels with a luminance not less than the preset value, the clock inputs of all the recorders and the clock inputs of all the actuators while the second inputs of the first comparators of all the channels are connected to the corresponding data output of the amplitude corrector of digital video signal mentioned above. SUMMARY A HIGH RESOLUTION TELEVISION SYSTEM has at least two video cameras, an analog-to-digital converter module (ADCs), a video standards converter, an internal memory (RAM), devices to synthesize the output signal of video connected to the outputs of the video cameras and interconnected, and a central processor based on a PC. The devices for de-synthesizing the video output signal are made based on a multi-channel geometric distortion corrector and a synchronizer for effective "point joining" of the fragmentary images in an integral image (avoiding the "seams") of a dynamic process characterized by a resolution of not less than 3000x4000 pixels with spatial resolution and contrast not inferior to that of wide-format images of static x-rays or motion picture film; at the same time, the corrector is at the same time connected through the ADC module to the i outputs. of the video cameras and through the video and RAM standards converter to the input of the PC, while the synchronizer is connected in its control input to the synchronization output of at least the last of the cameras. video, and through its control outputs to the clock input of the ADC module, to the address inputs of said corrector whether the address and control synchronization inputs of the video standards converter.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| UA96093517 | 1996-09-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MXPA99001985A true MXPA99001985A (en) | 1999-06-01 |
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