MXPA98010793A - Improvement of an anticip power supply amplifier - Google Patents
Improvement of an anticip power supply amplifierInfo
- Publication number
- MXPA98010793A MXPA98010793A MXPA/A/1998/010793A MX9810793A MXPA98010793A MX PA98010793 A MXPA98010793 A MX PA98010793A MX 9810793 A MX9810793 A MX 9810793A MX PA98010793 A MXPA98010793 A MX PA98010793A
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- signal
- distortion
- main
- predistortion
- circuit
- Prior art date
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- 230000003111 delayed Effects 0.000 claims description 18
- 239000000969 carrier Substances 0.000 claims description 15
- 230000000979 retarding Effects 0.000 claims 1
- 230000003466 anti-cipated Effects 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 6
- 238000011084 recovery Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Abstract
The present invention is an advance feeding circuit and a method for reducing the aggregate distortion to an output signal of the feed anticipated by its amplifiers without increasing the time delay in the main circuit path of the feed circuit anticipated. This is achieved by using a predistortion circuit to introduce a predistortion signal to the input signal of a correction amplifier. The predistortion signal is used to cancel a distortion signal that will be introduced by the correction amplifier. The predistortion signal has approximately the same frequency and amplitude as the distortion signal. The predistortion signal, however, has a phase difference of about 180 ° with respect to the distortion signal, so that the predistortion signal and the distortion signal mutually cancel each other when combined.
Description
IMPROVEMENT OF AN ADVANCED POWER SUPPLY AMPLIFIER
FIELD OF THE INVENTION This invention relates to high-energy linear amplifiers and more particularly to control systems that employ advanced power to reduce the distortion of high-energy linear amplifiers.
BACKGROUND OF THE INVENTION Linear RF amplifiers use devices that exhibit non-linear characteristics at higher energy levels whereby signal distortion is introduced. For example, if a signal from more than one carrier is applied to a linear amplifier, its non-linear characteristics cause an undesirable multiplicative interaction of the carrier signals that are being amplified and the output of the amplifier contains intermodulation or distortion products. These intermodulation products cause interference, which may exceed the established transmission standards. As is well known, intermodulation distortion can be reduced by negative feedback of the distortion components, or by separating the distortion component from the amplifier output and REF: 28801 by pre-feeding the distortion component to cancel the distortion component. distortion in the output signal of the amplifier. Of these techniques, the early feeding method provides the greatest improvement. Fig. 1 is a simplified block diagram of an advance feeding circuit 10 described in U.S. Patent No. 4,885,551. Advance feeding circuit 10 receives input signals S having at least one carrier in a prescribed frequency range. The input signal S is divided into signals S (12a) and S (12b), where the signals S (12a) and S (12b) are signals representative of the input signal S. To facilitate the discussion, references were used numerical, in parentheses here, to indicate which components a signal was produced from, and alphanumeric references were used, in parentheses here, to indicate that the components from which the signal was produced have more than one output. For example, the signal S (12a) could indicate that it was an output signal from the divider 12 and that it was one of a multitude of output signals from the divider 12. If a signal has more than one reference, the order of the references would indicate the path of the signal. For example, the signal S (12a, 14) would indicate that it was first an output signal of the divider 12 and then the output signal of an amplifier 14. The output signal of the last component referred to would be a signal representative of the component referred to first, for example, signal S (12a, 14) is a signal representative of signal S (12a). The signal S (12a) is applied to the path of a first circuit or main circuit having a main amplifier 14 which amplifies the signal S (12a) and introduces the distortion signal D (14). In this way, the main amplifier 14 produces output signals S (14) comprising the signals S (12a, 14) and D (14). The signal S (14) is applied to the directional coupler 18, which directs the signals S (18a) and S (18b) to the delay 22 and cancellation circuits 20, respectively, where the signal S (18a) comprises the signals S (12a, 14, 18a) and D (14, 18a) and the signal S (18b) comprises the signals S (12a, 14, 18b) and D (14, 18b). The signal S18 (a) is delayed by the delay 22 to produce the output signal S (22) comprising S (12a, 14, 18a, 22) and D (14, 18a, 22). The signal S (12b) is applied to the path of a second circuit where it is delayed by a delay 16 to produce the output signal S (16) comprising the signal S (12b, 16). The signal S (12b, 16) is combined with the signal S (18b) in the cancellation circuit 20 to form the output signal S (20). In a cancellation circuit 20, the signal S (12a, 14, 18b) (via the signal S (18b)) is canceled by the signal S (12b, 16). In this way, the signal S (20) comprises the distortion signal D (14, 18b, 20). The signal S (20) is applied to the correction amplifier 24 which amplifies the signal S (20) and introduces the distortion signal D (24). Note that the distortion signal D (24) is approximately 10,000 times smaller in amplitude than the distortion signal D (14). In this way, the correction amplifier 24 produces the output signal S (24) comprising the distortion signals D (14, 18b, 20, 24) and D (24). The signal S (24) is combined with the signal S (22) in the cancellation circuit 26 to produce the output signal S (26). The amplitude of the distortion signal D (14, 18b, 20, 24) (via the signal S. {24)) should be approximately equal to the amplitude of the distortion signal D (14, 18a, 22) (via the signal S (22)) so that the distortion signals D (14, 18b, 20, 24) and D (14, 18a, 22) cancel each other in the cancellation circuit 26. In this way, the signal S (26) comprises S (12a, 14, 18a, 22, 26) D (24, 26). In effect, the amplitude of the distortion signal in the output signal S (26) is reduced by substituting a signal representative of the distortion signal D (14) (ie, D (14, 18a, 22)) with the signal of distortion D (24), which has a smaller amplitude. In some cases, the amplitude of the distortion signal D (24, 26) can produce an unacceptable level of distortion in the output signal S (26). To further reduce the amplitude of the distortion signal in the output signal S (26), a second advance feeding circuit may be incorporated in the first advance feeding circuit. Fig. 2 shows an advance feeding circuit 28 having the first advance feed circuit 10 and a second feed feed circuit 31 incorporated therein. The second advance feed circuit 31 reduces the distortion signal in the output signal S (26) by substituting a signal representative of the distortion signal D (24) (i.e., D (24, 34a, 35)) with a signal of smaller amplitude distortion D (40) (produced by the amplifier 40 of the second advance feed circuit 31). In this way, the output signal S (26) of the advance feed circuit 28 comprises the signal S (12a, 14, 18a, 22, 26) and a signal representative of the distortion signal D (40), i.e. D (40, 42, 26). Unfortunately, such an anticipated feeding circuit 28 requires increasing the time delay in the main circuit path, which results in greater loss and poorer efficiency due to attenuation. Accordingly, there is a need to reduce the aggregate distortion to an output signal by a correction amplifier without increasing the time delay in the main circuit path.
BRIEF DESCRIPTION OF THE INVENTION The present invention is an anticipated feeding circuit and a method to reduce the aggregate distortion to an output signal of the feed anticipated by its amplifiers without increasing the time delay in the path of the main circuit of feeding circuit anticipated This is achieved by anticipating a predistortion circuit to introduce a predistortion signal to the input signal of the correction amplifier. The predistortion signal is used to cancel a distortion signal that will be input by the correction amplifier. The predistortion signal has approximately the same frequency and amplitude as the distortion signal. The predistortion signal, however, has a phase difference of approximately 180 ° with respect to the distortion signal, so that the predistortion signal and the distortion signal cancel each other out when combined. In one embodiment of the present invention, the advance feeding circuit comprises a first main circuit path and a second circuit path. The input signal S having a carrier signal is input to the feed-forward circuit and divided into the signals S (a) and S (b), which are applied to a main amplifier and a first delay, respectively. The main amplifier amplifies the signal S (a) and introduces a distortion signal D (main amplifier). In this way, the main amplifier produces the output signal S (main amplifier) comprising the amplified signal S (a) and the distortion signal D (main amplifier). The signal S (main amplifier) is applied to a second delay and a first cancellation circuit. In the first cancellation circuit, the signal S (main amplifier) is combined with the delayed signal S (b) to produce the output signal S (cancellation) comprising the distortion signal D (main amplifier), wherein the signal amplified S (a) is canceled by the delayed signal S (b). The signal S (cancellation) is then applied to a predistortion circuit where a predistortion signal D (predistortion) is introduced. The predistortion circuit produces output signals S (predistortion) that comprise distortion signals D (main amplifier) and D (predistortion). The signal S (predistortion) is amplified by a correction amplifier which introduces the distortion signal D (correction amplifier). The D signal (correction amplifier) has approximately the same frequency and amplitude as the predistortion signal D (predistortion), but a phase difference of approximately 180 °. When combined in the correction amplifier, the distortion signal D (correction amplifier) and the predistortion signal D (predistortion) cancel each other out. In this way, the correction amplifier produces the output signal S (correction amplifier) comprising the amplified distortion signal D (main amplifier). The signal S (correction amplifier) is subsequently combined with the delayed signal S (main amplifier) in a second cancellation circuit, where the amplified distortion signal D (main amplifier) via the signal S (correction amplifier) is used to cancel the distortion signal D (main amplifier) via the delayed signal S (main amplifier). The output signal of the cancellation circuit (and anticipated feed circuit) comprises the amplified signal S (a).
BRIEF DESCRIPTION OF THE DRAWINGS The features, aspects, and advantages of the present invention will be better understood with respect to the following description, the appended claims, and the accompanying drawings in which: Fig. 1 describes a block diagram of a anticipated feeding circuit; Fig. 2 describes a block diagram of a circuit having two advance feeding circuits;Fig. 3 discloses a block diagram of an advance feeding circuit according to the present invention; and Fig. 4 describes a block diagram of an example of a predistortion circuit.
DETAILED DESCRIPTION OF THE INVENTION Fig. 3 discloses a block diagram of an advance feed circuit 100 that operates to amplify signals through a frequency band prescribed in accordance with the present invention. The forward feed circuit 100 has a directional coupler 101 which applies a composite input signal S to the path of a first circuit and the path of a second circuit, wherein the input signals S comprise one or more carrier signals Ss through of the prescribed band. The first circuit path includes the gain and phase adjuster 105, the main amplifier 110, the directional couplers 113 and 130, the cancellation circuit 127, and the delay 119. The path of the second circuit includes the delay 103, the circuit cancellation 115, splitter 117, gain adjuster and phase 122, predistortion circuit 123 and correction amplifier 124. Note that for the purposes of this application, the term "divisor" and "directional coupler" shall be considered equivalent. each. The directional coupler 101 receives the input signal S and applies the signals S (101a) and S (101b), both of which are signals representative of the input signal S, to the path of the first circuit and the path of the second circuit, respectively. In the path of the first circuit, the adjustment of the amplitude and / or phase of the signal S (101a) in the gain amplifier and phase 105 (under the control of the controller 140) to produce the output signal S (105) that it comprises signal S (101a, 105). Specifically, the gain and / or phase signal S (101a) are adjusted so that a signal representative of it can be subsequently used to cancel a signal representative of the signal S (101b), as will be described here. The main amplifier 110 amplifies the signal S (105) and introduces the distortion signal D (110), thereby producing the output signal S (110) comprising the signal S (101a, 105, 110) and the signal of distortion D (110). The directional coupler 113 receives the signal S (110) and directs it via the signals S (113a) and S (113b) for the delay 119 and cancellation circuit 115, respectively, where the signal S (113a) comprises the signal S (101a, 105, 110, 113a) and the distortion signal D (110, 113a), and S (113b) comprises the signal S (101a, 105, 110, 113b) and the distortion signal D (110, 113b) ). The delay 119 retards the signal S (113a) without distortion during a time delay Tiig which is set to compensate for the delay of a signal traveling through the cancellation circuit 115, the splitter 117, the gain and phase adjuster 122 , the predistortion circuit 123 and the correction amplifier 124. The delay 119 produces the output signal S (119) comprising the signal S (101a, 105, 110, 113a, 119) and the distortion signal D (110, 113a, 119). The cancellation circuit 127 combines the signal S (119) with the signal S (124) of the correction amplifier 124 to produce the output signal S (127), as will be described here. The output signal S (119) is applied to the directional coupler 130, which directs it via the signals S (130a) and S (130b) to the output line 132 and the controller 140, respectively. In the second path of the circuit, the delay 103 delays the signal S (101b) without distortion for a time delay? 03, where the time delay T? 03 is set to compensate for the delay of a signal traveling through of a gain adjuster and phase 105, the main amplifier 110 and the directional coupler 113. The delay 103 produces the output signal S (103) comprising the signal S (101b, 103). The signal S (103) is combined in the cancellation circuit 115 with the signal S (113b) to produce the output signal S (115). If the amplitude and / or phase of the signal S (101a) is adjusted appropriately by the gain and phase adjuster 105, the signal S (101a, 105, 110, 113b) (via the signal S (113b)) is canceled by the signal S (101b, 103) (via the signal S (103).) Thus, the signal S ( 115) substantially comprises the distortion signal D (110, 113b, 115) when the signal S (101a, 105, 110, 113b) is canceled by the signal S (101b, 103) .In other circumstances, the signal S (115 ) comprises the distortion signal D (110, 113b, 115) and the difference between the signals S (101b, 103) and S (101a, 105, 110, 113b) For the purposes of this application, a signal is considered canceled if the amplitude of the signal is lower than an acceptable threshold level, the signal S (115) is applied to the splitter 117, which divides the signal S (115) into the signals S (117a) and S (117b), in where the signal S (117a) comprises D (110, 113b, 115, 117a) and the signal S (117b) comprises D (110, 113b, 115, 117b) .Note that it is assumed that the cancellation of the S signals (101b, 103) and S (101a, 105, 110, 113b) would have occurred in the cancellation circuit 115. The signals S (117a) and S (117b) are directed to the gain and phase adjuster 122 and the controller 140, respectively. The amplitude and / or phase of the signal S (117a) is modified in the gain and phase adjuster 122 (under the control of the controller 140) to produce the output signal S (122) which comprises the distortion signal D ( 110, 113b, 115, 117a, 122). Specifically, the gain and / or phase of the signal S (117a) are adjusted in such a way that a signal representative of it can be subsequently used to cancel the distortion signal D (110, 113a, 119) (via the signal S ( 119)) in the cancellation circuit 127. The signal S (122) is applied to the predistortion circuit 123, which inputs the predistortion signal D (123). In this way, the predistortion circuit 123 produces the output signal S (123) comprising the distortion signal D (110, 113b, 115, 117a, 122, 123) and the predistortion signal D (123). The main objective of the predistortion circuit 123 is to input the predistortion signal D (123) to cancel the distortion signal D (124), which will be produced by the correction amplifier 124 - that is, the predistortion signal D (124). 123) should have the same approximate frequency and amplitude of the distortion signal D (124) but with opposite phases (i.e., a phase difference of approximately 180 °). The correction amplifier 124 amplifies the signal S (123) and introduces the distortion signal D (124). This distortion signal D (124), however, is canceled in the correction amplifier by the predistortion signal D (123) (via the signal (123)). In this way, the output signal S (124) of the correction amplifier 124 substantially comprises the distortion signal D (110, 113b, 115, 117a, 122, 123, 124) when the distortion signal D (124) is canceled by the predistortion signal D (123). Otherwise, the signal S (124) comprises the distortion signal D (110, 113b, 115, 117a, 122, 123, 124) and the difference between the distortion signals D (123) and D (124). The signal S (124) is combined with the signal S (119) in the cancellation circuit 127 to produce the output signal S (127). The amplitude and / or phase of the signal S (117a) could have been adjusted by adjusting for the gain and phase 122 so that the distortion signal D (110, 113b, 115, 117a, 122, 123, 124) ( via signal S (124)) cancels the distortion signal D (110, 113a, 119) (via signal S (119)). In this way, the signal S (127) substantially comprises the signal S (101a, 105, 110, 113a, 119, 127) when the distortion signal D (110, 113a, 115, 117a, 122, 123, 124) cancels the distortion signal D (110, 113a, 119). Otherwise, the signal S (127) comprises the signal S (101a, 105, 110, 113a, 119, 127) and the distortion signal D (127), where the signal D (127) is the difference between the distortion signal D (110, 113b, 115, 117a, 122, 123, 124) and the distortion signal D (110, 113a, 119). The appropriate adjustment of the amplitude and / or phase of the signals S (101a) and S (117a) by the gain and phase adjusters 105 and 122, respectively, are controlled by the controller 140. Specifically, the controller 140 scans the signal S (130b) (received from the directional coupler 130 via the line 134) to detect a carrier signal Sc. The recovery of that input signal (and its representative signals) includes one or more carrier signals Sc. After detecting the carrier signal Sc in the signal S (130b), the controller 140 measures the magnitude (eg, amplitude and phase) of the carrier signal Sc in the signal S ( 117b). The controller 140 uses the measured amount of the carrier signal Sc (in the signal S (117b)) to control the manner in which the gain and phase adjuster 105 adjusts the amplitude and / or phase of the signal S (101a), which includes the carrier signal Sc. Specifically, the amplitude and / or phase of the signal S (101a) are adjusted so that the carrier signal Sc via the signal S (113b) is canceled by the carrier signal Sc via the signal S (103) in the cancellation circuit 127. After canceling the carrier signal Sc in the cancellation circuit 127, the controller 140 scans the signal S (130b) to detect the distortion signal D (127) which, as mentioned at the beginning, it is the difference between the distortion signals D (110, 113b, 115, 117a, 122, 123, 124) and D (110, 113a, 119). After detecting the distortion signal D (127), the controller 140 measures the magnitude of the distortion signal D (127) and causes the gain and phase adjuster 122 to adjust the amplitude and / or phase of the signal S (117a) ) so that the distortion signal D (110, 113b, 115, 117a, 122, 123, 124) (in signal S (124)) cancels the distortion signal D (110, 113a, 119) (in the signal S (119)). As mentioned at the beginning, the predistortion signal D (123) introduced by the predistortion circuit 123 should have the same approximate frequency and amplitude as the distortion signal D (124), but opposite phases. Figure 4 illustrates an example of a predistortion circuit 123 that can be used in accordance with the present invention. The divider 201 divides the signal S (122) into the signals S (201a) and S (201b), where the signals S (201a) and S (201b) are signals representative of the input signal S (122). The signals S (201a) and S (201b) are applied to a first path of the predistortion circuit and a second path of the predistortion circuit, respectively. The recovery of that signal S (122) comprises the distortion signal D (110, 113b, 115, 117a, 122). In this way, the signal S (201a) comprises D (110, 113b, 115, 117a, 122, 201a), and the signal S { 201b) comprises D (110, 113b, 115, 117a, 122, 201b). The first path of the predistortion circuit comprises the gain and phase adjuster 202 for modifying the amplitude and / or phase of the signal S (201) to produce the output signal S (202); the amplifier 206 for amplifying the signal S (202) and inputting the distortion signal D (206) and, thereby, producing the output signal S (206); the splitter 208 for dividing the signal S (206) into the signals S (208a) and S (208b); the delay 212 for delaying the signal S (208a) for a time delay T2X2 to produce the output signal S (212); and the cancellation circuit 218 for combining the signals S (212) with the signal S (216) of the second predistortion path to produce the output signal S (218), which is the same signal as the S. (. 123). The second path of the predistortion circuit comprises the delay 204 for delaying the signal S (201b) during a time delay T204 to produce the output signal S (204); the cancellation circuit 210 for combining the signals S (208b) and S (204) to produce an output signal S (210); the gain adjuster and phase 214 for adjusting the amplitude and / or phase of the signal S (210) to produce the output signal S (214); and the amplifier 216 for amplifying the signal S (214) and inputting the distortion signal S (216) and, thereby, producing the output signal S (216). Note that the time delay T204 of the delay 204 was set to compensate for the delay of a signal traveling through a gain and phase adjuster 202, the amplifier 206 and the divider 208, while the time delay T2i2 of the delay 212 was set to compensate for the delay of a signal traveling through a cancellation circuit 210, the gain and phase adjuster 214, and the amplifier 216.
In the first path of the predistortion circuit, the gain and phase adjuster 202 adjusts the amplitude and / or phase of the signal S (201a) to produce the signal S (202), which comprises the signal S (201a, 202) . Specifically, the gain and phase adjuster 202 adjusts the signal S (201a) so that a signal representative of it (ie, the signal S (201a, 202, 206, 208b) in the signal S (208b) can be subsequently used. )) to cancel the signal S (204) in the cancellation circuit 210. The amplifier 206 amplifies the signal S (202) and introduces the distortion signal D (206) to produce the output signal S (206), which it comprises the signal S (201a, 202, 206) and the distortion signal D (206). Note that the amplifiers 206 and 216 are comparable amplifiers, and therefore have substantially identical distortion characteristics. The amplifiers 206 and 216 also have distortion characteristics substantially identical to the distortion characteristics of the correction amplifier 124. In other words, the amplifiers 206, 216 and 124 will introduce distortion signals having substantially identical characteristics. The divider 208 directs the signals S (208a) and S (208b) to the delay 212 and cancellation circuit 210, where the signal S { 208a) comprises the signals S (201a, 202, 206, 208a) and D (206, 208a), and the signal S (208b) comprises the signals S (201a, 202, 206, 208b) and D (206, 208b) . The signal S (208b) is combined with the signal S (204), which comprises the signal S (210b, 204), in the cancellation circuit 210 to produce the output signal S (219). If the amplitude and / or phase of the signal S (201a) are adjusted appropriately by the gain and phase adjusters 202, the signals S (201a, 202, 206, 208b) (in the signal S (208b)) cancels the signal S (201b, 204) (in the signal S (204)). In this way, the output signal S (210) substantially comprises the signal D (206, 208b, 210). In the second predistortion circuit, the gain and phase adjuster 214 is calibrated to adjust the phase and / or amplitude of the signal S (210) to produce the output signal S (214), which comprises the signal D (206). , 208b, 210, 214). Specifically, the phase and amplitude of the signal S (210) is adjusted such that it can be used to cancel the distortion signals D (216), D (206, 208a, 212) and D (124) that have been or will be introduced by amplifiers 216, 206 and 124, respectively. For example, suppose that each of the amplifiers 216, 206 and 214 have a gain in time and produce distortion signals of the same approximate frequency, amplitude and phase. Then the gain and phase adjuster 214 adjusts the phase of the signal S (210) so that there is a 180 ° phase difference between its output signal S (214) and the distortion signals D (216), D (214). 206, 208a, 212) and D (124), and adjust the amplitude of the signal S (210) so that its output signal 3 (214) is equal to the combined amplitudes of the distortion signals D (216), D (206, 208a, 212) and D (124). The signal S (214) is then applied to the amplifier 216 to input the output signal S (216) comprising the distortion signal D (206, 208b, 210, 214, 216), which is the difference between the signals of distortion D (206, 208b, 210, 214) and D (216) (introduced by amplifier 216) - that is, that the distortion signal - € fe- D (206, 208b, 210, 214) overcalls the distortion signal D (216). The cancellation circuit 218 combines the signals S (216) and S (212) to produce the output signal S (123), which comprises the signal S (201a, 202, 206, 208a, 212, 218) and the signal of distortion D (206, 208b, 210, 214, 216, 218). The signal S (201a, 202, 206, 208a, 212, 218) and the distortion signal D (110, 113b, 115, 117a, 122, 123), and the distortion signal D (206, 208b, 210, 214, 216, 218) in the distortion signal D (123) which is the difference between the distortion signals D (206, 208b, 210, 214, 216, 216) and D (206, 208a, 0 212). Although the present invention has been described in considerable detail with reference to certain embodiments, other versions are possible. Therefore, the spirit and scope of the present invention should not be limited to the description of the modalities contained herein.
It is noted that in relation to this date, the best method known to the applicant to carry out the aforementioned invention, is that which is clear from the present description of the invention. Having described the invention as above, property is claimed as contained in the following:
Claims (8)
1. A method for amplifying an input signal S, characterized by the steps of: dividing the input signal S into the signals S (a) and S (b); amplifying the signal S (a) to produce the signal S (main) having a distortion signal D (main) and an amplified signal S (a); divide the S (main) signal into a first signal S (main) and a second S (main) signal; retarding the first signal S (main) to produce a first delayed signal S (main); retard the signal S (b) to produce a delayed signal S (b); combining the delayed signal S (b) and the second signal S (main amplifier) to produce a signal S (cancellation) having a first signal representative of the distortion signal D (main); predistorting the signal S (cancellation) to produce a signal S (predistortion) having a distortion signal D (predistortion) and a second signal representative of the distortion signal D (main); amplifying the signal S (predistortion) to produce a signal S (correction) having a second amplified signal representative of the distortion signal D (main); and combining the signal S (correction) and the first delayed signal S (main) to produce a signal S (output) having a signal representative of the amplified signal S (a).
2. The method according to claim 1, characterized by the original step of: adjusting the signal S (a) so that the second S (main) signal cancels the delayed signal S (b) when combined.
The method according to claim 2, characterized in that the step of adjusting the signal 3 (a) includes the step of: measuring a magnitude of a carrier signal in the signal S (cancellation).
The method according to claim 1, characterized by the additional step of: adjusting the signal S (cancellation) so that the signal S (correction) is canceled by the first delayed signal S (main).
5. The method according to claim 2, characterized in that the step of adjusting the signal S (cancellation) includes the step of: measuring a magnitude of a third signal representative of the signal D (main) in the signal S (output).
6. An advance feeding circuit, characterized in that: a first directional coupler receives an input signal S and output signals S (a) and S (b) using the input signal S; an amplifier for amplifying the signal S (a) to produce a signal S (main) having a distortion signal D (main) and an amplified signal S (a); a second directional coupler for producing a first S (main) signal and a second S (main) signal using the S (main) signal; a first delay to delay the first signal S (main) to produce a first delayed signal S (main); a second delay to delay the signal S (b) to produce a delayed signal S (b); a first cancellation circuit for combining the delayed signal S (b) and the second signal S (main amplifier) to produce a signal S (cancellation) having a first signal representative of the distortion signal D (main); a predistortion circuit to predistort the S (cancellation) signal to produce a signal S (predistortion) that has a distortion signal D (predistortion) and a second signal representative of the distortion signal D (main); a correction amplifier for amplifying the signal S (predistortion) to produce a signal S (correction) having a second amplified signal representative of the distortion signal D (main); and a second cancellation circuit for combining the signals S (correction) and the first delayed signal S (main) to produce a signal S (output) having a signal representative of the amplified signal S (a). The advance feeding circuit according to claim 8, characterized by: a gain and phase adjuster for modifying the signal S (a) so that the second S (main) signal cancels the delayed signal S (b) when It is combined. The feed-in circuit according to claim 8, characterized by: a gain and phase adjuster for modifying the signal S (cancellation) so that the signal S (correction) is canceled by the first delayed signal S (main) ).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US08994830 | 1997-12-19 |
Publications (1)
Publication Number | Publication Date |
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MXPA98010793A true MXPA98010793A (en) | 2000-06-05 |
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