MXPA98005510A - Data processing of a bitstream signal - Google Patents

Abstract

A data processing apparatus is disclosed for data processing an audio signal. The data processing apparatus comprises an input terminal (1) for receiving the audio signal, a 1-bit A/D converter (4) for A/D converting the audio signal so as to obtain a bitstream signal, a prediction unit (10) for carrying out a prediction step on the bitstream signal so as to obtain a predicted bitstream signal, a signal combination unit (42) for combining the bitstream signal and the predicted bitstream signal so as to obtain a residue bitstream signal, and an output terminal (14) for supplying the residual bitstream signal (Figure 1). Further, a recording apparatus (Figure 4) and a transmitter apparatus (Figure 5) comprising the data processing apparatus are disclosed. Other data processing apparatuses can be found in the figures 18, 19 and 20. In addition, another data processing apparatus (Figure 7) for converting the residue bitstream signal into an audio signal is disclosed, as well as a reproducing apparatus (Figure 9) and a receiver apparatus (Figure 10) comprising the other data processing apparatus.

Description

DATA PROCESSING OF A BITS CHAIN SIGNAL The invention relates to a data processing apparatus for processing data in an audio signal, to a method of data processing, a transmitter comprises the data processing apparatus, a transmitter in the form of a recording apparatus, a recording carrier, a second data processing apparatus for converting an input signal into a replica of the audio signal, a receiver comprising the second processing apparatus, a receiver in the form of a reproducing apparatus and a signal of transmission comprising a data comprising a residual bitstream signal. The processing of data of an audio signal is well known in the art. The reference is made in this respect in EP-A 402,973, the document DI in the list of relative documents. The document describes a subband encoder, in which an audio signal is converted A / D with a specific frequency sampling, such as 44.1kHz, and the resulting sample in the form of eg. The splitter filter divides the bandwidth of the digital audio signal into a plurality of subband signals of relatively narrow bands. Using an acoustic psyci model, a mask threshold is divided and sample blocks of subband signals are subsequently quantized with a specific number of bits per sample for each block of subband signals, in response to said mask threshold, resulting in in a significant data compression of the audio signal to be transmitted. The data compression carried out is based on a "throwing" those components into the audio signal that is inaudible and is then a method of loss compression. The data compression described in the DI document is more an intelligent data compression method and requires a substantial number of gates or instructions, when performed respectively in hard or software, so it is expensive. In addition, the subsequent expansion apparatus also requires a substantial number of gates or instructions, when performed in hardware or software respectively. The invention helps to provide a data processing apparatus for processing audio signals such that they can be compressed by an encoder without loss in a relatively simple manner. Furthermore, the invention helps to provide a corresponding data processing apparatus for converting the processed bitstream signal into a replica of the audio signal. The data processing apparatus according to the present invention comprises input means for receiving the audio signal, conversion means for carrying out the invention in an audio signal such as to obtain a 1-bit signal of the bit string, the conversion means comprise sigma-delta modulating means, means of perdition to carry out a prediction step in a signal such as to obtain a predicted bit string signal, and output means to feed the signal of residual bit string. The invention is based on the following acknowledgment. The bit string signals taken in a considerable amount of capacity. To illustrate this. In a current proposition for a new standard for an optical audio disc, the disc will contain two channels of bit chains converted into audio signals, sampled at 64. Fs, where fs = 44.1 kHz. This corresponds to a speed four times greater than the current one of a CD audio disc. As discussed in a previous field but not already published in the patent application no. 96202807.2 in the name of the applicant, document D7 in the list of related documents that can be found at the end of this description, with lossless and low complexity coding algorithms, such as fixed Huffman coding, is good for reducing this capacity to a certain extent. Experiments have revealed that although high co-pression relationships without loss can be obtained using more sophisticated, more complex algorithms, such as Lempel Ziv. Mainly in audio / voice coding, linear prediction is known to be a powerful technique. By eliminating the redundancy of an audio / voice signal prior to quantization, the entropy of the signal after the quantization is significantly reduced. The signals at the output and at the input of a predictor are in a floating point or a multi-bit representation. In coding without loss of bit string signals, the complexity of the algorithm, especially in the importance of the decoder side. However, generally, the execution of the coding algorithm without loss is relatively close to its complexity. According to the invention, the prediction is used in bit string signals. ie signals with only two symbols of different representation, either 0 or 1. This has the advantage of an increase in compression execution without losses, for only marginal extra complexity. Experiments have revealed that a third order prediction already has a considerable effect on the statistics of the resulting signal. By predictive means, such as a preprocessing step, prior to a data compression, the probability of a "1" bit can be reduced from 50% to about 20%. The effect of this is that the output of the apparatus according to the invention contains a large number of "zeros", which can be exploited by simple Huffman coding or long stroke coding. The audio signal can be applied analogously or in digital form. When A / D is converted, according to the invention, an analog audio signal with a 1-bit A / D converter (also called a bit chain converter or delta-sigma modulator), the audio signal to be converted it is sampled with a frequency which is generally a multiplicity of the frequency of 44.1 kHz or 48 kHz. The output signal of the 1-bit A / D converter is a binary signal, called a bit string signal. When the audio signal is fed digitally, sampled in e.g. 44.1 kHz, the samples being expressed in eg. 16 bits per sample, this digital audio signal is oversampled with a frequency which is again a multiplicity of this sampling frequency of 44.1 kHz (or 48 kHz), which results in the bit-1 signal signal. -bit. Converting an audio signal into a 1-bit bit string signal has a number of advantages. The conversion of a bit string is a high quality coding method, with the possibility of a high or low quality decoding with the additional advantage of a simplified decoding circuit. Reference is made to the publications "A digital decimating filter for analog-to-digital conversion of hi-fi audio signáis", by J.J. van der Kam document D2 in the list of related documents, and "A higher order topology for interpolative modulators for oversampling A / D converters", by Kirk CH Chao et al, document D3 in the list of related documents. 1-bit are used in CD players, for example, to convert the bitstream audio signal into an analog audio signal.The audio signal recorded on a CD disc however is not compressed data, before It is well known in the art that the result of a bit-string signal from the 1-bit A / D converter is uneven, a random signal which has a frequency spectrum similar to noise. Surprisingly, however, it was established that by applying a prediction step, prior to data compression, eg using an encoder without loss, a significant data reduction could be obtained, despite the noisy character of the 1-bit A / D converter bit string signal.

These and other aspects of the invention will be apparent from and further elucidated with reference to the embodiments described in the following description of the figures, in which Figure 1 shows one embodiment of the data processing apparatus, Figure 2 shows a part of a mode of a prediction unit for use with the apparatus of Figure 1; Figure 3 shows a modality of the prediction unit and the combination unit of the signal incorporated in the data processing apparatus; Figure 4 shows the data processing apparatus of FIG. 1 incorporated in a recording apparatus for recording the residual bit-string signal on a recording carrier; FIG. 5 shows the data processing apparatus incorporated in a transmission apparatus for transmitting the residual bit string signal via a transmission means, FIG. 6 shows a further embodiment of the recording apparatus, further provided c On an error correction encoder and a channel encoder, FIG. 7 shows an embodiment of another data processing apparatus for reconverting the residual bitstream signal in a replica of the original audio signal, FIG. shows a modality of the signal combining unit and the prediction unit incorporated in the apparatus of Figure 7; Figure 9 shows the data processing apparatus of Figure 7 incorporated in a reproducing apparatus for reproducing the chain signal of residual bits of a recording carrier, FIG. 10 shows the data processing apparatus of FIG. 7 incorporated in a receiving apparatus for receiving the residual bit string signal from a transmission medium, FIG. 11 shows a further embodiment of the reproductive apparatus, further provided with a channel decoder and an error correction unit, Figure 12 shows the derivation of a conversion table for Another embodiment of the prediction unit in the apparatus of Figure 1, Figure 13 shows another embodiment of the data processing apparatus, Figure 14 shows an embodiment of the data processing apparatus for converting the obtained residual data string signal. by the apparatus of figure 14 to a replica of the original audio signal, figure 15 shows the application of a data compression unit in a recording apparatus, figure 16 shows the application of a data expansion unit in a reproduction apparatus, Figure 17a shows the frequency spectrum of the output signal of the 1-bit A / D converter of Figure 1, and Figure 17b shows the frequency spectrum of the same output signal in a range of small frequency, Fig. 18 shows a modification of the apparatus of Fig. 1, Fig. 19 a data processing apparatus provided with an arithmetic encoder and Fig. 20 an apparatus of data processing. e data processing provided with an arithmetic decoder. • Figure 1 shows an embodiment of the data processing apparatus according to the invention, comprising an input terminal 1 for receiving the audio signal. In the present example, the audio signal is an analog audio signal. The input terminal 1 is coupled to an input 2 of a 1-bit 4 A / D converter, also called: delta-sigma modulator. An output 6 of the 1-bit A / D converter 4 is coupled to an input 8 of a prediction unit 10 as well as a first input 40 of a signal combining unit 42. An output 12 of the prediction unit 10 is coupled to a second input 44 of the signal combining unit 42, an output 48 of which is coupled to a terminal 14. The 1-bit A / D converter is adapted to perform an A / D conversion of 1. -bit of the audio signal so as to obtain a bitstream signal which is fed to the output 6. For this purpose, the A / D converter 4 receives a sampling frequency equal to N.fs via an input 16. fs is the frequency equal to eg. 32kHz or 48 kHz and N is a large number, such as 64. The audio signal is sampled in the A / D converter 4 with a sampling frequency of eg. 2.8224 MHZ (64 X 44.1 kHz). The bitstream signal will appear at the output 6 of the A / D converter in this way they have a bitrate of 2.8224 MHz. The prediction means 10 is adapted to carry out a prediction step on the bitstream signal applied to its input 8 so as to obtain a predicted bitstream signal at its output 12. The signal combination means 42 are adapted to combine the bitstream signal applied to its input 40 and the predicted bitstream signal applied to its input 44 so as to obtain a residue bit string signal which is fed to its output 14. FIG. 17a shows a frequency spectrum of the bit string signal present at output 6 of the A / D converter 4, for an input signal in the form of a 5kHz sine wave, sampled with a sampling frequency of 2.8224 MHz. The spectrum in this way shows the frequencies between 0Hz and 1.4 Mhz. Figure 17b shows part of the spectrum shown in Figure 17a, which starts between 0Hz and 100kHz, so as to show more clearly the 5kHz sinusoid included in the bitstream signal. The noisy character of the bitstream signal is clearly visible, especially in the high frequency region, which seems to imply that a prediction step is carried out in said signal, with a subsequent signal combination of the predicted version of the signal. bit chain signal and the bit string signal to obtain said residual signal will not result in a decrease in substantial amount in entropy of the residual signal, such decrement of entropy of the residual signal, compared to the input signal of the signal. prediction unit being the general intention of a prediction unit. Contrary to this, investigations have made it clear that a significant decrease in entropy of the residual bitstream signal can be obtained by performing a prediction step despite the noisy nature of the bitstream signal.

The prediction unit can be of any form, and could comprise a FIR filter or an IIR filter, where the filter coefficients are chosen (or derived) such that the output signal of the prediction unit 10 is the predicted version of the bit string signal.

Another embodiment of the prediction unit 10 will be further explained with reference to Fig. 2 and 3 shows a part of the prediction unit 10, which comprises a three-bit shift register 20 having an input coupled to the input 8 of the prediction unit. Under the application of three clock pulses (not shown) to the shift register 20, three subsequent bits xl, x2, x3 of the bit string signal applied to the input 8 are diverted to the shift register 20. A detector 22 is present having an input 24 coupled to the input 8 of the prediction unit 10. A detector detects the bit value of the next bit x4 directly followed by three subsequent bits xl, x2, x3 in the bitstream signal. In addition, a counter 26 is present which counts the number of times that a "0" bit follows this same sequence of three bits xl, x2, x3, and the number of times that a "1" bit follows that same specific sequence of three bits. This is done for all of the eight possible 3-bit bit sequences xl, x2, x3.

Explained in a different way. Assuming that the three-bit sequence "100" is stored in the shift register 20 and that the detector 24 detects the next bit x4 to be "0". As a result, the number N4, 0 in column 28 is incremented by one. Under the next clock pulse applied to the shift register 20, the three-bit word stored in the shift register 20 now equals "000". Assuming that the next bit x4 is now equal to "" 1. "As a result, the number NO, 1 in column 30 is incremented by 1. This process is continued for a relatively large part of the bitstream signal. the portion of the signal bit string has been processed in this manner, columns 28 and 29 are filled with numbers Ni, 0, Ni, 1, which indicates the number of occurrences of a "0" bit or a "1" bit "respectively as the next bit following the i-th 3-bit sequence given in column 32, where y runs from 0 to 7 in the present example.

The next, a predicted binary value x4 'is derived from the numbers in columns 28 and 30 for each of the 3-bit sequences xl, x2, x3 in column 32, by taking that binary value (0 or 1 ) which resulted in the largest of the counted number Ni, 0 and Nil for the sequence of i-neavo bit in column 32. As an example, if N4, O equals 78 and N4, equal 532, the predicted bit X4 in Response to the occurrence of 3-bit bit sequence '100' is chosen equal to '1'. A conversion table can then be demolished by comprising columns 32 and 34, such that for each of the eight possible 3-bit sequences stored in the shift register 20, a corresponding predicted bit X4 'can be generated. In the situation where the values counted equal Ni, 0 and Ni .1 have been derived for a tri-bit sequence i, one can choose one of the two binary values' O'o '1' randomly as the value for the predicted bit.

It will be noted here, that two counters for each 3-bit bit combination are used to count the numbers of 'zeros' and ones' following the 3-bit bit combination. Following this one can use only one counter that is able to count upwards on the occurrence of a 'bit' zero 'following the 3-bit bit combination. if the value counted at the end of the test procedure is greater than at the start of the test procedure, the predicted bit will be chosen 'zero. If the counted value appears to be less than the value counted at the beginning of the test procedure, the predicted bit will be chosen one '. If the signal to be processed is substantially invariant in time, it may happen that, on deriving a table conversion from a next portion of the bit string signal, the same predicted values X4 'will be obtained. In such a case, it is sufficient to derive the conversion table once. For data string signals having variant properties, it may be required to each time derive the conversion table from a subsequent portion of the bit string signal and to predict the portion of the bit string using its own conversion table. Figure 3 shows an additional elaborate version of the prediction unit 10 together with the combination unit signal 42. The input 8 of the prediction unit 10 is coupled to the first input 40 of a signal of the combination unit 42. An output 46 of the conversion means 26 ', which comprises the conversion table derived in the manner explained above with reference to Figure 2, is coupled to the second input 44 of the signal of the co-operation unit 42, an output 48 of which is coupled to the output 14 of the data processing apparatus. The signal combination unit 42 may be in the form of an EXOR, but the combination unit 42 may be of different construction, such as an EXNOR. In response to a tri-bit bit sequence XI, X2, X2 stored in the shift register 20, the conversion unit 26 'feeds the X4 at its output 46. This bit X4' is a prediction of the X4 bit present at the inputs of the shift register 20 and the combination unit 42. The combination unit 42 combines the bits X4 and X4'tal as to obtain a residual bit. On a subsequent clock signal (not shown) the bit X4 present at the input of the shift register 20 is traversed within the shift register 20, such that a new 3-bit bit sequence is stored in the shift register 20.1a unit Conversion 26 'generates a new bit prediction X4' in response to this new 3-bit bit sequence stored in the shift register 20. The signal combining unit 42 combines this new bit prediction X4 'with the new bit X4 now present to the input 40 such as to obtain a new residual bit. In this way, a bit string signal is obtained. Assume that the combination unit 42 is an EXOR, the residual signal has the following property. Assume that both bits X4 and X4 'are the same, that is,' 0 'or' '. The residual bit fed by the EXOR is '0'. Assume now that the bits X4 and X4'are not equal to each other. As a result, a bit '1' is generated as a residual bit by the EXOR 42. The occurrence of the bits '1' in the residual signal is then a measure of errors between the signal of the predicted bit string applied to the input 44 of the combining unit 42 and the bit string signal applied to the input 40. Fig. 4 shows an embodiment of a recording apparatus comprising the data processing apparatus shown in Fig. 1, which may include the unit of the prediction shown in Figure 3. The recording apparatus further comprises a data compression unit 150 for compressing the data of the residual bit string signal into a compressed residual bit string data signal and a writing unit 50. to write the compressed bit string data signal in a track on the record carrier 52. In the present example, the record carrier 52 is a magnetic record carrier, such that the writing unit 50 At least one magnetic head 54 for writing the residual bit string signal in the record carrier 52. The record carrier can however be an optical record carrier, such as a CD disk or a DVD disc. Figure 5 shows a mode of a transmitter for transmitting an audio signal via TRM transmission means, the data processing apparatus comprising as shown in figure 1, which may include the prediction unit shown in the figure 3. The transmitter again comprises a transmission unit 60 for applying the compressed bit string data signal to the transmission means TRM. The transmission unit 60 may comprise an antenna 62. Transmission via transmission medium, such as a radio frequency link or a record carrier, generally requires an error coding and an encoding channel carried out on the residual compressed data signal to be transmitted. Figure 6 shows that the processing steps carried out on the residual compressed data signal for the registration of the arrangement of Figure 4. The registration of the arrangement of Figure 6 therefore comprises an error correction encoder 56, either known in the art, and an encoder channel 58, also well known in the art. It has also been said above that, in some applications, it is sufficient to use a fixed conversion table to process the bit string signal. Upon reconverting the residual bit string signal into a replica of the original bitstream signal, also a fixed conversion table is sufficient. In an application where, for subsequent portions of the bit string signal each time a corresponding conversion table needs to be determined, to generate the residual bit string signal, it will be required to use the same conversion tables for the portions concerned about the reconversion of the bit string signal into the replica of the original bit string signal. In such a situation, it may be required to transmit the information side representative of the conversion tables used for the various subsequent portions together with the residual signal such that it enables reconversion upon reception. As a further example, if it appears that it is sufficient to use only two conversion tables in the processing apparatus of Figure 1, that side of the information could simply be a signal selection, selecting one of the two conversion tables. A corresponding retrofit apparatus could comprise the two tables, and the selection of the signal could be used to select one of the two conversion tables such as to convert the residual bit string signal into the replica of the bit string signal original. It should be noted that, when a conversion table is derived for a portion of the bit string signal, it is not absolutely necessary to transmit the information side corresponding to its conversion table for a reconverting device. The conversion device can generate the conversion table by itself. The prediction unit in the retrofit apparatus will have a low accuracy prediction at the start, but will 'learn' itself to obtain a prediction of the conversion rate, which will be substantially identical to the conversion table used in the conversion. transmitting device. Figure 7 shows a schematic embodiment of a second data processing apparatus according to the present invention, which is capable of converting the residual bit string signal into the replica of the original bitstream signal. The apparatus has an input terminal 70 to receive the residual bit string signal, as fed by the data processing apparatus of FIG. 1. The input terminal 70 is coupled to a first input 86 of a combination unit. signal 88, which has an output 76 coupled to an input 72 of a prediction unit 74 as is well known to an input 78 of a D / A converter 80. An output 98 of a mapping unit 74 is coupled to a second input 101 of a signal combining unit 88. An output 82 of the converter 80 is coupled to an output terminal 84. The apparatus of FIG. 7 receives the residual bit string via its input 70, which is supplied to the input 86 of the signal combining unit 88. The signal combining unit 88 combines the residual bit string signal received via its input 86 with a bit-chain signal predicted via its input 101 such that an ac signal is obtained. converted bit array, and to supply the converted bitstream signal to its output 76. The prediction unit 74 performs a prediction step on the converted bitstream signal such that said bitstream signal is obtained predicts at its output 98. The D / A converter unit 80 performs a conversion on the converted bitstream signal such that a replica of the original audio signal is obtained, which is supplied to the output terminal 84. The prediction unit 74 may have any shape, and may comprise an FIR filter or an IIR filter, where the filter coefficients are chosen (or derivatives) such that the output of the signal from the prediction unit 74 is the predicted version of the bit string signal. Another embodiment of the invention of the prediction unit 74 will be explained below with reference to FIG. 8. The output 72 of the prediction unit 74 is coupled to an input 92 of a 3-bit shift register 94. The three outputs of the following bit positions in the shift register 94 are coupled to their corresponding inputs of a conversion unit 96. The conversion unit 96 comprises the conversion table discussed and explained above with reference to FIGS. 2 and 3. An output 98 of the conversion unit 96 is coupled to a second input 101 of the combination unit 88. The signal combination unit 88. The signal combination unit 88 may be in the form of an EXOR, but the unit combination 88 may be of a different construction, such as an EXNOR. It is clear that, if the combining unit 42 of Figure 3 is an EXOR, the signal combining unit 88 of Figure 8 must be an EXOR, to generate a replica of the original bit string signal. In response to the 3-bit bit sequence xl, x2, x3 stored 'in the shift register 94, the conversion unit 96 supplies the bit x4' at its output 98, in the manner explained above with reference to FIGS. y3. This bit x4 'is a prediction of the bit x4 that will be supplied over the next clock pulse by the combination unit 88 and stored as the new bit x3 in the storage position further to the right of the shift register 94. The bit residual present at the input 86 of the combining unit 88 is combined with the bit x4 'predicted as to obtain the replica of the original bit x4 in the original bitstream signal. When the residual bit is "0", which means that a correct prediction was carried out in the apparatus of Figure 1 and 3, the combination of the residual bit results in the bit value of the x4 'bit to appear in the output 90 of the combination unit 88. When the residual bit is "1", which means that an incorrect prediction was carried out in the apparatus of figure 1 and 3, the combination of the residual bit with the x4 'bit results in the inverse bit value of x4 'of bit x4' to appear at output 90 of combining unit 88. In both cases, a correct replica of bit x4 will appear at output 76 of combining unit 88. Under a signal of the subsequent clock (not shown) the bit x4 present in the shift register 94 is diverted to the shift register 94, such that a new 3-bit bit sequence is stored in the shift register 94. The conversion unit 96 generates a new bit prediction x4 'in response to this new 3-bit bit sequence stored in the recorder 94. The signal combining unit 88 combines this new bit prediction x4 'with the next residual bit in the residual bit string signal applied to the input 86 to obtain a replicates the next bit x4 in the bit string signal. In this way, the replica of the bit string signal is obtained. Figure 9 shows the data processing apparatus of Figure 7 incorporated in a reproduction apparatus. The reproduction apparatus further comprises a data expansion unit 162 for expanding the compressed data of the residual bit string signal so as to obtain a replica of the original residual bit string signal and a reading unit 100 for reading the data. tablets of the residual bit string signal of a track on the recording carrier 52. In the present example, the recording carrier 52 is a magnetic recording carrier, such that a reading unit 100 comprises at least one magnetic head 102 for reading the compressed data of the residual bit string signal of 1 recording carrier 52. The recording carrier may however be an optical recording carrier, such as a CD disc or a DVD disc Figure 10 shows a mode of a receiver for receiving an audio signal via a TRM transmission means, it comprises the data processing apparatus as shown in Figure 7. The receiver further comprises the unit of data expansion 162 and a receiving unit 105 for receiving the residual bit string signal of compressed data of the transmission means TRM. The reception unit 105 could comprise an antenna 107. As explained below, transmission via a transmission medium, such as a radio frequency link or a recording carrier, generally requires an error correction coding and a coding of channel carried out in the residual signal of compressed data to be transmitted, such that a corresponding channel decoding and error correction can be carried out under reception. Figure 11 shows the processing steps of the channel decoding signal and error correction carried out on the received signal, received in the reading means 100 by the reproduction arrangement of figure 9. The reproduction arrangement of the Figure 11 therefore comprises a channel decoder 110, well known in the art, and an error correction unit 112, also known in the art, such as to obtain a replica of the residual bit string signal of compressed data. It has also been said above that, in some applications, it is sufficient to use a fixed conversion table to process the bitstream signal in the apparatus of FIGS. 1 and 3. Under the reconversion of the residual bitstream signal to a replica of the original bitstream signal, also a fixed conversion table is sufficient such that lateral information is not necessary to be transmitted to the processing apparatus of Figures 7 and 8. In an application where, for subsequent parts of the bit string signal each time a corresponding conversion table needs to be determined in the apparatus of FIGS. 1 and 3, to generate the residual bit string signal, the use of the same conversion table for the parts will be required in question under reconversion the residual bit string signal to the replica of the original bitstream signal in the apparatus of FIGS. 7 and 8. In such a situation it will be required to transmit Representative lateral information of the conversion tables used by the various subsequent parties together with the residual signal as to enable reconversion under reception. As an example, this lateral information in this manner needs to be recorded in the recording carrier 52, such as in the application where the apparatus of FIGS. 7 and 8 is accommodated in a recording apparatus and the apparatus of FIGS. 7 and 8. it is incorporated in a reproduction apparatus of Figure 9 or 11, and reproduced from said recording carrier under reproduction. If it appears that this is sufficient to use only two conversion tables in the processing apparatus of Figure 1, such information could simply be a selection signal, selecting one of two possible conversion tables. A corresponding conversion apparatus could comprise the two conversion tables and the selection signal could be used to select one of the two conversion tables to convert the residual bit string signal into the replica of the original bitstream signal .

The embodiments described above are based on the prediction of bit 1 (x4 ') followed by a sequence of three subsequent bits (xl, x2, c3) in the bitstream signal. In general, the prediction unit may be capable of predicting n subsequent bits in the bit string signal m predicted bits, said m predicted bits being predicted versions of m subsequent bits in the bitstream signal followed by n bits subsequent in the bit string signal, where n and m are integers greater than zero. Figure 12 shows an example of how to derive a conversion table which is capable of predicting one or two predicted bits of a sequence of consecutive 4 bits xl, x2, x3, x4 in the bitstream signal. Figure 12 shows a part of another prediction unit 10 ', which comprises a 4-bit shift register 20' having an input coupled to the input 8 of the prediction unit 10 '. Under the application of four clock pulses (not shown) to the shift register 10 ', four subsequent bits xl, x2, x3, x4 of the bitstream signal applied to the input 8 is diverted to the shift register 20'. A detector 22 'is present and has an input 24 coupled to the input 8 of the prediction unit 10'. The detector 22 'detects the bit value of the following two bits x5, x6 directly followed by the subsequent 4 bits xl, x2, x3, x4 in the signal e bitstream. In addition, a counter 26"is present and which counts the number of times that a" 0"bit follows a four-bit bit sequence specifies xl, x2, x3, x4, the number of times a bit" 1"follows that same sequence of bits of four specific bits, the number of times that a bit sequence of two bits" 00"follows that same sequence of bits of four bits specifies xl, x2, x3, x4, the number of times that a two-bit bit sequence "01" follows that same four bit specific bit sequence, the number of times a bit sequence of two bits "10" follows that same four-bit bit sequence specifies xl, x2, x3, x4, and the number of times that a sequence of two-bit bits "11" follows that same sequence of four-bit bits specifies. It would be noted here, that the combination of two bit bits? Bl, b2 'will be expressed such that the first bit bl is bit x5, where the second bit b2 is bit x6. Assume that the detector 22 'has detected that two bits x5, x6 equal to "01". As a result, the counter 26"increases the count value Ni, 0 in the column 28 'by one and the count value Ni, 3 in the column 30' by one, where y runs from 0 to 15 and corresponds to the i-nesima four bit bit sequence given in column 32 'of the table of figure 12.

Then, under the application of a number of P pulses of the clock to the apparatus of Figure 12, where P does not necessarily need to be equal to 2, but may be greater, another sequence of bits of 4 bits xl, x2, x3, x4 of the bit string signal is stored in the shift register 20 '. The detector 22 'detects the bit values of the next two bits x5, x6 in the bitstream signal followed by said four bit bit sequence. Assume, that the next two bits equal "11". As a result, the counter 26 '' increments the count value Ni, l in the column 29 by one and the count value Ni, 5 in the column 31 by one, where y corresponds to the four-bit bit sequence stored in the register 20 ', which is assumed to be the i-nested four-bit bit sequence given in column 32' of the table of figure 12. This procedure is repeated a plurality of times, such that for all possible bit sequences of four bits xl, x2, x3, x4 The counting values Ni, 0 to Ni, 5 have been obtained. The counting values Ni, 0 to Ni, 5 indicate the number of occurrences of one-bit and two-bit sequences following the i-nested 4-bit sequence given in column 32 '. Then, either a binary value x5 'or a binary sequence of two bits predicted x5', x6 'is derived, based on the count values in s columns 28', 29, .... to 31, for each of the four-bit sequences xl, x2, x3, x4 in column 32. Assume that the count value Ni, 0 or the count value Ni, l of the six count values Ni, 0 to Ni, 5 for the i-nested 4-bit bit sequence in column 32 'is substantially greater than everyone else. In such a situation, one can decide to choose bit "0" or bit "1", respectively, as the prediction bit x5 ',. Assume that Ni, 0 and Ni, 2 does not make much difference and is greater than the other four count values. In such a situation, one could decide to choose the bit combination "00" as the prediction bits x5 ', x6' for the i-nesse bit sequence. In this way, the obtained conversion table can thus comprise a column 33 which can comprise either a bit value as a prediction bit to predict the bit that follows a four bit sequence specified in the signal of a bit string, or a two-bit binary word as a two-bit prediction word to predict the word that follows another four-bit bit sequence in the bitstream signal. Fig. 13 schematically shows another embodiment of the data processing apparatus for processing data of an audio signal, which comprises a conversion unit 130 in the form of a conversion table as explained with reference to Fig. 12. means that the conversion table comprises columns 32 'and 33 given in Figure 12, such that upon receipt of a four-bit bit sequence xl, x2, x3, x4, as given in column 32', a specific prediction bit x5 or two specific prediction bits x5, x6 will be generated at the output 131 of the conversion unit 130. The operation of the apparatus of Fig. 13 is as follows, in response to the stored four-bit bit sequence in the shift register 20 'the conversion unit 130 generates, as an example, a one-bit word, equal to "1". This is the case when a four-bit sequence "0000" is stored in the shift register 20 '. The column 33 shows that under such a sequence of four bits, see column 32 'in the table of figure 12, a bit "1" is predicted, see column 33 in the table of figure 12. the bit predicted x5 'is fed to the input 44 of the combining unit 42 in which the predicted bit x5' is combined with the real bit x5 in the bit string present in the input 40. Then, under a clock pulse, generated in a central processing unit 132, the information of the shift register 20 'is diverted to a position on the left, such that the bit x5 is now stored in the right storage location of the shift register 20'. Assume, this bit was effectively a "1" bit, as predicted. Then, the conversion unit converts the four-bit sequence "0001" stored in the shift register 20 'into a two-bit word "01", see columns 32' and 33 in the table of FIG. 12, in the which the 2-bit word is fed to the input 131. The central processing unit 132 now generates 2 clock pulses such that the 2-bit prediction word "01" can be combined in the combination unit with the bits current x5, x6 in the bit string signal. The two clock pulses also result in a change in two positions to the left in the shift register 20 'such that the shift register has the values "0" and "1" stored in the positions in the shift register 20'. , indicated in xl and x2, and The current bits x5 and x6 mentioned above are now stored as the new bits x3 and x4 in the shift register 20i '. In this way, under a one-bit prediction, the central processing unit 132 generates a clock pulse, after which a subsequent prediction step is carried out, while, under the prediction of a 2-bit word., the central processing unit 132 generates two clock pulses before the subsequent prediction step carried out.

Assume that, for subsequent parts of the bitstream signal, a corresponding conversion table is derived first, eg. in the manner explained above with reference to Figure 12, it is desired to transmit the conversion table together with the residual bit string signal as to enable reconversion upon receipt of the residual bit string signal. Fig. 13 shows a connection 135 between the prediction unit 26 '' 'and the central processing unit 132. Via this connection, the conversion table derived in the manner described with reference to Fig. 12 can be fed to the unit. central processing 132 and subsequently powered to an output 137 for transmission together with the residual bit signal via the transmission medium. Figure 14 shows a corresponding apparatus for converting the residual bitstream signal fed by the apparatus of Figure 13. The apparatus of Figure 14 shows a great resemblance to the apparatus of Figures 7 and 8, in the sense that the signal combination unit 88 and D / A converter 80 are therein, as in the signal combination unit and the D / A converter respectively of figure 7. The input 72 of the prediction unit 74 'is coupled to an input 92 of a four-bit shift register 94 '. The four outputs of the four four-bit positions in the shift recorder 94 are coupled to corresponding inputs in the conversion unit 96 '. The conversion unit 96 'comprises the conversion table discussed and explained above with reference to Fig. 12. An output 98 of the conversion unit 96' is coupled to a second input 101 of the signal combining unit 88. In response to a 4-bit bit sequence xl, x2, x3, x4 stored in the shift register 94 ', the conversion unit 96' feeds either a 1 x 5 'bit at its output 98 or a 2-bit word x5 ', x6', in the manner explained above with reference to figure 12. This bit x5 'is a prediction of the bit x5 given in the conversion table 96', which will be fed under the next clock pulse in the unit of combination 88 and as the new bit x4 in the right storage position of the shift recorder 94 '. The residual bit present in the input 86 of the combination unit 88 is combined with the predicted bit x5 'under the clock pulse generated in the central processing unit 140, such as to obtain the replica of the original bit x5 in the chain signal of original bits. When the residual bit is "0", which means that a correct prediction has been made in the apparatus of Figure 13, the combination of the residual bit with the predicted bit x5 'results to the right of the x5' bit to appear in the output 90 of the combination unit 88 as the bit x5. When the residual bit is "1", which means that an incorrect prediction has been made in the apparatus of Figure 13, the combination of the residual bit with the predicted bit x'5 'results in the reverse right of the x5' bit to appear at the output 90 of the combination unit 88 as the bit x5. in both cases, a correct replica of the bit x5 will appear in the output 76 of the combination unit 88. The 2-bit prediction x5 ', x6' is a prediction of the 2-bit word x5, x6, generated in the conversion table 96 ', which will be applied under the next clock pulse of the central processing unit 140 in the combination unit 88 and stored as the new 2-bit word x3, x4 in the 2 right storage positions of the recorder of change 94 '. Two residual bits present in the input 86 of the combining unit 88 are combined with the 2-bit word predicted x5 ', x6' as to obtain the replica of the original 2-bit word x5, x6 in the string signal of original bits. When the two residual bits are "0.0", which means that a correct prediction was made in the apparatus of Figure 13, the combination of the residual bits with the predicted bits x5 ', x6 'results in the right of the two bits x5', x6 'to appear at the output 90 of the combination unit 88 as the bits x5, x6. When the residual bits were "1.1", which means that an incorrect prediction was made in the apparatus of figure 13 in both of bits x5 and x6, the combination of the two residual bits with the predicted bits x5 ', x6 'results in inverse bit values of the bits x5', x6 'to appear at the output 90 of the combination unit 88 as the bits x5, x6. When one of the two residual bits is "1" and the other is "0", this means that one of the prediction bits is erroneous and would be inverted in order to obtain the correct bits x5, x6. In all cases, a correct replica of the 2-bit word x5, x6 will appear at the output 76 of the combination unit 88. In the situation where, for subsequent parts of the bitstream signal, a conversion table corresponding one is derived first in the apparatus of figure 13, eg. in the manner explained above with reference to Figure 13, this is desired to transmit the conversion table together with the residual bit string signal to enable reconversion upon receipt of the bitstream signal in the apparatus of Figure 14 Figure 14 therefore shows an input terminal 142 for receiving the conversion table. The input terminal 142 is coupled to the central processing unit, which has a connection 144 with the prediction unit 96 '. Via this connection, the conversion table can be fed to the prediction unit 96 '. It has been said above that a data compression step is carried out on the residual bitstream signal before transmission. Preferably, a data compression using an encoder without loss is performed. Lossless encoders have had the advantage that they can compress the audio signal in such a way that, after the data expansion in a decoder without loss, the original audio signal can be reconstructed in a substantially lossless manner. That means that there is no substantial loss of information after compression - expansion. Non-lost encoders can be in the form of a variable length encoder. Variable length encoders are well known in the art. Examples of such variable length encoders are Huffman encoders, arithmetic encoders and Lerapel-Ziv encoders. Reference is made in this regard to the publication A method for the construction of minimum-redundancy codes' by D.A. Huffman, document D4 in the list of related documents, "An introduction to arithmetic coding" by C.C. Langdon, document D5 in the list of related documents, and "A universal algorithm for sequential data compression" by J.Ziv et al, document D6 in the list of related documents. Figure 15 shows a mode in which the apparatus in Figure 1 is followed by a data compression unit 150, such as an encoder without loss. The residual bit string of compressed data is recorded in an optical recording carrier 156 by means of an optical recording unit 154. FIG. 16 shows the corresponding reproduction of the optical recording carrier. The apparatus shown in FIG. 16 comprises a data expansion unit 162, such as a lossless decoder, which performs a data expansion step on the residual bit string signal of compressed data. The regenerated residual bit string signal is fed to the input 70 of the apparatus of FIG. 7. A further modification of the embodiment of FIG. 1 is as follows. In this modification, the prediction unit 10 is coupled between the output of the signal combining unit 42 and the input 44 of the signal combining unit 42. In this modification, the predicted version of the bitstream signal is derived in the prediction unit of the residual signal, fed into the signal combining unit 42. This modification is shown in Fig. 18, which is in fact identical to the circuit construction of the prediction unit and the signal combination unit shown in Fig. 7. in an equivalent manner, a further modification of the embodiment of Figure 7 is as follows. In this modification, the prediction unit 74 is coupled between the input terminal 70 and the input 101 of the signal combining unit 88. In this modification, the predicted version of the bitstream signal is derived in the unit of prediction of the residual signal, fed to the processing apparatus via the terminal 70. This modification is in fact identical to the circuit construction of the prediction unit and the signal combination unit shown in FIG. 1. A further improvement of the data processing can be obtained in a specific mode of the prediction unit, such as the prediction unit 10 in figure 1. In this specific mode, the prediction unit 10 is provided with an integrator to integrate the input signal, which is a representation of the bit string signal in the sense that the input signal has -1 and +1 representation values to represent the bits " 0"and" 1"in the bit string signal, the integrator simply adds all the representation values so its instantaneous output is cumulative sum of all -1 and +1 values that it has received. The prediction unit does in fact generate a pseudo audio signal and the predicted bit for the bit string signal to be fed to the output 12 is derived from this pseudo audio signal in the following manner. The predictor is derived from the last n values displayed by the pseudo audio signal generated in the integrator by a prediction value for the next sample of the pseudo audio signal. The next value of the last sample of the generated pseudo audio signal is compared to the predicted value of the next sample. If, viewed along an amplitude axis, the value of the last sample of the pseudo audio signal is smaller than the prediction value of the next sample, it is concluded that the next bit predicted in the bit string signal predicted corresponds to the value +1 (or "1" logical) and when the value of the last sample of the pseudo audio signal is greater than the prediction value of the next sample, it is concluded that the next bit predicted in the signal of bit string corresponds to value -1 (or logical "0"). The predicted bits are fed to the output of the prediction unit 10 as the predicted bitstream signal. The predicted value of the following sample can be obtained in approximation to the last n (which eg. equal to 40) samples of the pseudo audio signal with a straight line. It will be understood that more sophisticated approach procedures (filtering techniques) are also able to predict the value of the next sample. In such a situation, as stated above, the filter coefficients for such filters would be derived from the signal at the frame bases and transmitted as to enable a corresponding decoding at the receiver side. Another data processing apparatus is shown in Figure 19. In the data processing apparatus of Figure 19, the bit string signal is fed to the input 44 of the signal combining unit 42, and via a filter of prediction 10 'and a quantizer Q to the input 40 of the signal combining unit 42. The apparatus is further provided with a data compression unit 150' which comprises an entropy encoder 154 and a probability determination unit. 156. In the present example, the entropy encoder 154 is in the form of an arithmetic encoder for encoding the residual bit string signal to a residual bit string signal of compressed data in response to the p-probability values fed. at its input 192. The probability determining unit 156 determines a probability value by indicating the probability that a bit in a bit string signal supplied by the combination unit n 42DE has a predetermined logical value, such as? l '. This probability value, denoted p in FIG. 19, is supplied to the arithmetic encoder 154 to enable data compression of the data string signal of the residual data string signal in the arithmetic encoder 154. The determining unit 156 determines this probability value from the output signal of the predictor filter 10 'this is different from what one expects when using an arithmetic encoder unit in the data compression unit 150, such as in Fig. 4 or 15, for compress the residual bit string signal. When using an arithmetic coder in the compression unit 150, the probability unit 156 will derive the probability value from the residual bit string signal itself. In the embodiment of Figure 19, however, the determining probability unit 156 derives the probability value from the output signal generated by the predictive filter 10 ', this is an advantage, in that the high compression ratio can be obtained with the arithmetic coder 154. The arithmetic coder 154 can compress data of the residual bit string signal based on a frame. The operation of the apparatus of figural9 is as follows. The prediction filter 10 'performs a filtering prediction in the bit string signal such that a multi bit output signal is obtained. the multi-bit output signal has a plurality of levels within a range of eg. +3 and -3. A Q quantizer receives a multi bit output signal and generates a bit string signal from there, eg. By assigning a bit the logical value? L 'if the multi-bit output signal has a positive value and assigning a value of? 0' to one bit if the multi-bit output signal has a negative value. In addition to each of the plurality of sub-levels in the range of the value of the multi-bit output signal, it is determined that the probability is the corresponding bit in the residual signal is eg. One l 'bit. This can be done through the account of the ones? and 'zeros' occurring in the residual bit string signal during a specific time interval, when the multi bit output signal falls in one of such ranges. The probabilities then obtained by several values in the multi-bit output signal is subsequently supplied as the probability signal p to the arithmetic coder 154. The compressed residual bit-chain signal is supplied by the arithmetic coder 154 to an output line 158, for transmission via TRM transmission medium. Figure 20 shows a corresponding data processing apparatus for decoding the compressed residual bit string signal, received via transmission means TRM. The data processing apparatus of Figure 20 comprises an entropy decoder 172, which receives the compressed residual bit string signal via input 174. In the present example, the entropy decoder 172 is in the form of an arithmetic decoder. which carries out a decoding step on the compressed bit string data signal under the influence of a probability signal p, supplied to an input 176 such as to generate a replica of the original residual bit string signal which is supplied to the output 178. The replica is supplied to the input d86 of the signal combination unit. The signal combining unit 88 also receives a predicted version of the bitstream signal via the input 101 and generates the replica of the original bitstream signal at its output 76. The output 76 is coupled via the lossfilter 74 'and a Q-tuner to the input 101 of the signal combining unit 88. The operation of the prediction filter 74' and the quantizer Q in FIG. 19, which is: the preaching filter 74 'derives its filter coefficients from the input signal and receives via its input 72. In another embodiment, the prediction filter 74 'receives the filter coefficients from the side of the information received via the transmission means TRM from the coding apparatus of figure 19, as will be explained down. In addition, a probability supply unit 180 is present to supply the signal p to the arithmetic decoder 172. The probability signal p can be obtained in different ways. One way is, to derive the probability signal p from the output signal of the prediction filter 74 ', in the same way that the probability determining unit 156 then determines the probability signal p from the prediction filter 10' in the Figure 19. In such a situation, the supply unit 180 in Figure 20 can be identical to the determining unit 156 in Figure 19, and the unit 180 in Figure 20 can be identical to the determining unit 156 in Figure 19, and the supply unit 180 has an input coupled to the output of the prediction filter 74 '. Another way to generate the probability signal p is through the use of the information side received via the transmission means TRM, as will be explained below. The information side can be generated by the apparatus of Figure 19 for transmission to the apparatus of Figure 20. Such an information side can include the filter coefficients for the filter 10 'that are determined in a frame by frame basis, said coefficients are transmitted to the filter 74 'to adjust the characteristics of the correct filter of the filter 74'. In addition, the apparatus of FIG. A1 can generate parameters that describe the conversion of the multi-bit output signal of the prediction filter 10 'to the probability signal p. Such parameters are also included in the information side and transmitted to the supply unit 180, such as to enable the regeneration of the probability signal p in the apparatus of FIG. 20. In the above-described embodiments of FIGS. 19 and 20 , is explained as the probability signal p can be derived from the multi-bit output signal from the prediction filter 0 'and 74' respectively. It should be noted that the application of the arithmetic coder also possible in the data processing apparatus that derive the predicted signal in a different way. Reference is made in this respect to the modes shown in Figure 1, where the prediction unit is in the form broken down in figures 2 or 12. Now another way of deriving the probability signal p is required. It will be clear that, in the modalities of the prediction unit as shown in Figures 2 and 12, the probability signal p can be derived from the counter numbers derived in the detector 22 and 22 'respectively.

The entropy encoder used in the mode detector of FIG. 19 is adapted to encode the residual bit string signal using pair to obtain the residual compressed data of the bit string signal. one such entropy coder is the arithmetic coder described above. One of another type of such entropy encoders is, as an example, the well-known finite state encoder. The entropy decoder used in the embodiment of FIG. 20 is adapted to decode the compressed residual bit string signal using a probability signal to obtain a replica of the residual bit string signal. One such entropy decoder is the decoder described above. One of the other type of such entropy decoders is as an example, the well-known finite state decoder. While the invention has been described with reference to the preferred embodiments, it is to be understood that they are not limiting examples. Then various modifications may be apparent to those skilled in the art, without departing from the scope of the invention, as defined by the clauses. When the audio signal is supplied in digital form, such as the sample at 44.1kHz and the samples being expressed in eg. 16 bits the A / D conversion media are adapted to over sample the digital audio signals with eg. The frequency of 64 x 44.1 kHz such that the 1-bit bit string signal is obtained which is supplied to the prediction unit 10. Further, as a reference to the conversion tables, such as one shown and described in the figure 12, the following can be said. In the phase of deriving the conversion table, the counted values that are bit sequences 0,0,0,0 and 0,0,10 may occur, as an example, resulting in the same prediction of bit, that the sequences 0 , 0,0,1 and 0,0,1,1 resulting in the same bit prediction as the sequences 0,1,0,0 and 0,1,1,0 resulting in the same bit prediction as the sequences of bits 1,1,0,0 and 1,1,1,0 resulting in the same bit prediction, as the bit sequences, 1,1,0,1 and 1,1,1,1 resulting in the same prediction of bits, and that the bit sequences 0,1,0,1 and 0,1,1,1, resulting in the same bit prediction. In this situation, the bit x3 is indeed a bit without care and the prediction of bits x4 or x4, x5 can be predicted from the combination xl, x2, x4 only.

List of related documents.

(DI) EP-A 402973 (PHN 13.241) (D2) "A digital decimating filter for analog-to-digital conversion of hi-fi audio signáis", by J.J. van der Kam at Philips Techn. rev 42, no. 6/7. April 1986. pp. 230-8 (D3) A higher order topology for interpolative modulators for oversampling A / D converters ", by Kirk CH Chao et al in IEEE Trans on Circuits and Systems, Vol.3, No. 3, March 1990, pp. 309- 18 (D4) "A method for the construction of minimum-redundancy codes" by DA Huffman in Proc. Of the IRÉ, Vol. 40 (10), September 1952. (D5) "An introduction to arithmetic coding" by GG Langdon, IBM J. Res. Develop., Vol. 28 (2), March 1984 (D6) "A universal algorithm for secuential data com-pression" by J. Ziv et al, IEEE Trans. On Infor. Theory, Vol. IT- 23. 1977 (D7) EP- patent application No. 96202807.2, filed on 10-10-96 (PHN 16.029)

Claims (32)

1. Claims: 1. Data processing apparatus for processing an audio signal, the data processing apparatus comprising - input means for receiving the audio signal, conversion means for carrying out the conversion in the audio signal such that a 1-bit bit-bit signal is obtained, the conversion means comprise sigma-delta modulation means, - prediction means for carrying out a prediction step in a signal such that a predicted bit-chain signal is obtained, signal combining means for combining the bit string signal and the predicted bit string signal such that a residual bit string signal is obtained, and output means for feeding the residual bit string signal.
2. 2. Data processing apparatus as claimed in clause 1, wherein the audio signal is an analog audio signal and the conversion means comprise A / D conversion means to perform a 1-bit conversion in the analog audio signal such that said bit string signal is obtained.
3. 3. Data processing apparatus as claimed in clause 2, wherein said A / D conversion means is a sigma-delta modulator.
4. 4. Data processing apparatus as claimed in clauses 1, 2 or 3, where the prediction means comprise a predictor unit for predicting from n subsequent bits in the bit-chain signal m pre-dicted bits, said prediction of m bits being prediction versions of m subsequent bits in the bit string signal, where m and n are integers greater than zero.
5. 5. Data processing apparatus as embodied in clause 4 wherein the signal combining means is adapted to combine the prediction of m bits with said subsequent m bits in the bit string signal such as to obtain m subsequent bits of the residual bit string signal.
6. 6. Data processing apparatus as claimed in clause 5, wherein the signal combining means comprises an EXOR gate.
7. 7. Data processing apparatus as claimed in clauses 4, 5 or 6, where the prediction means comprise a conversion table for feeding the m predicted bits in response to the n-bit sequence of the string signal of bits.
8. 8. Data processing apparatus as claimed in clause 7, where the conversion table is adapted to feed my prediction bits for a first n-bit sequence of the bit string signal and m2 bits predicted for the second bit string in the bit string signal, where mi and m2 are integers that are not equal to each other.
9. 9. Data processing apparatus as claimed in any of clauses 4 or 8, wherein the means of prediction comprise means of calculation to determine for a portion of the bit chain those sequences of m bits following a certain sequence of n subsecond -th bits of the bit string signal having the highest probability of occurrence after the occurrence of said predetermined sequence of the n bits in the bit string signal, and designating means to designate that the sequence of m bits as the m bits predicted to the predefined sequence of n bits.
10. 10. Method of processing data to process an audio signal, the method of data processing comprises the steps of receiving the audio signal, - carrying out a conversion in the audio signal such that a signal of 1- is obtained bit bit chain, the conversion step comprises a sigma-delta modulation step, carrying out a prediction step in a signal such that a predicted bit string signal is obtained, - combining the bit string signal and the signal bit-predicted signal such that a residual signal is obtained, and feed the residual signal.
11. 11. Transmitter for transmitting an audio signal via transmission medium, comprising the data processing apparatus as claimed in any of clauses 1 to 9, wherein the transmitter further comprises data compression means for compressing the residual bit string signal, - transmission means for feeding the residual bit signal code compressed to the transmission medium
12. 12. Transmitter as claimed in the clause 11, comprising the data processing apparatus as claimed in clause 7 or 8, wherein the transmission means are further adapted to be applied to the side of the representative information of a conversion table for the transmission medium.
13. 13. Transmitter as claimed in clause 11, wherein the transmission means further comprises error correction coding means and / or encoding media channels, for error correction coding and / or encoding channel of the signal of residual bit string compressed prior to the residual bit string signal to the transmission medium.
14. 14. Transmitter as claimed in any of clauses 11 to 13, wherein the transmitter is in the form of an apparatus for recording an audio signal in a record carrier, and the transmission means are in the form of writing means to write the residual bit string signal in a track on the register carrier.
15. 15 Transmitter as claimed in clause 14 where the record carrier is an optical or magnetic record carrier.
16. 16. Record carrier having a bit string signal registered therein on the track of said record carrier.
17. 17. A data processing apparatus for processing data from a bitstream signal such that a replica of an original audio signal is obtained, the data processing apparatus comprises input means for receiving the residual string signal of bit signal combining means for combining the residual bit string signal with a predicted bit string signal such that a converted bit string signal is obtained, prediction means for carrying out a prediction step on a signal such that said predicted bit string signal is obtained, - conversion means for carrying out a D / A conversion on the converted bitstream signal such that the replica of the original audio signal is obtained, Output means for feed the replica of the original audio signal.
18. 18. Data processing apparatus as claimed in clause 17, wherein the D / A conversion means comprise a sigma-delta demodulator.
19. 19. Data processing apparatus as claimed in clause 17 or 18, wherein the prediction means comprises a prediction unit for predicting from n subsequent bits in the converted bitstream signal m predicted bits, said m predicted bits being prediction versions of m subsequent bits in the bitstream signal converted following said n subsequent bits in the converted bitstream signal, where m and n are integers greater than zero.
20. 20. The data processing apparatus as claimed in clause 19, wherein the combining means is adapted to combine the m predicted bits with m bits in said residual bit string signal such that said subsequent m bits are obtained in the signal of converted string of bits.
21. 21 Data processing apparatus as claimed in clause 20, where the means of combination comprise an EXOR gate.
22. 22. Data processing apparatus as claimed in clauses 19, 20 or 21, wherein the prediction means comprises a conversion table for feeding the m predicted bits in response to the sequence of the n bits from the converted bitstream signal .
23. 23. Data processing apparatus as claimed in clause 22, where the conversion table is adapted to feed bits predicted for a first sequence of n bits of the reconverted bit string signal and m2 bits predicted for a second sequence of n bits in the reconverted bit string signal, where mi and m2 are integers that are not equal to each other.
24. 24. Data processing method for processing data from a residual bit string signal such that a replica of an original audio signal is obtained, the data processing method comprising the steps of receiving the bit string signal residual, combining the residual bit string signal with a predicted bit string signal such that a converted bit string signal is obtained, - will carry out a prediction step on a signal such that said bit string is obtained. predicted bit, carry out a D / A conversion in the converted bitstream signal such that the replica of the original audio signal is obtained, feeding the replica of the original audio signal.
25. 25. Receiver for receiving an audio signal via transmission means, comprising the data processing apparatus as claimed in any of clauses 18 to 24, wherein the receiver further comprises receiving means for recovering a residual bit string signal from the transmission means, data expansion means for expanding the compressed data of the bit string signal such that said residual bit string signal is obtained.
26. 26. Receiver as claimed in clause 25, comprising the data processing apparatus as claimed in clause 22 or 23, wherein the receiving means are further adapted to retrieve information from the re-presentative side of a conversion table from the transmission medium.
27. 27. Receiver as claimed in clause 25, wherein the receiver further comprises decoding channel means and / or error correction means, for the channel decoder and / or correcting error of the signal recovered from the transmission medium. such that said compressed residual bit string signal is obtained.
28. 28. Receiver as claimed in any of clauses 25 to 27, wherein the receiver is in the form of an apparatus for reproducing an audio signal from the record carrier and the reception means are in the form of means of read to read the residual bit string signal from a track on the record carrier.
29. 29. Data processing apparatus for processing a bit string signal, the data processing apparatus comprising: input means for receiving a 1-bit signal bitstream, prediction means for carrying out a prediction step in a signal such that a predicted bit string signal is obtained, signal combining means for combining the bit-string signal and the predicted bit-string signal such that a residual bit-string signal is obtained, and - data compression means for compressing the data of the residual bit string signal, the data compression means being in the form of an entropy encoder for entropy encoding the residual bit string signal in response to the probability of signal such that a compressed residual bit string signal is obtained, the apparatus further comprising the means of determining signal probability to determine said signal probability from the prediction means and output means for feeding the residual bit string signal of compressed data.
30. 30. Data processing apparatus as claimed in clause 29, wherein the prediction means comprises prediction filter means for carrying out a prediction filter operation on the bit string signal fed to its input such that a muti-value output signal and quantizing means to carry out a quantization step in the multi-value output signal such that the predicted bit-string signal is obtained, and where the means for determining probability are adapted to derive said probability signal from the multivalue output signal.
31. 31. Data processing method for processing a signal bitstream data, the data processing method comprising the steps of - receiving a 1-bit signal bitstream, carrying out a prediction step in such a signal that a predicted bit string signal is obtained, combining the bit string signal and the predicted bit string signal such that a residual bit string signal is obtained, and compressing the residual bit string signal data by an encoder of entropy the residual signal in response to the signal probability such that a compressed residual bit string signal is obtained, the data compression step further comprises the sub-step of determining said signal probability, and feeding the signal of residual compressed bit string.
32. 32. The method of data processing as claimed in clause 31, wherein the prediction step comprises the substeps of carrying out the prediction filtering operation on the bit string signal such that a multi-valued output signal is obtained and a quantization step is carried out on the multi-value output signal such that the predicted bit-chain signal is obtained, and where the sub-step of determining the probability comprises deriving said probability signal from said multi-value output signal. 3.3. Data processing apparatus for processing a bit string signal, the data processing apparatus comprises input means for receiving a 1-bit signal bitstream, prediction means for carrying out a prediction step on a signal such that a predicted bit string signal is obtained, signal combining means for combining the bit string signal and the predicted bit string signal such that a residual bit string signal is obtained, - output means for feeding the residual bit string signal where the prediction means comprises integration means for carrying out an integration operation on the bit string signal fed to its input such that a pseudo audio signal is obtained, - extrapolation means pair deriving an extrapolated sample from at least the n samples of the audio signal generated by the integrator means and bypass means to derive a following bit value of the bit-string signal predicted from the extrapolated sample and at least one pseudo-audio signal sample generated by the integrator means, where n is an integer value greater than 1. 34. data processing method for processing data from a bit string signal, the data processing method comprises the steps of - receiving the 1-bit signal bitstream, carrying out a prediction step on a signal such that a predicted bitstream signal is obtained , combining the bit string signal and the predicted bit string signal such that a residual signal is obtained, and - feeding the residual signal, wherein said prediction step comprises the steps of the substeps of - carrying out an operation of integration in the received bit string signal such that a pseudo audio signal is obtained, -derivate an extrapolated sample from at least n samples of the pseudo audio signal generated in the integration sub-step, -derivate a following the bit value of the bit-string signal predicted from the extrapolated sample and the last sample of the pseudo-audio signal generated in the integration sub-step, where n is an integer value greater than 1. 35. Data processing apparatus for processing a data of the compressed bit string signal such that a replica of a bit string signal is obtained, the data processing apparatus comprising even input means receiving the data of the compressed bit string signal means of expansion of data in the form of an entropy decoder to decode in entropy the data of the compressed bit string in response to the probability signal such that a replica of said residual bit string signal is obtainedmeans for feeding said signal probability means of combining signal to combine the residual bit string signal with a predicted bit string signal such that a converted bitstream signal is obtained, prediction means for performing a prediction step in a signal such that said predicted bit string signal is obtained, output means for feeding the converted bitstream signal. 36. Data processing method for processing a compressed residual bit string signal such that a replica of the bitstream signal is obtained, the data processing method comprising the steps of receiving the bitstream data signal compressed residual, expand data from the compressed bit string data signal such that a replica of the residual bit string signal is obtained, and the data expansion step comprises the step of performing an entropy decoding step in The residual bit string signal in response to the probability signal and the step of supplying said probability signal combine the residual bit string signal with a predicted bit string signal such that a string signal is obtained. reconverted bit, carrying out a prediction step in the signal such that said predicted bit string signal is obtained, supplying the converted bitstream signal. 37. A data processing apparatus for processing data from a residual bit string signal such that a replica of a bitstream signal is obtained, the data processing apparatus comprising - input means for receiving the data. residual bit string signal, signal combining means for combining the residual bit string signal with a predicted bit string signal such that a converted bit string signal is obtained, prediction means for carrying out a step of prediction in a signal such that said predicted bit string signal is obtained, output means for supplying the converted bitstream signal. Where the prediction means comprises integrator means for carrying out an integration operation on the signal supplied to its input such that a pseudo audio signal is obtained, extrapolation means for deriving an extrapolated value of at least n samples of the pseudo signal audio generated by the integrating means, - derivation means for deriving a next bit value from the predicted bit string signal of the extrapolated sample and the last sample of the pseudo audio signal generated by the integrator means, where n is in integer value greater than 1. 38. Data processing method to process data from a residual bit string signal such that a bit string signal replication is obtained, the data processing method comprises the steps of receiving the Residual bit string signal - Combine the residual bit string signal with a bit string signal with a predicted bit string signal such that a reconverted bit string signal, get a converted bit string signal, - carry out a prediction step on a signal such that said predicted bit string signal is obtained, Supply the converted bit chain signal, Where said prediction step comprises the substeps of - Carrying out an integration operation on a bit string signal such that a pseudo audio signal is obtained, Deriving an extrapolated sample of the latter n samples of the pseudo audio signal generated in the integration sub-step, Derive a next bit value of the predicted bit-string signal of the extrapolated sample and the last sample of the pseudo-audio signal generated in the integration sub-step, where n is an integer value greater than 1. 40. Transmission signal comprising a residual bit string data signal, which is compressed into data by means of an encoder without loss