MXPA97010174A - Collector and interface bar system for digital consumi equipment - Google Patents

Collector and interface bar system for digital consumi equipment

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Publication number
MXPA97010174A
MXPA97010174A MXPA/A/1997/010174A MX9710174A MXPA97010174A MX PA97010174 A MXPA97010174 A MX PA97010174A MX 9710174 A MX9710174 A MX 9710174A MX PA97010174 A MXPA97010174 A MX PA97010174A
Authority
MX
Mexico
Prior art keywords
superpacks
signal
time
recording
control
Prior art date
Application number
MXPA/A/1997/010174A
Other languages
Spanish (es)
Other versions
MX9710174A (en
Inventor
Blatter Harold
Wesley Beyers William Jr
Scott Diess Michael
Original Assignee
Thomson Consumer Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB9512068.9A external-priority patent/GB9512068D0/en
Application filed by Thomson Consumer Electronics Inc filed Critical Thomson Consumer Electronics Inc
Publication of MX9710174A publication Critical patent/MX9710174A/en
Publication of MXPA97010174A publication Critical patent/MXPA97010174A/en

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Abstract

The present invention relates to a system for generating a signal (SP) for coupling digital audio, video and information signals in compressed form via a busbar (500). A processing element formats the digital audio, video and information signals into superpacks (SP) for transmission via the busbar (500). Each super pack (SP) comprises the printing of the date and time (TS), and a transport packet (TP), representative of the digital audio, video and information signals. Superpacks (SP) have a fixed duration and occur at varying intervals. The devices (50) receive the superpacket (SP) signal and can use the date and time stamps for clock synchronization. A recording and reproducing device (400) processes the occurrence of variable super-pack signal for recording. The reproduced time impressions (401) are used to control the restoration of the superpacket (SP) signal to substantially have the duration or occurrence as formatted for the bus (500) transmission. A simplified busbar (501) coupled the superpacks (SP) between the devices (100,400). An indicator (Vs) is added to a superpacket signal to provide automatic control of the interfaces of the busbar of the device (102). Automated interface control also responds to device control status

Description

COLLECTOR BAR AND INTE PHASE SYSTEM FOR DIGITAL CONSUMER EQUIPMENT This invention relates to a busbar interface system / apparatus for coupling audio, video and information processing systems, and in particular for coupling digital signals for digital recording and playback.
BACKGROUND OF THE INVENTION It is known in the audio / video electronics technique to interconnect a variety of consumer electronic processing devices on a busbar structure, so that the signal available in one device can be used by another device connected to the busbar. For example, the available audio / video signal from a television receiver can be applied to a video cassette recorder for storage, or the audio from a television receiver can be applied to a stereo system of components for playback, and so on. . Examples of this type of audio / video interconnection systems can be found in the Patents of the United States of North America Numbers: 4,575,759; 4,581,664; 4,647,973; and 4,581,645. The signals distributed in these analog busbar systems are relatively self-sufficient. That is, they include all the time information necessary for the respective devices connected to the busbar to decode the respective signals. Currently there are numerous compressed audio-video transmission systems, such as the Grand Alliance HDTV system proposed for terrestrial high-definition television broadcasting, or the DirecTV ™ system that currently transmits compressed NTSC signals via satellite. Both systems transmit program material in transport packets, and transport packets for different programs and / or program components can be multiplexed into time division in a common frequency band. The respective packets go through noise detection / correction coding before transmission and after reception, and the transport packets are then reconstituted in the receiver. Recording devices (for example VCR or video disc) and creation devices (for example cameras or video cameras) for compressed signals, on the other hand, can process signals compressed in the same packet format as long as they do not require the same noise processing. As a consequence of the transmission of signals between the processing components, it is more conveniently carried out in the form of a packet. Problems arise in the communication of compressed signals between the processing components if the packaging format is subjected to variations or disturbances of time. Those variations of time may result when one of the processing components is a recording device. A first problem results from the fact that the synchronization indications are not included in all the transport packets of the compressed information. Another problem results from the non-uniform generation of the delivery speed of the transport packets that is not directly followed by the recording. In addition, a digital recording system can be beneficial from a presence of continuous signals in order to simplify the techniques of retrieving the clock information. In addition, to facilitate the reproduction of compressed information suitable for decoding may require a relatively accurate time reference to be used during playback. A recorded time indication can facilitate the elimination of information synchronization disturbances and discontinuities that result from recording / playback processing and allow the synchronization of the recorded signal to restore that which existed prior to recording. COMPENDIUM OF THE INVENTION A signal processing apparatus for processing an information stream comprising a packaged signal subject to time disturbances. The packaged signal comprises a plurality of superpacks and each of the superpacks has a transport package and a date and time stamp, the impressions of time are indicative of spaces between the corresponding parts of the superpacks before the disturbance of time. The apparatus comprises an element for receiving the superpacks from the packaged signal subject to the time disturbance. A storage element is coupled to the receiver element to store the superpacks. The time impressions for each of the superpacks are read by reading elements. A counter and the reading element are coupled to an element to generate a control signal. The control signal indicates each successive match between time impressions from the received superpackets and a counter count. The control signal initiates the reading of the superpacks from the storage element.
BRIEF DESCRIPTION OF THE DRAWINGS The invention will be described with reference to the following drawings in which: Figure 1 is a block diagram of an inventive embodiment of a bar-link daisy chain link including a number of interfaces busbar / device interfaces; and Figure 2 is a block diagram of a portion of one of the interfaces of the busbar of Figure 1; and Figure 3 is a first block diagram system illustrating a receiver coupled via an information bus to a time disturbance source and an inventive super packet restore block. Figure 4A is a waveform and representation drawn from the superpacks of the busbar according to a first arrangement, and Figure 4B illustrates an alternative superpacket arrangement; and Figure 5 is a block diagram of the system including a receiver coupled to a recording and reproducing device and employing various inventive modalities; Figures 6 and 7 are block diagrams of the apparatus for forming a super package; and Figure 8 is another block diagram system including a digital recording and reproducing device and employing various inventive modalities. Figure 9 is a circuit diagram of an inventive controller used with advantage in Figures 8 and 10. Figure 10 is another block diagram system that includes a digital recording and playback device and employs various inventive modalities.
DETAILED DESCRIPTION Referring to Figure 1, a cascade of AVD audio-video-data bus interfaces interconnected through an audio-video-data bus is shown. Each interface is bidirectional because it can be conditioned to provide a signal to, or accept a signal from a component of the device. However, you can not do both concurrently, and you will be conditioned to do either one or the other for a session. Each interface includes an output buffer area, OB, to drive a component device with the signal provided by the busbar. Each interface includes an input buffer, IB, to drive the bus with the signal provided from the device component. Both the input and the output buffer are selectively coupled to the busbar via switches that are controlled by a master controller. Thus the direction of applying the signal to, or of receiving the signal from the bus bar can be determined with a high degree of flexibility. Each interface can include a half duplex transceiver, in both connections to the audio-video-data bus, to couple the signal from the busbar to the interface. The busbar includes a pair of control lines on which serial control signals are communicated from a master controller. The control signals may include addresses so that the respective interfaces can be selectively controlled. An exemplary interface switching apparatus is illustrated in Figure 2. In this illustration, the audio-video-data bus is assumed to consist of three pairs of six-conductor lines. All pairs of lines carry serial signals of bits. Two of the conductors (the control pair) are consigned to carry the control signals. Each decoder has a single address that allows individual commands to be accessed at specific interfaces. In response to a control signal directed to the specific interface, the decoder produces direction signals for the respective demultiplexers 01, 02, 03, and 04. The control signals determine: which of the respective busbar conductors are coupled to the output port OUT, which are, in turn, coupled with the input buffer IB; and which of the drivers will pass through the interface between the right and left ports of entry / exit. The use of demultiplexers allows the connection of daisy chain between the components that are going to break, allowing independent communications between the components on each side of the break while using the same drivers. As a result, a greater number of exclusive communications can be made with fewer conductors in the busbar structure. Figure 3A illustrates a first exemplary system employing an integrated receiver decoder IRD 100 which is coupled via the convenient interface switching apparatus 101, as illustrated in Figures 1 and 2, to the audio-video-data bus 500. A visual display of television receiver 110 is coupled to the integrated receiver decoder 100 and receives any radio frequency, or baseband video signals for visual display. The audio-video-data bus 500 couples information of control signals and two information streams of signal format. In Figure 3A it is assumed that "the signal" to be communicated is provided in the form of transport packs as defined in the system layer of the standard of - MPEG2 video, or the transport layer of the signal format of Grand Alliance. In both the PEG2 video standard and the transport layer of the Grand Alliance signal format, the transport packets are associated with time impressions or PCR that allow the resynchronization of the clocks of the local systems with the clock frequency of the original encoder . Therefore, having synchronized the clock generator of the local system, transport packets can be processed to remove signal tremors or time disturbances "that can accumulate, for example, during transmission through structures and busbar processing switched, etcetera. However, transport packages may be subject to tremors and time discontinuities that may not be correctable based on the intermittent, variable and specified occurrence in the transport stream. The audio-video-data bus 500 is illustrated coupled to a time disturbance source, block 05 which can impart a synchronization error Δt to the data streams present in the busbar. The source of time disturbances or tremors may be the result of the bus bar connection, bus bar arbitration, time base modulation, or recording and playback processes. The audio-video-data busbar 500 with time error? T is coupled to the block 50 which removes the time error component and restores the signal components of the busbar. To facilitate the removal of the time error? T from the audio-video-data signals, the integrated receiver decoder 100 processes the transport packets to form a further packet, designated here as a super packet, before the transmission via bar audio-video-data collector 500. Each superpacket includes a time print, transport packet and a reservation information area that may include a playback speed code. Two modes of time printing (date and time) are shown in Figures 4A and 4B. The time stamp is a time code that is a sample of an oscillator account taken at a specific time, for example, in the occurrence of a frame clock pulse. As a date and time stamp is added to each superpacket, the date and time stamp can be used to facilitate the correction of the time tremor and disturbances printed on the corresponding superpacket and its contents. The playback speed code can be used by a recording device to determine the speed at which a particular signal will be recorded or played. The reproduction speed is coded in relation to the recording speed and is read and used by any of the recording devices connected to the audio-video-data bus. The purpose of the playback speed code is to allow recording at a relatively high bit rate and play at a normal bit rate. Figure 3A depicts an integrated receiver decoder 100 that receives a radio frequency signal from, for example, the antenna 10 or a cable source, not shown. The radio frequency signal is tuned by a tuner 11 to receive and demodulate a selected program of the user. The tuner output packet stream is coupled to block 12, the packet source, which separates the transport stream from the user-specific program TP from other program streams present in the received packet stream. The transport stream is coupled to a demultiplexer 13 wherein a PCR program clock reference value is extracted from the transport stream responsive to the control by a demultiplexer controller 14. The demultiplexer controller 14 is controlled to extract the PCR by a P packet time impulse that matches, and indicates the occurrence of the respective transport packages. The packet time pulse P is derived from the program transport stream by the packet source 12. The PCR value, which is demultiplexed by the block 13, is coupled to be stored by the closure 15. A crystal oscillator controlled by voltage 17 operates at a nominal clock frequency of 27 MHz and is controlled by a clock controller 16. A control signal E is generated in response to a difference between the received PCR value, stored at lock 15, and a value of closure derived by the VCXO account 17 in the counter 18 and stored in the closure 19. This VCXO 17 is synchronized by the received PCR value, which in turn is representative of the clock frequency at the time of encoding. Leave "that the corresponding successive count values stored at closing 19 be designated TSn and tsn +1. Let the corresponding successive account values stored in lock 19 be designated LCRn and LCRn +1. The clock controller 16 reads the successive values of the TS and LCR and forms an error signal E proportional to the differences E = >; I TSn - TSn + 1l - I LCRn - LCRn + 1l The error signal E, is applied as a control signal to condition the voltage controlled oscillator 17 to produce a frequency equal to the frequency of the system clock from which the PCRs were coded. The error signal E produced by the clock controller 16 may be in the form of a broad pulse modulated signal, which may be output on an analog error signal by low pass filtering, not shown. The restrictions in this system are the counters throughout the system, ie encoder, decoder and recorder, have the same frequency or even multiples of it. This requires that the nominal frequency of the controlled voltage oscillator be very close to the system clock frequency in the encoder. It will be noted that the occurrence of transport packets generated as illustrated, for example, in Figures 3,5,6 and 7 are synchronous with a system clock. The system clock was, in turn, synchronized with an encoder clock via the PCRs located within the transport stream and derived at the source of packets 12. The occurrence of these transport packets is printed with the date and time in cooperation with the synchronous clock of the receiver, and the respective transport packets are labeled with time impressions, derived from the clock before the applications to the audio-video-data bus. The operation of the superpacket generator 98 is as follows. A time stamp TS is formed in the closure 20 which captures a counter value produced by counting pulses from an oscillator, for example VCXO 17 in the counter 18. The value of the enclosed counter is representative of the frequency of the oscillator at a specific time, for example, a bank of a FC clock frame signal, or the start of a transport packet. The time print TS is coupled to block 22 where it is combined with control information, for example, playback speed information PB from controller 23, and a delayed transport packet TP from delay 21. Formatted super packet SP is coupled from the formatting block 22, of the generator 98, for its transmission via audio-video-data bus 500 that responds to the control by the controller 23. Figure 4A is a graphic representation of a superpacket signal transported by the audio-video-data 500 busbar. A framing clock is provided over one of the busbar conductors and can be used to indicate the occurrence or presence of a superpacket over another conductor of the audio bus - video-data. When the framing clock FC is in a high state, a super packet is framed inside and coinciding with the high state. The high state or active range of the framing clock is of constant duration for all packets, and in this example it is equal to the duration of 19 bits of eight bits. These 191 bytes are divided between the time print of 20 bits, a 4-bit playback speed code and a 188-byte transport packet. If a transport packet has less than 188 bytes, it is loaded at the front of the package portion of the superpacket. Figure 4A illustrates a first sequence wherein the first 20 bits of information represent the time print, the second 4 bits represent the reproduction speed code and the last 188 bytes comprise the transport packet. Figure 4B illustrates a second superpacket arrangement wherein the first sequence comprises 12 bits of reserved information, eg, playback speed code, the second 20 bits represent the time print. The final portion of the superpacket comprises the transport package. The superspaces flow occurs in bursts with intervention spaces, where the bursts comprise the super package and the transport package, etc., which can, for example, contain 140 or 188 bytes, representing DSS ™ and MPEG packets, respectively. The active portions of the framing clock are of constant duration, with inactive intervals of variable duration "that correspond to the spaces resulting from elementary streams that are suppressed or not selected. These varying periods of inactivity can provide considerable flexibility for the formation of superpacks. The impressions of time are samples of accounts of a oscillator at high frequency that is supposed to run in a stable manner, without disturbances. Therefore, the time print values, or the oscillator accounts can be communicated, for example, to provide synchronization of the oscillator or to uniquely identify the occurrence of a specific instant or event. The differences between the time print values represent an elapsed number of cycles of the oscillator, which may alternatively be considered to represent a time interval between the time impressions. However, if the time interval between the impressions of time is altered or disturbed, that is, the occurrence, or the separation between the impressions of time is not the same "as when they were coded or at the time of being printed, the time print values can not be used to control or synchronize a "receiver" node oscillator. Figure 3B illustrates in simplified form, the processing employed within the superpacket restoration block 50 using superpacket time printing values to remove printed time-out errors, for example, on coupled signals of the bus bar. audio-video-data 500. The operation of block 50 of superpacket restoration is as follows. The audio-video-data bus 500 is received by the interface switching apparatus 102 which is enabled by a control signal on the busbar conductors 500. The superpacket signal with its time perturbations SP ±? T , it is coupled from the data bus to a demultiplexer DEMUX 52 «which reads the superpacket time stamp. The superpacket signal is also coupled to a STORE S. PACK 51 buffer store, which is controlled to store the super packet that responds to, for example, a FC clock, or other control signal derived from the drivers control of the audio-video-data bus 500. An oscillator 54 has a stable free running frequency and has an output signal CK which is coupled to the storage of a buffer 51 and a counter 53. The oscillator 54 is it requires to have a nominal frequency that is very close to the clock frequency used to format the time print. The CTR count value, the counter 53 and the demultiplexed time print TS, are coupled to a READ CTRL 55 buffer read controller. The read controller compares the separate time print value with the oscillator account of free execution, and when coinciding it generates a reading, or an output control signal EN. The output control signal EN is coupled to the buffer memory 51 that produces the respective super packet that responds to the control signal. In addition to restoring the start time of the super pack, the bit rate of the super pack is restored by clock signals CK derived from the oscillator 54. Thus, by means of the time recording of the super pack and the oscillator, stable, freely executable, the time error? t is removed and each super pack SP is restored to occur at substantially the same time as when it was formatted by the generator 98 of the integrated receiver decoder 100. Since the super packet is synchronized by a clock signal of the oscillator 54, the superpacket has substantially the same bit rate as when it was formatted. further, since the occurrence of superpayments and their duration are restored to the nominally existing values at the time of format, so that they are also of variable length, with intervention spaces. The restored superpack SP can be returned to the audio-video-data bus 500 for retransmission to other interface switches beyond the time disturbance source, or the SP super packet can be used within a device from which it can be used. the block 50 of restoration of the super package. In general, recording systems depend on the presence or absence of signals to provide an elementary level of detection of signal loss. Additionally, the presence of continuous signal particularly in a digital recording system is convenient for data clock recovery. Since magnetic recording systems are subject to random signal losses of variable and unpredictable duration, it is beneficial to employ a register signal having a constant bit or clock rate. Thus, with that recorded signal, the lost information periods can be considered representative of losses of the recording media. In Figure 5, the interface 102 of the busbar accepts bursts of superpacks of the bus 500. The superpacks are coupled to the signal classifier 202 containing the demultiplexer 30 to separate or read the constituent parts of the superpack. In the exemplary system of Figure 5, the superpacks SP instead of transporting packets are recorded in recording means 405. The superpacks, with spaces of variable length, are coupled to an information buffer 281 which forms part of the circuits of recording 28. The information buffer 281 and the associated circuits can be synchronized with the signals derived from a synchronization generator 99. The synchronization generator 99 can be synchronized by clock signals generated by a stable VCXO clock generator 37. The generator 37 can synchronize with the time stamp of the super package during a recording mode. The information buffer 281 smoothes bursts of superpacks to remove or substantially reduce the spaces of varying duration involved for subsequent processing within the recording circuits 28. For example, Reed Solomon error detection and correction codes can be calculate and add to buffered super packs as illustrated in block 282. Superpacket information in buffer memory can be stored as represented by the Format Synchronization Block 283. It is known to intermix or collate information before recording to mitigate the effects of media damage that can result in incorrigible errors during playback. The intermixing or interleaving can be carried out over the period of a recorded segment, ie a scanning head or an average image interval. In addition to intermixing the data may be formatted by the Format Synchronization Block 283, to produce synchronization blocks having an information structure which may comprise a preamble or synchronization word identifying the beginning of the track, an identification code, the information «to be recorded (super package) and a postamble. Once the error is encoded, the formatted, intermixed and synchronization block information can be further processed for recording encoding, in a mode illustrated as REC recording block. CODE 284. Recording encoding can be used to reduce or eliminate any direct current component in the data stream, and can also be used to tailor the recorded frequency spectrum of the processed super pack signal. The reproduction process performs the inverse of the signal processing in the recording mode. The playback signal 407 from the transducer 406 is encoded converted to the REC block. DECODE 271, to restore the error, the information signal coded, formatted interspersed. The start of the information track is identified by the synchronization word and the information is synchronized within a memory, represented by DEFORMAT SYNC BLOCK 272, to allow deformation of the interspersed structure recorded. The memory of block 272 is read in a manner complementary to that used for intermixing before recording. Thus, by intermixing and de-mixing, the errors derived from the media are dispersed throughout the information contained in the recorded sector or track. Following the deintermediation the information is corrected for errors in block 273 using the exemplary code Reed Solomon added during the recording processing. Thus, the output information stream 401, from the playback circuits 27, represents the superpacket stream in the buffer memory as generated by the packet buffer 281. However, to allow subsequent decoding by the decoder 24 of the integrated receiver decoder 100. the buffer superpacks are restored in block 453, to more closely represent time and intermittent delivery or as a burst of superpacks formatted by the integrated receiver decoder 100 prior to recording. The operation of the superpacket restoration circuits 450 is similar to that described for Figure 3B and is described following the explanation of the oscillator and the synchronization of the time imprint. Figure 5 illustrates an exemplary use of time impressions for synchronization and timing purposes in the digital recorder 400. In a recording mode, the superpacks of an audio-video-data bus 500 driver are coupled via the switch interface 102 with the signal classifier 202. The FC clock signal present on another audio-video-data bus bar conductor is applied to a second input of the classifier 202. A bank detector 31 detects the The transition of the FC clock signal defining the start of the active frame clock interval, and responding to that detection, captures on a closure 35 the count displayed by a counter 36. The counter 36 counts the pulses from an oscillator of controlled voltage 37 having a nominal free running frequency close to the frequency used to generate the time impressions of the superpackets. Simultaneously, with the capture of the count value at the closure 35, the shore detector 31 alerts the demultiplexer controller 33 to provide a sequence of control signals to control the DEMUX demultiplexer 30 to separate the superpacket components. The time print contained in the superpackage is separated and stored in a memory 32, to be accessed by a clock controller 39. Depending on the signal shape the recorder is arranged to handle, the DEMUX 30 can be designed to provide the Signal in a variety of formats. That is, it can provide the entire super package, as illustrated in Figures 4A, 4B, for the buffer and recording as shown in Figure 5. Alternatively, the DEMUX 30 can be adjusted to provide the code for the speed of PB playback on a port that is "accessed by the control circuits of the recorder 29. The transport packets can be provided on another port as an alternative signal to be coupled to the recording buffer 281 circuits. The clock includes an apparatus for storing successive values enclosed in the closure 35 and successive time printing values stored in the MEMORY 32. The clock controller 39 reads the successive values of and the values of the closed counter and forms a proportional error E signal. to the difference. The error signal E, it is applied as a control signal to condition the controlled voltage oscillator 37 to produce a frequency equal to the clock frequency of the system with which the time impressions were generated. The error signal E produced by the clock controller 39 may be in the form of a broad pulse modulated signal, which may be output on an analog error signal by implementing a low pass filter 38 with analog components. The restrictions in this system are that the counters in the whole system, that is, encoder, decoder, and recorder, count the same frequency or even multiples thereof. This requires that the nominal frequency of the controlled voltage oscillator be very close to the system clock frequency in the encoder. It will be noted that the occurrence of transport packets generated as illustrated in Figures 3, 5 and 6, for example, are synchronous with a system clock. The system clock was synchronized in turn with an encoder via the PCRs located within the transport stream and derived at the source of packets 12. The occurrence of these transport packets have the time printed in cooperation with the synchronous clock of the receiver , and the respective transport packets are labeled with impressions of time before the application to the audio-video-data bus. In the recorder interface for the audio-video-data bus, the recorder can record the super package and can use the time impressions to generate a clock of the recording system that is synchronous with the transport package and the system clock receiver. However, superpacket time impressions can be derived from a stable oscillator, independent of the receiver system clock, which can also be used for synchronization of the recorder. The impressions of time are samples of accounts from a clock oscillator that is supposed to be stable execution, without disturbances. Therefore, the time print values, or the oscillator samples, can be communicated for remote synchronization or to uniquely identify the occurrence of a specific instant or event. The differences between the time print values represent an elapsed number of oscillator cycles, which can be considered to represent an elapsed time interval. When the digital recorder 400 reproduces a signal recorded from the media 405, VCXO 37 may not be controlled in response to the reproduced time impressions. The control of the oscillator 37 is not possible because, although the time impressions represent numerical values sampled from a stable oscillator, the intervals of elapsed time represented by the values of the time imprint are violated if the occurrence reproduced in superpacks, or the separation between the corresponding points of the adjacent superpacks is not the same as when they were coded. Those reproduced synchronization differences may, for example, result from the input buffer of the recorder, the pairing of the information, instabilities of the reproduction mechanism, and transducer connections. Therefore, when the recorder 400 reproduces, the VCXO oscillator 37 of free execution, driving the synchronization generator 99"which provides reference signals for the mechanism of the recorder and the process block 27. The stability of the VCXO 37 and the Synchronization generator 99 is sufficient to facilitate the recovery of the superpackets in the buffer that exit as signal 401. However, the specifications for a "reference" MPEG decoder requires that each packet arrive within 25 microseconds of its original time . Thus, the decoder 24 of the integrated receiver decoder 100 may require that the superpackage signal 401 be restored to more closely represent the time and occurrence of the super package., and therefore the synchronization of the transport packet, as when it is formatted by the generator 98 of the integrated receiver decoder 100. In addition, although the specifications of the MPEG decoder can specify tolerances to tremors of the synchronization, a recording signal process and playback may introduce synchronization disturbances beyond the clock synchronization and the buffer capacity of a decoder. The superpackage signal 401, SP ±? T, can be conveniently restored or reformatted using the time impressions added to each superpacket. The signal 401 is coupled to the demultiplexer 452 where the time impressions are extracted or copied and coupled to the control block of the demultiplexer 451. The time impresses can be demultiplexed by, for example, counting data bits based on the structures of the superpacks illustrated in Figures 4A and 4B, and knowing where the start of the reproduction data occurs based on the format of the recorded synchronization block and the associated synchronization word. Alternatively, during storage in the buffer of the superpa "quete, shown in block 28, a time stamp identifier may be added to provide identification during reproduction. The demultiplexer control compares the value of the reproduced time print with a continuously changing count value produced by the count of a free running oscillator, eg, oscillator 37 and counter 36. Clearly to enable time restoration of the super package, the oscillators of nominally the same frequency are required at each end of the system. When the value of the counter 36, and the printing of demultiplexed time are i-gual, the demux control 451 generates the signal EN that initiates the start time of the reproduced packet. Thus, the coded reference time, for example, the start of the transport packet within the superpackage is restored. Thus each superpacket is restored to occur in the same oscillator account as when it was formatted by block 22. In addition to restoring superpacket synchronization, the superpacket bit rate must also be restored. To allow the superpacket to be restored, the block 453 may comprise a storage buffer coupled to receive the reproduced signal 401. The block of the buffer 453 may be clocked by CK pulses from the oscillator 37, therefore, each superpacket in buffer memory it is read at a rate determined by oscillator 37, which has substantially the same frequency as that used when it was formatted. Since the superpacks have been re-synchronized to occur at substantially the original "coded" time, and the bit rate of the superpacket is substantially the same as when it was formatted, so the intervening, variable spaces between the superpacks are also restored. . Thus the reproduced signal of the restoration block 453 is substantially so formatted and free of the disturbances and synchronization discontinuities derived from the recording. The restored superpacket signal 402 is coupled with the audio-video data bus 500 which is controlled via the control data pair of the busbar. Referring to Figure 6, an additional method for generating superpacks is illustrated and described. In this example, a camera 40 generates a video signal. This video signal is compressed in an MPEG encoder 41, and packaged in transport packets by the transport processor 42. The MPEG encoder 41 in cooperation with a system clock 45 and a meter 43 of module M, includes time impressions of presentation in the compressed video signal. The transport processor 42, also in cooperation with the module M of the counter 43, includes the program's synchronization references in one of the transport packages. The transport processor provides serialized transport packets in bits of the video signal at an output port, and in parallel therewith provides a stopwatch signal indicative of the start of the successive output transport packets. The successive transport packets are delayed by a compensation delay element 50, and then applied to a super packet formatter 47. At the start of each new transport packet the bill displayed on the module counter M 43 is captured in a closure 44, whose output is coupled to the formatter 47. In addition, a playback speed control code, PB, is applied from a system controller 46 to the superpacket formatter. In this example it is assumed that the camera is operating in real time and at normal speed, therefore the playback speed code will reflect a playback speed equivalent to the recording speed. However, the camera can operate at a higher than normal image speed, for example, 90 images per second. These high speed image signals can be used to portray slow or variable motion of the image, therefore the desired display speed can be communicated by the playback speed control code. For example, a reproduction speed of 1/3 will portray image movement at one third of speed. The speed of action of the camera is controlled by a user input 48, which can define a number of variable encoding and compression parameters. When the time signal provided by the transport processor indicates the occurrence of a new transport packet, the controller 46 conditions the formatter to first produce, in serial form, the reservation information block, for example 12 bits as illustrated in Figure 4B, which includes the reproduction speed code. Following the reservation information block, the account from closing 44 is produced as a series to generate the time impression. Finally, the transport packet delayed from delay 50 is produced in series form to complete the superpacket format. The delay incurred by the transport packet in the delay element 50 is equivalent to the time required to read the time print and the playback speed code. The superpacks are applied to one of the desired conductors in the interface 49 under the control of the control signals present in the driver control pair of the interface. In addition, the controller 46 generates a frame clock signal FC that matches the superpackage and that is applied to a second driver of the audio-video-data bus at the interface 49. If the controller 46 is the system controller global, will generate control signals that are applied to the control pair. The control of the user 48 can provide the selection and direction of the signal. If the controller 46 is not the system controller, the only interaction with the interface will be the generation of the framing clock in this example. Figure 7 illustrates a further example of a superpacket generator. In Figure 7 the elements designated with the same numbers as elements in Figure 6 are similar and perform the same function. The transmitted transport packets are received by a modem and the errors corrected by a Reed Solomon decoder of the packet source 51. The packet source generates output P-pulses, which coincide with, and indicate the occurrence of the respective transport packets. . The pulses P and the transport packets are applied to a reverse transport processor 53. In this example it is assumed that the signal applied to the packet source contains time-division multiplexed packets belonging to different programs and different program components.
The respective packages contain program identifiers, PID, by means of which they are associated with the respective programs or program components. The transport processor is conditioned to select only packets associated with a desired program. The payload of these packets are applied via a direct memory access, DMA, to a buffer 54. The payloads of the components of the respective programs are applied to specific areas of the buffer 54. As the respective processors of the program components 55, 56, 57 and 58 require component signal information, they request the same for processor 53, which reads the appropriate payload via the structure of direct access memory. Some of the transport packages contain references to the program clock, PCR, which precisely relate the creation of the transport packet with the clock of the encoder system in its generation. The transport processor 53 extracts these PCRs and applies them to a clock generator of the system 52. Using the PCRs, the clock generator 52 generates a system clock that is often secured to the clock of the encoder system. The system clock is used by the reverse transport processor 53 and the source of packets 51, therefore the transport packets are relatively synchronized with their original creation time. The system clock is counted by the counter 43 of the M module, and the account value is displayed by the counter when a P pulse occurs, that is, when the start of a new transport packet occurs through the packet source, capture by the lock 44 responding to the pulse P. The count of the counter 43 is enclosed by the lock 44 which responds to a packet synchronization pulse P derived from the received transport stream to be formatted to be coupled to the audio bus -video-data. This locked account value is used as a time print. In addition, the associated transport packet is applied to a compensation delay element 50. The delayed transport packet of the element 50, the value of the time stamp counter of the lock 44, and a playback speed code of a controller 460 apply to the respective input ports of a super packet formatter 47. The controller 460, under the control of the user 48, communicates with the reverse transport processor to designate which of the program transport packets are to be packed in the superpacks. At the occurrence of the respective transport packets, the reverse transport processor provides a pulse to the controller 460 so long as a received packet is a desired transport packet. In response to this impulse, the controller 460 conditions the formatter to form the super package with the current time print, PB and the transport packet. Note in this example that the delay element 50 must be adjusted not only to the time of formation of the first two superpacket information elements but also to the required time of the reverse processor to ensure that a packet is the one desired. In the previous examples, the printing of time is generated in the occurrence of a transport packet. Alternatively, time impressions can be generated in relation to time or superpacket generation. That is, the impression of time can define the instant when a super package is going to be produced, or the instantaneous assembly of the beginning of a super package. In these cases the time imprint will usually be related to the front edge of the Frame Clock, although this may not define the time of this transition. However, as long as the occurrence in time represents the value of the printing of time, the impression of time is specific to a particular superpacket and the transport transmitted within it. The FC clock is not a fixed frequency signal. That is, the inactive portion of the framing clock has a specified minimum and maximum duration.
Specifically, it is desired that the framing clock is not a fixed frequency clock so that superpacks can be formed at any time when a transport packet is available. It is not convenient to use a fixed-frequency framing clock, as this may force a delay in the formation of a super packet for the transport packets that occur after the start of an active portion of the framing clock until the next clock cycle of the clock. framing If the printing of time is to be related to the formation of superpacks of the framing clock, then the closures 44 in Figures 6 and 7 can be conditioned to capture account values either by the formatters 47 or by the controllers 46 or 460 , respectively. A second exemplary audio-video-data busbar system is illustrated in Figure 8. This second exemplary audio-video-data busbar system employs a simplified daisy chain busbar 501 to be coupled between an integrated receiver decoder. 100, a digital recorder 400 and a visual display 110. This simplified busbar has only two A / B conductor pairs with a control logic of the switch C incorporated into each interface connection matrix 101/102. The control logic of the switch C monitors the status of each pair of bus bars 501 and in response to the status selected by the user, for example, playback or recording modes, automatically determines an appropriate route signal via bus 501. In simple terms, the control logic of the switch ensures that the signal sources are only coupled to signal destinations and that only one signal source is coupled to a pair of bus bars at the same time. The presence of information signals in a busbar pair is indicated by an indication Vs. The indication Vs can be generated, as shown in exemplary Figure 9, by means of element 405 and detected by element 401. Figure 9 illustrates a data bus transmitter and receiver that employs an inventive bus bar indicator and status detector. One of the inventive transmit circuits is coupled to each input of the interface switch. One of the inventive receiver / detector circuits is coupled to each busbar line coupled to the interface switch. The theory and operation of the techniques of impulse and reception of the balanced line is well known. The inventive information indication transmitter 405 and the detector 401 use the balanced transmission condition to enter a Vs indication of direct current voltage data, also within each conductor of the busbar pair when coupled to transmit data. In a receiver node of the busbar the presence of information indications Vs is detected by the receiver 401, which is part of the logic of the control of the switch C. Thus the presence of an information signal is indicated by the coupling with a destination via the interface connection matrix. In Figure 9 a simple indications transmitter 405 is shown coupled to a single pair of input lines A of the data bus 501. However, a system employing the inventive control method requires that an indications transmitter be included. or be associated with every possible source of data. The indication transmitter 405 comprises a connected follower emitter Q2 that is equally coupled within each conductor of the pair of lines A. A transistor Q1 functions as a switch coupled between the base of the emitter follower Q2 and ground. An indication control signal is coupled to the terminal base of the transistor Ql via a resistor R5. The indication control signal may be generated, or derived from the control logic in response to a device operating in command mode, for example, initiation of Playback mode on a digital playback recorder. In an exemplary Play mode, a low logic signal or nominally zero volts is applied to the resistor R5 from the logic of the control 410. The signal of nominally zero volts turns off the transistor Ql which allows the terminal base of the transistor Q2 to assume a potential of approximately 1.6 volts , determined by a series of combination of resistors R6, R7 and the diode DI. The action of the emitter follower of transistor Q2 results in a Vs emitting voltage of about 1 volt, which is applied to the data bus conductors via resistors Rl and R2. In non-playback modes, a high logic signal or nominally 5 volts is generated by logic 410 and applied to resistor R5. The signal of nominally 5 volts, coupvia the resistor R5, turns on the transistor Q1 which sets the base terminal of the transistor Q2 with ground. Thus, the transistor Q2 turns off and no voltage detection indications Vs are generated. A simple indication detector 403 is shown in FIG. 9 coupto a busbar pair A of a data bus 501. However, a system that employing the inventive control method requires that an indication detector be provided for each pair of data bus coupto a connection matrix. The indication detector 403 comprises a balance network formed by the resistors R3 and R4 coupfrom each busbar line to a parallel combination of a resistor 14 and a capacitor C2 connected to ground. The resistors Rll and R12 are connected to each busbar line and are joined in a non-inverted input of an integrated circuit comparator Ul. An inverting input of the integrated circuit Ul is connected to a direct-current potential divider formed by the resistors R8 and R9, coupbetween +5 volts and ground and which generate a voltage of approximately 0.8 volts. When the data indication Vs is absent, the data bus sits a potential nominally to ground or zero volts. This nominally ground potential is coupvia the resistors Rll and R12 to the non-inverting input of IC Ul. Thus, with zero volts applied to the non-inverting input and 0.8 volts applied to the inverting input the output terminal of IC Ul assumes a low potential, nominally ground. When the data indication Vs is present, the data bus is nominally 1 volt positive relative to the ground potential. The +1 volt DC indication signal applied to the non-inverting input of the IC Ul causes the output terminal to suppose a high potential, nominally for the supply of rails. Thus, the output signal of the integrated circuit Ul indicates a presence of a data bus signal with a high level signal and an absence of signal in the data bus with a low level output signal. Table 1 illustrates an advantageous automatic interface switching controller apparatus associated with a digital recorder, for example, D-VHS. The recording mode is determined by the user's order, for example by means of a manual switch operation or by infrared remote control. The logic of the control associated with the interface switch apparatus and the digital recorder determines the mode desired by the user and establishes the connection between the appropriate exemplary D-VHS input and output terminal and an appropriate bus bar conductor. TABLE 1. AUTO MATRIX CONNECTION OF DIGITAL PLAYER / RECORDER OPEN = OPEN, AIT = WAIT, OUT = OUT IN = IN The operation of the interface connection device is as if «gue. For example, after the selection of a reproduction mode, the circuits of the transmitter 405 of Figure 8 are enabled and the indication Vs of detection of DC voltage is applied to the output of a driver amplifier of the bus (not shown) . The indication detectors 401/402, associated with the control logic of the automatic interface switch 102 determine the presence or absence or B and couple the output reproduction information and the Vs indication of direct current voltage to any of the lines of the busbar that are not being used, that is, "that do not have the sensation of DC voltage present. Thus in the exemplary Table 1, it is assumed that the digital player / recorder is in reproduction mode and the status of the bus is 0/0, which means that there are no signals present on any of the busbar drivers, reproduction data from the digital player / recorder, for example D-VHS is coupled to both drivers A and B. If the digital player / recorder 400 is controlled to assume a recording mode, the automatic interface switching apparatus operates as follows. The logic of the control associated with the automatic switch 102 of the interface determines the presence or absence of an indication of information on line A or B of the bus bar as an indicator of the presence of information signals. Thus, in Table 1, the status 1/0 indicates that an information signal is present on bus A and this information signal is connected to a recording input of the exemplary D-VHS digital recorder. Similarly, if the indications of the information signal are present on the busbar B, the automatic coupling connects the recording input to the busbar B.
An inventive aspect of the interface switching apparatus occurs when a recording mode is selected for the player / recorder but the information signals are not present either in busbar A or B, or status bar 0/0 . A condition such as that described may occur when the transmission of the specific program selected for recording is delayed. Under this condition Table 1 indicates that it is applied to the WAIT recorder or a recording pause condition. The control logic associated with the automatic interface switch can inhibit the initiation of the recording mode selected by the user until an indication of the information signal is detected in any busbar conductor. The detection of the information indication Vs controls the coupling of the information to the recording input and in addition, it can enable the initiation of the previously selected recording mode. Thus, advantageous logic control avoids unnecessary consumption of recording media and ensures that the desired program is recorded without the use of a separate control bar or an IR burst. A third exemplary audio-video-data bus bar system is illustrated in Figure 10. Figure 10 shows a single simplified pair of daisy chain bus which is coupled between a digital recorder 400, an integrated receiver decoder or a DSS receiver 100 and the integrated receiver decoder or a DSS receiver 100 and visual display 110. Advantageous automatic controllers C are coupled to the interface switching apparatus associated with a digital recorder 400, eg, D-VHS and the interface switching apparatus 101 associated with the receiver 100 and the visual display 110. Table 2 illustrates the automatic functions of the controller C of the interface switch 101 associated with an exemplary DSS ™ receiver 100 and an exemplary information signal source, digital recorder 400, for example. example D-VHS. The receiver mode is determined by the user's command, for example by means of a manual switch, not shown or an infrared remote control. The receiver can be controlled to produce information or to receive information from the single pair of bus bars A. The control logic associated with the interface switching apparatus and the digital recorder determines the mode desired by the user and establishes the connection between the driver A of the busbar and the appropriate input or output terminal of the receiver 100.
TABLE 2. RECEIVER AUTOCONNECTION MATRIX UT = OUT; IN = IN; OFF = OFF; OPEN = OPEN. The operation of the automatic interface switch apparatus is as if «gue. For example, the user determines that the receiver will receive and produce a stream of specific program information. The control logic associated with the automatic interface switch 101 of the receiver 100 determines the presence or absence of an information signal indication, for example the detection of the voltage Vs of the direct current, on a bus line A . An absence of indication on line A of the bus bar indicates that digital recorder / player 400 is not producing information and consequently, line A of the bus bar is available for transmission of output information of receiver 100. The The output information of the receiver is also coupled to the receiver decoder input to decode and is coupled for visual display. When the user initiates a playback mode, the controller 410 generates a playback command for the recorder / player 400 and furthermore allows the generation of information indications Vs. The Vs indication is symmetrically added to the reproducing information stream that is coupled , for example, to the interface switch 102. The indication detectors, for example, 401/2/3/4 of Figure 8 or 401/3 of Figure 10 determine the absence of an indication Vs on, for example. the pair A of the busbar line, and allows the coupling of the data stream and the indication to the pair A of the busbar. The interface switching apparatus 101 within the receiver 100 detects the voltage of the indication Vs and allows the coupling of the reproduction information to decode it by the integrated receiver decoder and the visual display on the monitor 100. Thus, the single busbar pair Simple can provide automatic coupling between two sources and a monitor input without the use of a control busbar conductor.

Claims (15)

  1. CLAIMS l. A signal processing apparatus (? T) for processing a packetized information stream (SP) subject to synchronization disturbances (? T), the data stream (SP) comprises a plurality of superpacks, each of the superpacks a transport package (TD) and a time print (TS), the time impressions being indicative of a time relation between the superpacks (SP) and a previous reference to the synchronization disturbances (? t), characterized in that the apparatus comprises: an element (102) for receiving the superpacks from the disturbed packed information stream (SP ±? t); an element (51) coupled to the receiver element (102) for storing the superpacks (SP); an element (52) for reading the respective time impressions (TS) of each of the received superpacks (SP ±? t); a counter (53); and, an element (55) coupled to the reading element (57) and the counter (53) to generate a control signal (EN) indicating each coincidence between successive impressions of time (TS) from the received superpackets ( SP ±? T) and a counter (CTR) of the counter (53), the control signal (EN) that initiates the reading of the superpacks (SP) from the storage element (51).
  2. 2. The apparatus of claim 1, wherein the counter (53) is coupled to count an oscillator signal (CK).
  3. 3. The apparatus of claim 2, wherein the oscillator (54) is free to run.
  4. The apparatus of claim 2 wherein the oscillator signal (CK) is coupled to the storage element (51) to read the superpacks (SP) therefrom.
  5. 5. An apparatus for reproducing a recorded signal from a recording medium (405), the recorded signal being representative of a plurality of superpacks (SP) having each of the super packages a transport packet (TP) and a time stamp ( TS), with the printing of time indicative of time intervals between corresponding parts of the superpacks (SP) in an information stream before being recorded, the apparatus comprises: a transducer (406) operable with the recording medium (405) ) and "which generates a transduced signal (407) representative of the recorded signal; an element (27) for recovering the superpacks (SP) of the transmitted signal (407); and, an element (450) for generating an output signal (402) of the recovered superpacks (SP) in which the time intervals have been restored.
  6. The apparatus of claim 5, wherein the output signal generating element (450) comprises: an element (453) for storing the recovered superpacks (401), - an element (452) for reading the respective time impressions (TS) from each of the recovered superpacks (401); a counter (36); and, an element (451) coupled to the reading element (452) and to the counter (36) to generate a control signal (EN) indicating the coincidence between successive time impressions (TS) from the recovered superpacks ( 401) and a counter count (36), the control signal (EN) initiating the reading of the superpacks (SP) from the storage element (453), the superpacks (SP) being separated by the time intervals.
  7. 7. An apparatus for reproducing a recorded signal from a recording medium (405), the recorded signal being representative of a packaged signal having a plurality of superpacks (SP), each of those superpacks (SP) having a packet of transport (TP) and a time print (TS) being the print of time (TS) indicative of the spaces between the corresponding parts of the superpacks (SP) in a stream of data before being recorded, the apparatus comprises: a transducer (406) operable with the recording medium (405) and generating a transduced signal (407) representative of the recorded signal; an element (27) for recovering the superpackets of the transmitted signal (407); an element 452 for reading the respective time impressions (TS) from each of the recovered superpacks (401); an element (453) for storing the recovered superpacks (401); a source of a clock signal (37); a counter (36) coupled to the clock signal (37) for counting; and, an element (451) coupled to the reading element (452) and to the counter (36) to generate a control signal (EN) indicating each match between successive separate time impressions (TS) and a counter count (36) ), the control signal (EN) initiating the reading of the superpacks (SP) reading from the storage elements (453).
  8. 8. The apparatus of claim 7, wherein an oscillator signal (37) is coupled to the storage element (453) to read the superpacks (SP) therefrom. The apparatus of claim 7 wherein the superpacks (SP) are read from the storage element (453) intermittently with the spaces therebetween of varying duration. The apparatus of claim 7 wherein the storage element (453) is synchronized by a signal (CK) from the oscillator (37) to restore the superpacks (SP) to an existing time sequence prior to recording in that means (405). The apparatus of claim 7 wherein the superpacks (SP) are read from the storage element (453) to restore spaces between ones of a plurality of superpacks (SP), the spaces being substantially similar to the spaces between some of the plurality of superpacks (SP) established during the formation of the superpacks. 12. The apparatus of claim 7 wherein the oscillator (37) is free to run. The apparatus of claim 7 wherein each of the superpacks (SP) has a playback speed code (PB2) to determine a playback speed that differs from the speed at which that recorded signal was recorded. 14. A recording medium (405) having recorded therein an MPEG-like signal of transport packets (TP) being included in superpacks (SP), superpacks (SP) including time impressions (TS) that they represent intervals between the successive superspacks (SP) existing before recording on that medium (405), the time impressions (TS) being suitable for controlling a reproduction apparatus (400) to restore the intervals between the superpacks (SP). The recording medium (405) of claim 14 wherein the time impressions (TS) control the initiation of the reading of the transport packets (TP) from the reproduction apparatus (400). The recording medium (405) of claim 14, wherein the time impressions (TS) control the initiation of synchronization by the reproduction apparatus (400) to restore the superpacks (SP) to an existing time sequence before recording in that medium (405). The recording medium of claim 14 wherein the time impressions (TS) control the playback apparatus (400) to restore an intermittent occurrence of the superpacks (SP) existing prior to recording on that medium (405). 19. A recording medium (405) having recorded on it MPEG-like signal transport (TP) packets being included in the superpacks (SP) each of the superpacks (SP) includes a time print (TS) and a playback speed code (PB) representing a playback speed for the signal similar to MPEG, and which is suitable for determining a playback speed of a playback apparatus (400) that differs from a speed at which recorded the signal similar to MPEG. SUMMARY A system for generating a signal (SP) for coupling digital audio, video and information signals in compressed form via a busbar (500). A processing element formats the digital audio, video and information signals into superpacks (SP) for transmission via the busbar (500). Each super pack (SP) comprises the printing of the date and time (TS), and a transport packet (TP), representative of the digital audio, video and information signals. Superpacks (SP) have a fixed duration and occur at varying intervals. The devices (50) receive the superpacket (SP) signal and can use the date and time stamps for clock synchronization. A recording and reproducing device (400) processes the occurrence of variable super-pack signal for recording. The reproduced time stamps (401) are used to control the restoration of the superpacket (SP) signal to substantially have the duration and occurrence as formatted for the transmission of the bus (500). A simplified busbar (501) couples the superpacks (SP) between the devices (100, 400). An indicator (Vs) is added to a superpacket signal to provide automatic control of the interfaces of the busbar of the device (102). The automated interface control also responds to the control status of the device. * * * * *
MXPA/A/1997/010174A 1995-06-14 1997-12-15 Collector and interface bar system for digital consumi equipment MXPA97010174A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9512068.9A GB9512068D0 (en) 1995-06-14 1995-06-14 Bus and interface system for consumer digital equipment
GB9512068.9 1995-06-14

Publications (2)

Publication Number Publication Date
MX9710174A MX9710174A (en) 1998-07-31
MXPA97010174A true MXPA97010174A (en) 1998-11-09

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