MXPA97010144A - Method and apparatus for determining the signal intensity in a velocityvaria data system - Google Patents

Abstract

The present invention relates to a method for determining a signal strength of a signal entering a variable speed data receiver system, where the input signal is compared to a series of frames, each frame has a data rate corresponding unknown, each frame consists of a plurality of data segments in which the number of data segments containing data in each frame depends on the corresponding unknown data rate, the corresponding unknown data rate may correspond to at least one higher data rate and lower data rate, the method comprises the steps of: receiving a first energy value corresponding to the first of the data segments, and adding the first energy value with a previously accumulated total if the first of the data segment corresponds to a data segment that contains data at the lower data rate, to produce a data calculation of the intensity of the

Description

METHOD AND APPARATUS FOR DETERMINING THE INTENSITY OF THE SIGNAL IN A VARIABLE SPEED DATA SYSTEM BACKGROUND OF THE INVENTION I. Field of the Invention The present invention relates to variable data rate communication systems, particularly to a method for using common frame information to detect signal strength.

II. Related Technique In a personal communication system (PCS) or extended spectrum telephony, a large number of subscriber units communicate through "cell sites" or "base stations". The communication path used by a base station that transmits data frames to a subscriber unit is known as an "uplink". In contrast, the "reverse link" refers to the communication path used by the subscriber units to transmit data frames back to a base station. The capacity of the system in an extended spectrum communication system can be limited by the amount of interference present within the frequency of transmission of the system. When it is transmitted in the P16 2 / 97MX.

In the same frequency, the signal proposed by a user may cause interference with the signals transmitted by other users. The interference is higher when the signal is transmitted continuously. This resulting interference limits the total capacity of the system. The interference of the system can be reduced by decreasing the probability that the subscriber units transmit data concurrently on a common frequency. This reduction can be achieved by transmitting data in bursts and randomly distributing bursts of data within a given time frame. An extended spectrum digital communication system, such as the CDMA, can use a voice coder or vocoder capable of producing data at less than full speed. Data at less than full speed can be distributed pseudo-randomly within a frame using an apparatus such as a random-batch series generator. Further information on a generator of random series of data bursts can be found in US Patent Application Serial No. 08 / 194,823 entitled "RANDOM DATA BURST GENERATOR", filed on February 14, 1994 and assigned to the transferee. of the present invention and incorporated herein by reference. This pseudo-random distribution of the data through the P1632 / 97 X frame reduces the probability of concurrent data transmission by numerous users with framing that may be synchronized. In an extended spectrum communication system design, a subscriber unit or other transmitter encodes data frames into a four-speed one depending on the activity of the user's voice, for example, continuous data at "full speed" and speeds lower as a half, a quarter or an eighth of the full speed. Each speed that is less than the full speed transmits a corresponding smaller amount of time per frame than the corresponding higher speeds. A data rate of one medium sends to a half of the time, a data rate of one quarter sends to a quarter of the time and a data rate of one eighth sends only one eighth of the time. In an example of a variable speed spread spectrum system, data is represented by a series of data symbols that are grouped into power control groups. The position of the power control groups within each frame is determined pseudo-randomly. The subscriber unit then transmits the frames to a base station or other receiver. More details on an exemplary method of formatting pseudorandom data can be found in the Application for P1632 / 97MX US Patent Serial No. 08 / 194,823 referred to above and in the TIA / EIA Interim Standard "Mobile Station-Base Station Compatibility Standard for Dual-Mode Wideband Spread Spectrum Cellular System", TIA / EIA / IS-95, July 1993, Telecommunications Industry Association, Washington, D.C. A base station receiving a data frame has no prior knowledge of the speed of the data to which the subscriber unit has encoded the frame. In an example of an extended spectrum system, a base station receives a data frame from a subscriber unit every 20 milliseconds (ms). With variable speed coding, the current frame received by a base station can be encoded at a different data rate than the previously received data frame. The base station, to properly process a signal that enters, must determine the amount of energy contained in the signal. Given the speed of data transmitted, a base station that receives the variable speed data can easily calculate the position of a power control group in a data box and from this information make an accurate measurement of the signal strength . However, the base station does not know what the data rate selected by the subscriber unit has been at the time it needs to measure the intensity of the data.

P1632 / 97MX the signal and can not do this calculation. Therefore, any method to determine a relative signal strength must be obtained in a manner independent of the speed. This invention provides a method for determining the intensity of the signal in a manner independent of speed. An objective of the present invention is to make an independent determination of the data rate of a signal strength using common frame information in a variable data rate communication system. Another objective of the present invention is to use the measurements of the signal strength in a variable speed communication system to indicate that one signal is sufficient for communication with voice and data traffic. The invention measures the strength of the signal and provides a clue when the signal can be used for communication. Still another object of the present invention is to use the measurements of the signal strength in a rake or inclined receiver design to determine if the signal combination is suitable. The invention provides a combination cue when the signal strength is sufficient for various signal combinations.

P1632 / 97MX COMPENDIUM OF THE INVENTION The present invention determines the intensity of the signal in a variable speed communication system in a manner independent of the speed. In the preferred embodiment of the present invention the data is grouped into symbols called power control groups. The power control groups are transmitted in different positions within a data frame using a pseudo-random distribution method. By using a subset of power control groups designated as active power control groups, the accuracy of the signal measurement is greatly improved. The active power control groups define time intervals during which the power control groups always transmit. A receiver that uses the signal energy of only the active power control groups can make an accurate measurement of the signal strength. In the preferred embodiment using CDMA, the active power control groups include all the power control groups that transmit during the lowest data rate. Time slots that contain power control groups that have the lowest data rate also contain power control groups at all data rates P1632 / 97MX higher. The lowest data rate in the preferred mode is one eighth of the full transmission rate. The operation of the system begins with a restoration at the beginning or when a demodulator element is assigned to a new input signal. After resetting, the energy levels of the signal are collected in the time intervals corresponding to the active power control groups. The higher the energy level of a stronger signal is the signal. Energy levels are stored in one or more memory elements and added over time to obtain average measurements of signal strength. Typically, memory storage elements that contain the above measurements are cleaned and reused for new energy measurements through a process known as maturation or stabilization. The energy measurements are summed and compared with various threshold levels arranged to create hysteresis. A first predetermined threshold level represents the energy level. A signal must have another signal processing beforehand. The processing of the signal occurs when the added energy levels meet or exceed the first predetermined threshold. If the energy threshold subsequently falls below the first level P1632 / 97MX threshold but remains above a second threshold level, the processing continues. Only when the energy of the signal falls below the second predetermined threshold level is considered insufficient the signal strength for a particular signal processing method and also the processing of the signal is terminated. It is possible to determine the threshold levels using the signal processing technique. A pair of blocking thresholds can be established if the signal processing requirement calls a blocking indicator. The blocking indicator can be used to indicate that the signal received by the receiver is strong enough to demodulate the signal to produce reliable data. You can also use threshold pairs to allow diversity in combination techniques. The receivers, specifically those that use a rake receiver design are capable of demodulating multiple trajectory versions of the same signal in parallel. The combination of some versions of the same signal is a method of recreating the original signal transmitted from the subscriber unit. Exact threshold levels for any signal processing technique are established to achieve a desired result based on the operating parameters of the system. The present invention uses the method before P1632 / 97MX mentioned in a variable speed communication system to determine if the intensity of a given signal is acceptable for communication. When the signal energy detected at the lowest data rate complies with certain predetermined threshold energy levels then it is possible to establish the signal lock and the data combination indicators.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram illustrating an example of the transmitting part of the subscriber unit of an extended spectrum communication transceiver with variable data rate. Figure 2 is a block diagram illustrating an example of a base station receiver containing elements for multiple independent demodulation; Figure 3 is a detailed block diagram illustrating the location of an exemplary block detection apparatus within an element for demodulation in the receiver of the example base station; Figure 4 is an illustration of an exemplary block detection apparatus operating in accordance with the principles of the present invention; and Figure 5 illustrates how a given data frame should be formatted if it transmits at different speeds P1632 / 97MX data and is received by the receiver of Figure 2.

DETAILED DESCRIPTION OF PREFERRED MODALITIES Accurate measurement of the signal strength is usually required to maintain a reliable link of the transmission in a communication system. When a strong signal and a relatively weaker one each find similar interference along a given transmission path, the strongest signal usually provides a higher signal-to-noise ratio (SNR) resulting in better quality Communication. A communication system capable of measuring minor variations in the energy level of a signal can accurately distinguish between these strong and weak signals. In a variable data rate communication system a signal transmitted by a subscriber unit may contain data distributed in a pseudo-random manner. This distribution method makes it difficult to measure the signal intensity precisely because the variations in the data appear as fluctuations in the strength of the signal. In theory, a system capable of blocking an adequate signal should make adequate measurements of the signal strength. The present invention provides an apparatus and method for detection Blocking P1632 / 97MX for a variable data rate system that allows the measurement of a signal strength independent of the data transmission rate. The active power control groups contain signal information independent of the data transmission rate and are a subset of power control groups within a data frame. In the preferred embodiment, a data frame has 16 power control groups of which at least two are classified as active power control groups. Figure 5 illustrates an example of a data box formatted for transmission at each of the possible data rates. As you can see in Figure 5, the power control groups at each speed are obscured. A pseudorandom process, which is described later, controls the "placement" of the power control groups within each frame for transmission. The inspection of this process indicates at least two power control groups, the active power control groups, are transmitted in each frame. These active power control groups appear in the same location in a box regardless of the speed of the data for each frame. In the preferred embodiment, the active power control groups are transmitted one eighth of the speed of the P1632 / 97MX data or lower. In Figure 5, the two power control groups, the power control groups 2 and 9, are shown in the two obscured intervals in a sample box of one-eighth speed 506. The position of the active power control group in the subsequent frame it varies. The location of the active power control groups can be determined in the receiving unit in the same way that the positions of the frames of an eighth speed in the transmitting unit are determined. The location of the active power control groups can be based on one or more parameters, such as the identity of the transmitting or receiving unit, a call allocation number, the time of day of the transmission or the PN coding used by the unit transmitter or receiver. The accumulation of energy levels indicated by each active power group provides a basis for reliable measurement of signal strength. This method is an improvement over previous blocking detection methods because it limits the measurement of the signal to the active power control groups that contain real data and not to all the power control groups transmitted within a given frame . Potentially some groups may contain noise making the measurement inaccurate.

P1632 / 97MX Another important aspect is the use of multiple threshold levels to measure accumulated energy levels of eignal. As signals are received, their respective accumulated energy is compared against multiple threshold levels instead of a single energy threshold level. The use of multiple threshold levels improves the detection of the signal and decreases errors in the detection of the false signal caused by fluctuations in the level of energy localized in the transmitted signal. An exemplary embodiment uses two threshold levels when making a signal determination but it is possible to use a more complex scheme with a plurality of threshold levels in more demanding communication environments. For example, a higher threshold level may be used to indicate when an energy level is sufficient for communication. A lower threshold level can be used to indicate when the energy level for communication is not sufficient. When a signal exceeds the upper threshold it can still be considered valid for communication even if subsequent minor fluctuations cause it to fall below the upper threshold limit itself. Once the signal exceeds the upper limit of the threshold, it continues so that it is considered valid for communication as long as it remains above the lower limit of the threshold.

P1632 / 97 X To assist in understanding the present invention, a brief description of the data encoded and transmitted by the subscriber unit is provided. Figure 1 illustrates an exemplary embodiment of a transmission portion 100 in a variable data rate transceiver. In an example of a communication system, such as a CDMA cellular variable speed communication system or a Personal Communication Network (PCN), the "uplink" determines a transmission path from a base station to a subscriber unit. In contrast, the "reverse link" defines the transmission path from the subscriber unit to a base station. Commonly, signals sent from a subscriber unit travel through an access channel or a traffic channel. The access channel is used for short signaling messages such as the origins of the call, responses to pages and records. The traffic channel is used to communicate (1) primary traffic, usually user voice data, (2) secondary traffic, usually data other than the user's voice, (3) signaling traffic as command signals and control, (4) a combination of primary traffic and secondary traffic, or (5) a combination of primary traffic and signaling traffic.

P1632 / 97 X The transmission portion 100, when operating in a mode in which the primary traffic is present, communicates acoustic signals, such as voice and / or background noise, as digital signals by the transmission medium. To facilitate digital communication of acoustic signals, these signals are sampled and digitized using well-known techniques. For example, in Figure 1, the sound is converted, by means of a microphone 102, into an analog signal which is then converted into a digital signal by means of a codec 104 (encoder-decoder). Codee 104 usually performs an analog-to-digital conversion process using a standard 8-bit / μla format technique. In the alternative, it is possible to directly convert the analog signal to the digital form in a uniform pulse code modulation (PCM) format. In an exemplary embodiment, codec 104 uses 8 kHz sampling and provides an 8-bit sample output at the sampling rate, to perform a data rate of 64 kbps. The 8-bit samples are the output of the codec 104 to the variable speed vocoder 106 where a μla / uniform code conversion process is performed. In the variable speed vocoder 106, the input data samples are organized in frames having a P1632 / 97MX number of samples predetermined. In a preferred implementation of the variable speed vocoder 106 each frame consists of the order of 160 samples or about 20 ms. of voice at the sampling rate of 8 kHz. Those skilled in the art should understand that it is possible to use other sampling rates and frame sizes as desired for the designs of the specific communication system. Each sampled speech frame is coded at variable speed in the variable speed vocoder 106. The vocoder data packets are then sent to a microprocessor 108 and associated circuits for further formatting. The microprocessor 108 receives the data packets every 20 ms along with an indication of the speed at which the voice was coded. The microprocessor 108 also receives, if present, a secondary traffic data entry. the microprocessor 108 also internally generates signaling data (i.e., commands) for transmission. The microprocessor 108 usually includes program instructions contained within a program instruction memory, a data memory and the appropriate interface and related circuits as is known in the art. The data leaves the microprocessor 108 to the CRC & the bits of the tail 112 each frame. The CRC and the bit generator P1632 / 97MX queue 112 calculates a series of verification bits for data at certain data rates and also generates a series of queue bits for each frame. In Figure 1, the data frames with check bits and tail bits are output to the convolutional encoder 114. In an exemplary embodiment, the convolutional encoder 114 preferably encodes the input data using a 1/3 speed convolutional code, restriction length k = 9. For example, convolutional encoder 114 is constructed with generator functions of gg = 557 (octal), g ^ = 663 (octal) and g2 = 711 (octal). As is well known in the art, convolutional coding involves the addition of module 2 of selected derivations of a delayed data sequence shifted in time and in series. The length of delay of the data sequence is equal to k-1, where k is the restriction length of the code. Since a 1/3 rate code is used in the preferred embodiment, three code symbols are generated, the code symbols (cg), (c ^) and (C2), for each data bit entry in the encoder . The code symbols (CQ), (c ^) and (c2), are generated respectively by the generator functions g0, qi and g2. The code symbols are sent from the convolutional encoder 114 a to an interleaver 116. The exit code symbols are P1632 / 97MX provide the interleaver 116 in the order of the code symbol where (c0) first, the code symbol (C) the second and the code symbol (c2) the last.The tail bits can be used at the end of Each frame for restoring the convolutional encoder 114 to an all-zero state during the preparation for the next frame The symbols coming out of the convolutional encoder 114 are provided to the block interleaver 116 which, under the control of the microprocessor 108, repeats and intersperses the code symbols The code symbols are usually stored in the random access memory (RAM), they are arranged in a form by means of which the repetition of the code symbol varies with the data transmission speed. When the speed of the transmission data is full speed, the interleaver operates in a 100% duty cycle and the code symbols of the block interleaver 116 are not reset. At medium speed, the interleaver operates in a 50% duty cycle and each code symbol repeats once (ie, each symbol appears twice). At the speed of a quarter, the interleaver operates in an occupation cycle of 25% and each code symbol is repeated three times (ie, each symbol appears four times). At the data rate of one eighth, the interleaver operates in an occupation cycle of 12.5% andP1632 / 97MX each code symbol is repeated seven times (that is, each symbol appears eight times). For all data rates, the repetition of the code results in a constant code symbol rate of 28,800 code symbols per second for the data as they exit the block interleaver 116. Finally, as described below, only one appearance of each code symbol is actually transmitted in the reverse link. In this example, interleaver 116 is a block interleaver, constructed by methods well known in the art, and provides an output of code symbols for a period of time at 20 ms intervals. Again in relation to Figure 1, the interleaved code symbols leave the block interleaver 116 towards the 64-ary orthogonal modulator 118 in frames corresponding to a symbol rate of 28.8 kilograms per second (ksps). Typically, the reverse link extended spectrum communication channel uses orthogonal M-ary signaling. For example, when orthogonal 64-ary signaling is used, every six code symbols provided by the block interleaver 116 will give rise to one of the 64 possible modulation symbols being selected and sent by the modulator 118. Each modulation symbol 64- Aryan that usually P1632 / 97MX corresponds to the functions of Walsh contains 64 chips. For more detailed information on the use of Walsh functions and M-ary orthogonal signaling see U.S. Patent No. 5,103,459 entitled "SYSTEM AND METHOD FOR GENERATING SIGNAL WAVE FORMS IN A CDMA CELLULAR TELEPHONE SYSTEM", published on 7 April 1992, which was assigned to the assignee of the present invention and is incorporated herein by reference. Although a 64-ary modulation scheme is used for illustration purposes, it is possible to use higher or lower M-ary modulation schemes. Each symbol leaves the modulator 118 to an input of the module 2 addressee, the exclusive OR-gate within the pseudo-random modulator (PN) 124. The symbols come out of the modulator 118 at a rate of 4.8 ksps corresponding to the Walsh chip rate of 307.2 kilochips per second (kcps). The other input to the exclusive OR gate is provided from the large code generator 120 which generates a masked pseudorandom (PN) noise code. The long code sequence provided from the large code generator 120 is at a chip rate of four times the Walsh chip rate of the modulator 118, that is, the PN chip rate of 1.2288 megachips per second (Mcps). The OR-exclusive gate inside the PN 124 modulator combines P1632 / 97MX the two input signals to provide an intermediate output of the data at chip speed of 1.2288 Mcps. The long code sequence is a time shift of a 2-l chip sequence and is generated in the linear generator well known in the art using the following polynomial: p (x) = x42 + x35 + x33 + x31 + x27 + x26 + x22 + x21 + x19 + x18 + x17 +? 16+ x10 + x7 + x6 +? 5 +? 3 + x2 + x1 + 1. (4) The intermediate output inside the PN 124 modulator is provided respectively as an input to a pair of modulo 2 add-ons (for example, exclusive OR gates). The other input to each of the pair of gates are second and third PN sequences used to cover the modulated signal. The second and third sequences of PN or "short codes" are provided by PN generators of the individual Channel I and Q contained within the short code generator 121. The data is dispersed in the OQPSK before the actual transmission using the second and third. PN sequences. The OQPSK spread in the reverse link traffic channel uses the same PN I and Q codes as the pilot PN codes I and Q of the upstream channel. The PN I and Q codes generated by the short code generator 121 are from P1632 / 97MX length 215 and preferably are codes shifted to time zero with respect to the uplink channel as they are perceived in the subscriber unit. For purposes of further understanding, a pilot signal for each base station is generated in the uplink channel. Each signal from the pilot channel of the base station is dispersed by the PN I and Q codes as just mentioned. The PN I and Q codes of all base stations are the same, however, between the base stations the codes are shifted by a shifting of the code sequence to provide a difference between the transmission of the base station. The generating functions for the short PN codes I and Q are: px (x) = x15 + x13 + x9 + x8 + x7 + x5 + i. (5) and pQ (x) = x15 + x12 + x11 + x10 + x6 + x5 + x4 +? 3 + i. (6) The short code generator 121 can be constructed as is well known in the art to provide an output sequence according to equations (5) and (6). An example of this code generator is described in U.S. Patent No. 5,228,054 entitled "GENERATOR OF PSEUDO-NOISE STRENGTH OF POWER LENGTH OF TWO WITH ADJUSTMENT OF QUICK DISPLACEMENT", published on July 13, 1993 and P1632 / 97MX assigned to the assignee of the present invention and incorporated herein by reference. The waveforms I and Q are respective outputs of the pair of modifiers of module 2 (for example, the exclusive OR gates) and are respectively provided as inputs to a pair of finite impulse response (FIR) filters 122. The FIR filters 122 are digital filters that limit the band of the resulting I and Q waveforms. The FIR 122 digital filters shape the I and Q waveforms so that the resulting spectrum is contained within a given spectral mask. The FIR filters 122 may be constructed in accordance with well-known digital filter techniques and preferably provide a desired frequency response. The binary inputs '0' and '1' for the FIR filters 122, generated by the PN dispersion functions, are mapped to +1 and -1, respectively. The sampling frequency of the digital filter is 4.9152 MHz = 4 x 1.2288 MHz. An additional synchronous '0' and '1' binary input sequence with the digital waveforms I and Q are provided to the FIR filters 122. This sequence particular, known as masking sequence, is the output generated by a random data burst generator. The masking sequence multiplies the P1632 / 97MX binary waveforms I and Q to produce a ternary input (-1, 0 and +1) to FIR filters 122. As already described, the data rate for transmission over the reverse link traffic channel it is variable (9.6, 4.8, 2.4 or 1.2 kbps) and varies from frame to frame. Because the frames are of a fixed length of 20 ms for the reverse link traffic channel, the number of information bits per frame is 192, 96, 48 or 24 for transmission at data rates of 9.6, 4.8, 2.4 or 1.2 kbps, respectively. As described above, the information is encoded using a 1/3 speed convolutional encoder and then the code symbols are repeated by a factor of 1, 2, 4 or 8 for a data rate of 9.6, 4.8, 2.4 or 1.2 Kbps, respectively. The repetition rate of the resulting code symbol is set to 28,800 symbols per second (sps). This flow of 28.8 ksps is interleaved as described in the above. Before transmission, the signal of the reverse link channel passes through the gate so that the selected symbols are deleted and the remaining symbols are transmitted. As the speed of the data changes, the occupation cycle of the transmission gate also varies. When the transmission data rate is at full speed (9.6 kbps), the P1632 / 97MX transmission gate allows all symbols to be transmitted. Nevertheless, when the speed of the transmission data is the average speed (4.8 kbps), the transmission gate allows only half of the symbols to be transmitted. At a rate of one quarter (2.4 kbps), the transmit gate allows a quarter of the symbols to be transmitted. In the same way, at a speed of one eighth (1.8 kbps), the gate allows one-eighth of the symbols to be transmitted through the same process of intermittent locking and unlocking. The intermittent locking and unlocking process operates by dividing each frame into a predetermined number of periods of equal length, called power control groups. Each power control group contains 12 bits and 36 data symbols in the form of 6 Walsh symbols where each Walsh symbol is composed of 64 Walsh chips. Certain power control groups pass through the electronic gate (that is, they are transmitted), while other groups do not pass the gate (ie they are not transmitted). The determination of the groups that are transmitted or not transmitted is controlled by the logic of the random data burst generator 110. The transmitted power control groups are placed pseudo-randomly in their positions within a frame such that the load of real traffic P1632 / 97MX in the reverse link channel is averaged into these different subscriber units by randomizing the different power control groups thus dispersing the system energy in a pseudo-random manner in the time domain. In addition, the transmitted control groups are such that each code symbol that enters the repetition process is transmitted only once. During periods in which there is no transmission, the subscriber unit does not transmit power and reduces interference to other subscriber units operating on the same frequency of the reverse link channel and conserves the power in the subscriber unit. The process of intermittent locking and unlocking of the transmission can be disabled for certain transmissions, such as when the subscriber unit is trying to access the system or transmitting other non-traffic messages. In this example, the subscriber unit can transmit messages at data rate of 4.8 ksps with the code symbols repeated once (each symbol is presented twice) for transmission. In the implementation of the random data burst generator function, the logic of the random data burst generator 110 generates a masking flow of O's and I s that mask P1632 / 97MX pseudo-random redundant data generated by the repetition of the code. The pattern of the masking flow is determined by the data rate and by a block of 14 bits taken from the large code sequence generated by the large code generator 120. The bits of the mask are synchronized with the stream of data. data and data are selectively masked by these bits through the operation of the FIR filters 122. Within the logic of the random-bursted data generator 110, the sequence of large 1.2288 MHz codes leaving the large code generator 120 is input to a 14-bit shift register, which travels at a rate of 1.2288 MHz. The content of this shift register is loaded into a 14-bit latch memory exactly one power control group (1.25 ms) before of each frame boundary of the reverse link traffic channel. The logic 110 uses this data together with the speed input of the microprocessor 108 to determine, in accordance with a. predetermined algorithm, the particular power control group (s) in which the data is to be passed through the FIR filters 122 for transmission. The logic 110 in this way sends for each power control group a '1' or '0' for the entire power control group depending on whether the data is going to P1632 / 97MX filter (O *) or pass ('1'). Further details on the random generation function of data bursts is described in the previously mentioned standard TIA / EIA / IS-95 and in the copending US Patent Application Serial No. 08 / 194,823 entitled "RANDOM DATA BURST GENERATOR" which has been assigned to the assignee of the present invention and is incorporated herein by reference. In Figure 1, the output of the channel I data from the FIR filters 122 is sent directly to a digital to analog converter (D / A) and to an anti-alias filter circuit 126. However, the data of the Channel Q leaves the FIR filters 122 to a delay element (not shown) that adds half PN chip time delay (406.9 nsec) to the Q channel data. The Q channel data then leaves the delay element towards the channel. digital to analog converter (D / A) and anti-alias filter circuit 126. Circuit 126 converts the digital data in analog form and filters the analog signal. The signals coming out of the circuit 126 are sent to the Quadrature Phase Shift Key (OQPSK) 128 modulator where they are modulated and output to the RF transmitter 132. The RF transmitter 132 amplifies, filters and raises the frequency of the signal for transmission. The RF transmitter 132 also receives signal 130 from logic 110 to turn on the transmitter during portions of the frame that are going to P1632 / 97MX transmit and turn it off and on another time. The RF signal leaves the transmitter 132 to the antenna 134 for communication with the base station. The data that is transmitted in the reverse link channel is coded, interleaved, modulated by orthogonal M-ary modulation, and PN is dispersed in the direct sequence before transmission. Table I further defines the relationship between the data values, symbols and transmission rates in the reverse link traffic channel. Because the frames are of fixed length of 20 ms for both the access channel and the reverse link traffic channel, the number of information bits per frame is 192, 96, 48 or 24 for transmission at speeds of data of 9.6, 4.8, 2.4 or 1.2 kbps, respectively.

P1632 / 97MX TABLE I ? or To assist in further understanding the present invention, signal reception and processing of the present invention will be described. Figure 2 illustrates how the signal transmitted from the subscriber unit is received and processed in a base station. Figure 3 shows in detail how a received signal is processed by the demodulation unit 204 and finally arrives at the energy accumulator and blocking detector 344. A receiver of the conventional base station has at least one demodulation element that uses at least one blocking detector apparatus in the demodulator unit to assist in the detection of the signal. In the same way, a base station containing multiple and independent demodulation elements can use a plurality of these detectors. Figure 2 illustrates a modality of a base station having multiple demodulation elements. Figure 2 represents a base station divided into three sectors where each antenna 222A-222C is the antenna of a sector. Each of the antennas 222A '-222C corresponds to one of the antennas 222A-222C and is the diversity antenna for the sector corresponding to the antenna with the same number. Each of the antennas 222A-222C covers the same coverage area as the corresponding antenna of the antennas 222A1 222C. In a conventional base station, the antennas 222A P1632 / 97MX - 222C have overlapping coverage areas that subdivide the base station into three sectors where each antenna covers more than one third of the total aggregate coverage area of the base station. Therefore, a signal from a single subscriber unit may be present on more than one antenna at a time. The number of sectors and the number of antennas assigned to each sector can vary. Variations of this type do not affect the general principles of the present invention. The antennas 222A, 222B, 222C, 222A *, 222B1 and 222C send the received signal to the RF processing and digital conversion circuits 224A, 224B, 224C, 224A ', 224B' and 224C 'respectively. RF processing and digital conversions 224A, 224B, 224C, 224A ', 224B' and 224C process the RF signal and convert the signal into digital data. The circuits for RF processing and digital conversion 224A, 224B, 224C, 224A ', 224B' and 224C filter the digital data and provide the resulting digital data to interface port 226. Interface port 226 can connect any of the six signal paths that enter any of the search elements or demodulation elements under the control of the controller 200 through the interconnection 212. The search engine and the demodulation elements P1632 / 97MX are also controlled by the controller 200 by means of the interconnection 212. The search elements 202A-202N continuously scan a temporary domain window in search of an information signal of the particular subscriber unit controlled by the system controller 200 The search elements 202A-202N also scan a series of time shifts around the nominal arrival of the signal in search of multipath signals that have been developed. The search elements 202A-202N pass the received data to the controller 200 for memory storage 218. The search elements 202A-202N can pass data through a standard bus or collector., or, the search elements 202A-202N can pass the data to the memory 218 through direct memory access (not shown). The controller 200 uses the data stored in the memory 218 to assign the demodulation elements 204A-204N to one of the plurality of information signals from a single subscriber unit. To provide a quick search process, more than one search element is used to perform a full search. Each of the search elements 202A-202N is assigned by the controller 200 to search for a series of time shifts. Each of the P1632 / 97MX search elements 202A-202N returns to the controller 200 the results of the search performed. The controller 200 tabulates these results for use in the allocation method. The demodulation elements 204A-204N of odd the received signal to produce data symbols that are combined in the symbol combiner 208. The output of the symbol combiner 208 (not shown) is added to the soft decision data suitable for the decoding of Viterbi. The symbol combiner 208 may combine signals from a single sector to produce an output or may combine symbols from multiple sectors as selected by the interface port 226. When the symbol combiner 208 is combining signals from a communicating subscriber signal Through more than one sector, this state is known as smoother transfer. The base station may send the output of the symbol combiner 208 to a cellular system controller where the symbols of a common subscriber unit are also combined with the signals of other base stations to produce a single output. This process is known as soft transfer. The demodulation elements 204A-204N also provide various output control signals for the controller 200 through the interconnection 212 which are used in the P1632 / 97MX allocation process as it can be a lock or unlock indication. Each of the demodulation elements 204A -204N is very similar in structure to the others. Figure 3 illustrates in more detail the demodulation element 204 of Figure 2. In Figure 3, the digitized input signal is assumed as a Quadrature Phase Shift Keyed Offset (OQPSK) signal having in-phase signal samples (I) and phase quadrature (Q). Samples of signal I and Q, each being a multi-bit value, are input to decimator and despreader 330. Usually, samples of signal I and Q are oversampled at the input is received at a data rate higher than the speed of the chip. In the decimator and deseparador 330, the data are converted to decimals starting from the speed of the oversampled data at the PN chip speed. The data is then reduced in its variation by means of the decimator and the desprepador 330 using the same three PN sequences used to modulate this signal in the subscriber unit. The decimator and the deseparador 330 send the components of the signal I and Q with less variation towards the accumulator 338. The accumulator 338 accumulates the components of the signal I and Q during a period of Walsh chip to produce data of chip I and Q accumulated Chip data P1632 / 97 XI and Q accumulated are then processed by means of the Fast Hadamard Transformer (FHT) and the selector 340. The FHT portion of the FHT and the selector 340 correlate with the data of the I and Q chip accumulated with all the Walsh sequences possible. Each result of the I and Q correlation is then used to calculate the magnitude of the corresponding Walsh symbol. The magnitude calculations of each of the correlation results I and Q are compared to each other. The Walsh symbol corresponding to the result of the correlation I and Q having the largest energy is selected by the selector part of the FHT and the selector 340 according to the demodulated Walsh symbol. The demodulated Walsh symbol goes out together with the corresponding calculated magnitude of this Walsh symbol. Due to the different arrival times of the signal paths assigned to the different demodulation elements, the demodulation element 204 performs a balance of the symbols. The time balance 342 delays the output so that each demodulation element provides the synchronized symbol data relative to the other demodulation elements. The energy accumulator and the blocking detector 344 sum a series of energies of consecutive Walsh symbols. The resulting sum is sent as the intensity of the signal 364 to the controller 200 (FIG.

P1632 / 97MX 2) for use in assigning the demodulation elements 204. The resulting sum is also compared to the thresholds for indicating a locked or unlocked state and for indicating a state of combination of the signal. The arrival time of the signal path assigned to the demodulation element 204 may change over time due to the movement of the subscriber unit or the change in the surroundings of the subscriber unit. Therefore, the demodulation element of the base station 204 incorporates circuits for time tracking. The decimator and the deseparador 330 send an early and a delayed version of the I and Q signal components with less variation to be used in the time tracking process. The accumulator 332 accumulates the components of the I and Q signal with less variation, early and late during a Walsh chip period to produce accumulated early and late I and Q chip data. The early and late metric generator 334 multiplies the accumulated early and late I and Q chip data by the Walsh sequence corresponding to the demodulated Walsh symbol and accumulates the result to produce early and late Walsh I and Q symbols. The magnitude of the early Walsh symbol is based on the symbol of Walsh I and early Q and the magnitude P1632 / 97MX of the late Walsh symbol is found based on the Walsh I and late Q symbol. The magnitude of the early symbol is subtracted from the magnitude of the late symbol to produce an error metric. The error metric is sent to the temporary tracking circuits 336. The temporary tracking circuits 336 use the error metric to determine whether the variation reduction operation in the decimator and desprepador 330 is executed forward, backward or in time. The time tracking circuits 336 also track the time of the absolute demodulation path of the demodulation element for the output to the controller 200 (Figure 2). The search elements 202A-202N, in Figure 2, are similar to the demodulation element except that the search elements do not have time tracking or blocking detection. The time tracking is not necessary in the search elements 202A -202N because the search process is performed quickly, in relation to the coherence of the channel and the time variations are insignificant during the time used to perform a single search. For the same reason, a blocking detector apparatus, the current invention, does not need search elements 202A-202N either. An objective of this invention is to provide a reliable method for determining the intensity of a signal P1632 / 97MX containing variable rate data transmitted by the subscriber unit and received at the base station for blocking detection purposes. Depending on the data rate selected by the subscriber unit, the symbols contained in the power control groups are transmitted in a deterministic pseudo-random position within a reverse link transmission frame. The blocking detector of the present invention, contained within the demodulation element 204 in Figure 2 and Figure 3, indicates the signal strength of a received signal. The measurement of the intensity of the signal made by the energy accumulator and the blocking detector 344 is important for various reasons. The main benefit of this method is the measurement of the intensity of the signal is a fast and reliable calculation of the signal strength as it is demodulated. The present invention produces an immediate response to rapidly change the intensity of the conformal signal, it is generated by the fast fade characteristics of the terrestrial channel. Note that it is possible to make a more accurate measurement of the signal strength after the data rate of the incoming signal has been made. However, the speed determination process usually includes this step of P1632 / 97MX Viterbi decoding that introduces a delay. In the present invention, the indication of the signal strength can be used to determine whether the incoming signal is still of sufficient intensity to be worth the combination with the output of the other demodulation elements and the subsequent decoding of Viterbi. . The signal strength can be used to temporarily disable time tracking during periods of low signal strength. This can be used as a clue that the demodulation element must be reassigned to a new time offset. An exemplary implementation of the invention is illustrated in Figure 4. The energy of the demodulator 432 is used to determine, in a manner independent of the speed, whether the signal strength is sufficient for the receiver to use it. If the signal strength equals or exceeds the predetermined levels of the blocking threshold, the received signal is considered sufficient for communication and the signal of the blocking indicator 422 is set appropriately. The demodulation element is considered blocked for the incoming signal. Using a method similar to the previous one it is possible to provide the indicator signal of the combination if the signal strength is sufficient for use with various combination techniques. Once the level P1632 / 97MX detected the energy of the signal reaches a predetermined level of the combination threshold, the received signal strength is considered sufficient for the combination and the signal indicator of the combination 424 is properly established. First, the clock of the power control group 428 provides a signal indicating at what times within a fixed-length frame a power control group may be present. As noted in the above, an exemplary frame occupies a time interval of 20 ms and is further subdivided into a series of 16 power control groups of 1.25 ms. The clock signal of the power group indicates the start of each of the 16 power control groups within each frame. Due to the process of blocking and intermittent unblocking of the signal, which occurs in the subscriber unit when the transmission of the data is less than full speed, some power control groups do not contain data. The active power control groups are a minimum subset of power control groups that contain data at all data transmission speeds. The clock signal of the active power control group provides an indication of the location and frequency of a control group of P1632 / 97MX transmitted power independent of data speed. The receiver of the base station uses the same long PN code to reduce the variation of what was used in the subscriber unit to disperse the signal. The long PN code is also used in the subscriber unit to place the power control groups within the frames at the various speeds. In the same way, the long PN code is used to identify the active power control groups in the base station. Until the complete synchronization is determined, the active power groups can be used as an indication that signal synchronization has been obtained. An exemplary mode uses the lowest speed in the communication system to determine which subintervals of time constitute the active power control group. The active power control groups at the lowest data rate are a subset of power control groups that contain data at all higher speeds. Therefore, basing the blocking indication only on the active power control groups guarantees accurate signal strength measurements. An example of a one-eighth speed frame 506 in Figure 5 shows that the two groups of P1632 / 97MX power control containing data are considered as active power control groups 2 and 9. These two power control groups are considered active power control groups because having been transmitted in a quarter speed box 504, the 502 medium speed frame or the 500 full speed frame these same power control groups still contain data. In this example, the intensity of the sampling signal for all frames as an octave 506 speed chart ensures precise intensity measurement notwithstanding the actual data rate. The teachings of the invention also contemplate the selection of other active power control groups based on criteria other than the lowest data rate in the system. In Figure 4, the energy level values of the Walsh symbol emerging from a demodulator element 204 (Figures 2 and 3) are provided as an energy signal from the demodulator 432 to an inlet of the accumulator 401. The other inlet of the accumulator 401 it is a symbol clock signal 430. In response to this symbol clock signal 430, the accumulator 401 adds six energy level values from the input Walsh chip corresponding to a power control group. The summed value is output to a filter composed of the shift register 446 and P1632 / 97MX digital summing adder 438. Accumulator 401 is restored or cleaned to the sum of the next series of Walsh chip energy level values corresponding to the next power control group. The watch of the active power control group 426 and the clock of the power control group 428 are coupled to the inputs of the "AND" gate 400. Both the watch of the active power control group 426 and the watch of the power control group 428 each will provide an indication signal when an active power control group is received. The clock of the power control group 426 can be implemented as a two-phase clock to provide a first clock signal to the AND gate 400 and a delayed clock signal to a restore input of the accumulator 401. When both inputs are indicated to the AND gate 400, the energy value in the accumulator 401 is sent to the shift register 446. An exemplary displacement register 446, which is coupled to and responds to the gate AND 400, consists of a plurality of stages of serially connected register 402-416 that store the added energy levels of the numerous active power control groups. The shift register 446 accepts a new energy measurement in the register stage 402 and displaces the P1632 / 97MX pre-power information from the recorder stage 402 to the subsequent register stage 404 in response to the AND gate 400. The subsequent register stages 404-414 also shift their current energy measurements to their respective subsequent register stages 406-416 in response to AND gate 400. This method is a first-input-first-out (FIFO) method for collecting energy samples loaded in the shift register 446 which, in this example, consists of eight stages of registration. It is possible to use various variations in the types of shift recorders and shift registers of more or less stages. In addition, various methods for displacement values between these recording stages may be used depending on the specific application and are considered within the teachings of this invention. The readiness signal of the register 448 is coupled to the elements of the recorder 402-416, located within the shift register 446 to load the recorder with a series of predetermined values. As you can see, the values loaded in this recorder can be used to initially enable or disable the combination or blocking indication. The energy level of each register stage P1632 / 97MX 402-416 within the shift register 446 each is coupled to the input of the adder 438. The adder 438 takes the individual values of the energy level provided by each register stage 402-416 and provides a value of the sum of the energy level 440 representing the sum of the energy levels in the energy value shift register 446. It is evident that the shift register 446 and the adder 438 perform a filter function of the FIR type (finite impulse response) . In addition, an optional series of energy weighting elements 402 '- 416' can be used to modify the contribution of the individual energy level made by each recording element to the value of the summed energy level 440. The intensity of a signal received by the demodulator element is related to the total energy indicated by the output of the summation unit 401. The higher the collective energy level present in the recording stages 402-416, the more likely the demodulated signal can be used for communication. The summed energy level 440 is provided respectively to an input to each of a pair of comparators 418 and 420. The other inputs to the comparator 418 are the blocked threshold signal 434 and the unblocked threshold signal 436. Depending on the value of the energy level summed 440, the signal can be provided P1632 / 97MX blocked threshold 434 and unlocked threshold signal 436, blocking indication signal 422. The second comparator operates in the same manner. Additional inputs to the comparator 420 are the combination threshold signal 442 and the non-combination threshold signal 444. Depending on the value of the summed energy level 440, the combination signal 442 and the non-combination signal 444, it is possible to provide the combination indication signal. The operation of the blocking detection method begins with a system reset, usually at the start of the system or when the corresponding demodulator element is assigned to a new signal. In any case, each new signal occupies a unique temporal displacement. When a new signal is assigned, the existing data is removed from the recording stages 402-416 and the shift register 446 is preloaded with predetermined initial data. The shift register stages are then ready to begin the evaluation of the signal energy of the demodulator that is received. In an exemplary embodiment, the series of initial data loaded so that the blocking detector provides blocking indication only after the actual energy levels are displaced in the shift register 446.

P1632 / 97MX used to initialize the filter are chosen by the system designer based on the known requirements for the system. The operator of the system may decide that the detector should initially block the signal and thereby preload the shift register 446 with values that would initially indicate the signal as blocked. As already mentioned, the shift register 446 stores eight energy values and displaces each active power group clock interval in new energy values using the FIFO data storage strategy. In an exemplary embodiment, the energy adder 438 adds the energy values stored in eight of the most recent active power groups and provides a measurement of the total energy. In one implementation, the energy adder 438 ponders the contribution of each register stage of the shift detector of the blocking detector and provides the resulting accumulated energy signal 440 to the blocking comparator 418 and the combination comparator 420. Another implementation of the 438 adder the contribution of the energy of each power group can vary depending on the relative length of the 446 time shift recorder that has been maintaining the P1632 / 97MX power group power. The variation of the contribution of energy as a function of time is known as stabilization or aging. Typically, a filter element that has received a new power group represents the state of current signal strength more accurately than any other filter element. For example, the weighting element of the energy 402 'associated with the recording stage 402 may be set so that the recording stage 402 contributes a greater percentage to the sum of the energy than the subsequent recording stages 404-416. The weighting elements of the power 404 '- 416' can be set so that the register stages 404 -416 contribute with less energy value, in proportion to the recording stage 402, with the adder 438. The various combinations of the energy weighting elements 402 '- 416 'can be used to fine-tune a filter if the number of filter elements increases or if in general greater control of signal detection is needed. In addition, the filter function can be performed using a IIR filter (infinite impulse response) as is well known in the art. In any of the above implementations, a hysteresis of the threshold levels is compared with the summed energy as provided by the 438 adder.

P1632 / 97MX to determine whether a lock indication or combination indication signal should be made. A hysteresis of the energy levels reduces fluctuations in the blocking indication due to the transient fluctuations in the energy received by a demodulation element. For example, when the accumulated energy signal 440 meets or exceeds the value of the blocking threshold signal 434, the blocking indication 422 is provided. Once the blocking indication signal 422 is provided, a subsequent decrease in the value of the accumulated energy signal 440 must be below the non-blocking threshold level 436 to disable the blocking indication signal 422. When the accumulated energy signal 440 falls below the non-blocking threshold signal 436, the intensity The signal is no longer considered sufficient for communication and the lock indication signal 422 will no longer be provided. The actual blocking indication levels can be calibrated according to the empirical data collected over a period of time. A similar hysteresis of the threshold levels can be compared to the accumulated energy signal 440 to determine when a diversity of combination indication signal 442 should be made. For example, when the accumulated energy signal 440 meets or exceeds the signal of threshold 442, the indication of P1632 / 97MX combination 424. The combination indication signal 424 is evidence that the current signal residing in a particular demodulation element can be combined with other multipath versions of the same signal provided by other demodulation elements for improve overall signal-to-noise ratios (SNR). The accumulated energy signal 440 must subsequently fall below a non-combination threshold level 444 before the combination indication signal 424 is no longer provided. In an exemplary embodiment, the combination threshold signal 442 is greater than the No combination threshold. The signal 444, when the accumulated energy signal 440 falls below the second combination threshold, the signal strength is no longer considered sufficient for the various multipath combining techniques and the combination indication signal is no longer provided 424 The actual combination indication levels can be calibrated according to the empirical data collected over a period of time. A prior description of the preferred embodiments is provided to enable any person skilled in the art to make use of the present invention. The various modifications to these modalities will be readily apparent to those skilled in the art and the generic principles defined therein can be P1632 / 97MX apply to other modalities without the use of the faculty of inventiveness. In this manner, the present invention is not intended to be limited to the embodiments shown herein but will be in accordance with the broader scope consistent with the principles and novel features described herein.

P1632 / 97MX

Claims (21)

1. NOVELTY OF THE INVENTION Having described the present invention, it is considered as a novelty and, therefore, what is claimed as property is contained in the following CLAIMS Z 1. A method for determining a signal strength of a signal entering a system variable rate data receiver, wherein the incoming signal is compared to a series of frames, each frame has a corresponding unknown data rate, each frame consists of a plurality of data segments where the number of data segments which contains data in each frame depends on the corresponding unknown data rate, the corresponding unknown data rate may correspond to at least one higher data rate and a lower data rate, the method comprises the steps of: receiving a first value of energy that corresponds to the first of the data segments; and adding the first energy value with a previously accumulated total if the first of the data segments corresponds to a data segment containing data at the lower data rate, to produce a calculation of the signal strength.
2. 2. The method of claim 1, wherein P1632 / 97MX each of the plurality of data segments is compared to a series of chips, further comprising the steps of: receiving a series of energy values corresponding to a plurality of chips within the first of the data segments; add the series of energy values corresponding to the plurality of chips to produce the first energy value.
3. The method of claim 1, wherein the adding step further comprises the steps of: storing the first energy value in a first storage logger, wherein the first storage logger is one of a plurality of storage loggers each one storing a value corresponding to a previously stored energy value; removing a previous value stored in the plurality of storage registers; and adding together each of the previously stored energy values and the first energy value to produce the calculation of the intensity of the signal.
4. The method of claim 1, wherein the adding step further comprises the steps of: storing the first energy value in a first P1632 / 97MX storage recorder, wherein the first storage register is one of a plurality of storage registers, each storing a value corresponding to a previously stored energy value; scaling each of the previously stored energy values according to a scaling constant associated with each of the plurality of storage registers; and adding together each of the previously stored and scaled energy values and the first energy value to produce the calculation of the intensity of the signal.
5. The method of claim 1, wherein the first energy value is received from an assigned demodulation element for a single propagation of the incoming signal and wherein the calculation of the signal strength is compared to a threshold for determine if the demodulation element is blocked in this single propagation.
6. The method of claim 1, wherein the first energy value is received from one of a plurality of demodulation elements, each assigned to a single propagation of the incoming signal, further comprising the steps of: P1632 / 97M /. compare the calculation of the intensity of the signal with a combination threshold signal; and enabling the combination based on a result of the comparison step, of an output data signal from one of the plurality of demodulation elements with an output data signal corresponding to one second of the plurality of demodulation elements, the combination producing a resulting aggregate signal.
7. 7. The method of claim 1, where the data segments containing data are placed pseudo-randomly within each of the tables further comprises the step of determining an active series of data segments corresponding to a first frame based on an identity of a unit that transmits the incoming signal, where the active series of data segments corresponds to the data segments that contain the data if the signal that enters is at the lowest speed.
8. The method of claim 1, wherein the data segments containing data are placed pseudo-randomly within each of the frames, further comprising the step of determining an active series of data of data segments corresponding to a first frame based on a time of day, where the active series of data segments corresponds to the data segments that contain data if the signal that is input is to the P1632 / 97MX lowest speed.
9. The method of claim 1, wherein the unknown data rate may correspond to an intermediate data rate, wherein the data segments containing data are placed pseudo-randomly within each of the frames, and where within a given frame the data segments containing data at the lowest speed are placed as a subset of data segments containing data at the intermediate speed and the data segments containing data at the intermediate speed are placed as a subset of data segments that contain data at a higher speed.
10. The method of claim 1, wherein the adding step comprises the steps of: storing the first energy value in a first energy storage recorder, wherein the first energy register is one of a series of energy registers. first-entry-first-out (FIFO) storage so that each previously stored value is in transition by means of a storage recorder and an older value of those stored is removed from a final storage register; and add together a value stored in each P1632 / 97MX from the PEPS storage logger series.
11. The method of claim 10, wherein the first energy value is received from a demodulation element assigned to a single propagation of the incoming signal and wherein the calculation of the signal strength is compared to a threshold for determining whether the demodulation element is blocked in the single propagation of the incoming signal, further comprising the step of initializing the series of storage registers PEPS when the demodulation element is assigned to a new propagation of the incoming signal.
12. The method of claim 11, wherein the step of initializing the series of storage registers PEPS comprises the step of storing in the series of storage registers PEPS a series of values corresponding to the blocked condition.
13. The method of claim 11, wherein the step of initializing the series of storage registers PEPS comprises the step of storing in the series of storage registers PEPS a series of values corresponding to an unblocked state.
14. The method of claim 1, further comprising the steps of: comparing the calculation of signal strength with a first threshold level; P1632 / 97MX indicate a sufficiency condition if the calculation of the signal strength exceeds the first threshold level; compare the calculation of signal strength with a second lower threshold level after the indication of sufficiency status; and remove the sufficiency state if the calculation of the signal strength is lower than the second lower threshold level.
15. The method of claim 14, wherein the first energy value is removed from a demodulation element assigned to a single propagation of the input signal and wherein the demodulation element comprises the time tracking function further comprising the step of disabling the temporary tracking function by removing the sufficiency status.
16. The method of claim 14, wherein the first energy value is received from a demodulation element assigned to a single propagation of the incoming signal and wherein the elimination of the sufficiency state indicates that the demodulation element is available for the assignment to a different propagation of the incoming signal.
17. 17. An apparatus that provides a calculation for signal strength comprising: P1632 / 97HX a demodulation element having an output that produces a series of symbol energies corresponding to a data signal of an unknown data rate; a sum register having an input coupled to the output of the demodulation element, having an input enabled and having an output which produces a sum of a plurality of the symbol energies series conditioned with a signal received by the input enabled; an active group clock having an output coupled to the enabled input of the sum register, the output produces an indication of a group of the symbol power series corresponding to the symbols containing the data independent of the unknown data rate of the data signal; a first first-in-first storage logger having an input coupled to the sum register output and having a plurality of outputs each producing an indication of a previous value of the sum to the sum register output; and an adder having a plurality of outputs coupled to each of the plurality of outputs of the first input storage register. P1632 / 97MX first output and that it has an output that produces indication of signal strength.
18. 18. A means for determining a signal strength of a signal entering a variable rate data receiver system, where the incoming signal is compared with a series of frames, each frame having a corresponding unknown data rate, each The table comprises a plurality of data segments in which the number of data segments containing the data in each frame depends on the corresponding unknown data rate, the corresponding unknown data rate may correspond to at least one higher data rate and a lower data rate, the method comprises the steps of: the medium that receives a first energy value that corresponds to a first of the data segments; and the means for adding the first energy value to the previously accumulated total if the first of the data segments corresponds to a data segment containing data at the lowest data rate to produce a calculation of the signal strength.
19. 19. The means for determining a signal strength of claim 18, wherein each of the plurality of data segments is compared to a series of chips, further comprising the steps of: P1632 / 97MX means for receiving a series of energy values corresponding to a plurality of chips within the first of the data segments; and the means for adding the series of energy values corresponding to the plurality of chips to produce the first energy value. The method for determining a signal strength of claim 18, wherein the adding step further comprises the steps of: the means for storing the first energy value in a first storage recorder wherein the first storage logger is one of a plurality of storage registers each storing a value corresponding to a previously stored energy value; the means for removing an older stored value stored in the plurality of storage registers; and the means for adding together each of the previously stored energy values and the first energy value to produce the calculation of the intensity of the signal. The means for determining a signal strength of claim 18, wherein the adding step further comprises the steps of: P1632 / 97MX means for storing the first energy value in a first storage recorder wherein the first storage register is one of a plurality of storage registers each storing a value corresponding to a previously stored energy value; means for scaling each of the previously stored energy values according to a scaling constant associated with each of the plurality of storage registers; and the means for adding together each of the previously stored and scaled energy values and the first energy value to produce the calculation of the intensity of the signal. P1632 / 97MX