MXPA97002594A - Distributed handling apparatus for an ip block - Google Patents

Abstract

The present invention relates to in a distributed handling apparatus for a battery block, a battery monitoring module for each individual battery comprises a microcomputer and an apparatus for bi-directional communication with a central control. Each microcomputer is provided with a memory and its own control program, which allows sophisticated data collection, communication and switch control functions to be performed by each battery monitoring module independently of the central control, even when It is still under your orders, for an efficient and more flexible control design and a capable system operation. In a preferred embodiment, each battery monitoring module may further comprise voltage and temperature measurement circuits with inputs to the microcomputer and a switch circuit incorporating the microcomputer itself. All battery monitoring modules are linked to the interconnection module by a minimum element, the common digital communication circuit for bi-directional communication between each of the stack monitoring modules and the central control. Each stack monitoring module may alternatively provide switch activation, as ordered by the central control, in a stopwatch mode, in which the switch path is activated for an ordered time, or a voltage mode, in the which the switch path is activated when the battery voltage is equal to an order value

Description

DIVIDED HANDLING APPARATUS FOR A BATTERY BLOCK Field of the Invention This invention relates to the handling of battery blocks.

The high voltage dry cell blocks comprise a plurality of lower voltage cells connected in series. The operation of such dry cell blocks is more efficient, and the possibility of cell degradation is smaller, when the state of charge of all individual cells is maintained in a balanced condition. During the charging of the dry cell block, for example, individual batteries can reach their maximum charging state at different times. Stopping the charge of the dry cell block when the first battery reaches its maximum load will leave other batteries, and therefore the dry cell block, less than optimally charged; while the continuous charging of the dry cell block to achieve a maximum charge in all the batteries can cause overcharging and degradation of the first batteries to reach the maximum load.

The prior art recognizes that efficient charge handling of dry cell blocks requires at least some degree of control over the charging of individual batteries within the block. One form of such control provides a bypass circuit for each of the individual stacks that activates a current deflection path when the stack voltage equals a predetermined maximum value in order to avoid overcharging. In these circuits, however, each deviation circuit acts independently of the others; and coordinated general dry cell block loading strategies are impossible. Another form of such control provides a central control module, which may include a microcomputer, with inputs from the individual cell voltage measurement circuits and outputs controlling the individual battery bypass circuits. Central control, perhaps with inputs from additional sensors, can be programmed to control circuit breaker circuits in a more sophisticated coordinated strategy. However, most of the sophistication and intelligence of such systems is concentrated in the central control, with the switch and voltage perception circuits of individual batteries being merely extensions of central control. Even when intelligent, such a system requires an expensive controller which is programmed to handle every detail of the operation of each component of the system.

Synthesis of the Invention This invention is a distributed handling apparatus for a dry cell block in which a battery monitoring module for each individual cell comprises a microcomputer and an apparatus for bi-directional communication with a central control. Each microcomputer is provided with memory and its own control program, which allows sophisticated data collection, communication and switch control functions to be carried out by each battery monitoring module independently of the central control, even when still under your orders, for a more efficient control design and a more flexible and capable system operation. In a preferred embodiment, each stack monitoring module can further comprise the temperature and voltage measurement circuits with inputs to the microcomputer and a switch circuit incorporating the microcomputer itself. All battery monitoring modules are linked to an interconnection module by means of a minimum element, a common digital communication circuit for bi-directional communication between each of the stack monitoring modules and the central control. Each battery monitoring module can provide switch activation, as ordered by the central control, in a stopwatch mode in which the switch path is activated for an ordered time, or a voltage mode in which the path bypass is activated when the battery voltage equals an ordered value.

Brief Description of the Drawings Figure 1 shows a block of dry cells with a dry cell block handling apparatus according to the invention.

Fig. 2 is a circuit diagram of a battery monitoring module for use in the dry cell block of Fig. 1.

Figure 3 is a circuit diagram of an interconnection module for communicating with and controlling one of the battery monitoring modules in the dry cell block of Figure 1.

Figure 4 is a flow chart illustrating the operation of an interconnect module for use with the dry cell block of Figure 1.

Figures 5 and 6 are flow charts illustrating the operation of a battery monitoring module for use in the dry cell block of Figure 1.

Figure 7 is a table illustrating the communications between an interconnect module and one or more stack monitoring modules in the dry cell block of Figure 1.

Description of the preferred modality Referring to Figure 1, a dry cell block 10 comprises a plurality of stacks 11 connected in series. A battery monitoring module 12 is connected through each cell 11. Furthermore, an interconnection module 13, activated by a separate DC power supply represented by the cell 14 has a pair of terminals connected to the two lines of a bar Common data bus 15, and each stack monitoring module 12 has a pair of terminals also connected to the data bus 15 for bi-directional communication with the interconnect module 13. The Interconnect module 13 may comprise the control for the stack monitoring modules 12 or this may serve as an interconnection between the stack monitoring modules 12 and a separate central control, not shown. In the latter case, the interconnection module 13 may have separate means for communication with an external apparatus such as a control and / or an exhibit, as symbolized by the terminals 17 and 18. The interconnection control 13 is provided with a separate electric DC power supply 14.

Each of the stack monitoring modules 12 is provided with an electronic circuit, including a microcomputer, to monitor the voltage and temperature of its associated stack 11, processing the perceived values as required, communicating this information, when ordered, to the interconnection module 13. In addition, each of the stack monitoring modules 12 is provided with an effective switch circuit, when ordered by the interconnection module 13, to allow a voltage balancing of a current flow controlled stack. from the positive terminal of the associated stack 11 externally to the negative terminal thereof. The interconnect module 13 includes a microcomputer to provide general system control: interrogating the stack monitoring modules 12 to monitor the voltages and temperatures of the individual stacks 11 and order the individual stack monitoring modules 12 to activate or deactivate its circuit breaker circuits.

Figure 2 shows a typical battery monitoring module 12. The + PILES and - PILES terminals are connected to the negative terminals of an associated battery 11. The PILA terminal provides a ground reference for the module 12, while the terminal + PILA provides a DC voltage signal to the module 12 which is equal to the voltage of the associated cell 11. A power supply circuit 20 in the module 12 is connected by an input terminal 21 and a ground terminal 22 through of the terminals + PILA and - PILA; in the output terminal 23 of a power supply circuit 20, together with a ground terminal 22 provides a regulated DC voltage VDD, typically 5 volts, for the internal operation of the module 12. The filter capacitor 24 (lμFD) , connected to the transverse terminals 21 and 22, and the filter capacitor 25 (lμFD), connected to the transverse terminals 23 and 22, helps the power supply circuit 20 achieve its voltage regulation function.

The resistors connected in series 30 (36.1K, 0.1%) and 31 (12.1K, 0.1%) connected from the terminal + PILA to the ground module (- PILA) form a voltage divider connected effectively through the associated battery 11. The gasket 32 of the resistors 30 and 31 provides a voltage proportional to the voltage of the associated cell 11. A microcomputer 35 has an analog input terminal ANO connected to the gasket 32; and the constant proportionality of the voltage divider keeps the output thereof within a suitable range for input to the microcomputer 35. The analog input terminal ANO is one of several such analog input terminals controlled by computer programs to receive an analog input. input signal analogous to the microcomputer 35 and provide it to an internal A / D converter. Thus, the microcomputer 35 is capable of monitoring the voltage of the associated cell 11. The microcomputer 35 also includes registers and RAM (random access memory) on board to store sampled voltage values and ROM (read only memory) to store a program to control the sampling and storage process, as well as others. The microcomputer 35 is activated by the voltage VDD provided through the terminals VDD and GND and is effective to generate pulses of internal clock timing with the help of an external ceramic resonator (OSC) 36 communicating through the terminals 0SC1 and 0SC2 .

A pair of resistors 40 (47.5K) and 41 form a voltage divider through a zener diode 42 (4. IV). Resistor 41 is a negative temperature coefficient (NTC) resistor having a resistance which varies downward with the temperature increasing from a maximum of 100K. The board 43 of the resistors 40 and 41 is connected to an analog input terminal AN2 of the microcomputer 35; and the other NTC terminal of the resistor 41, as well as the anode of the zener diode 42 are connected to the module to ground. The gasket 44 of the resistor 40 and the cathode of the zener diode 42 is connected to the analog input terminal AN3 of the microcomputer 35 and is further connected through a resistor 45 (5.1K) to a digital terminal RB3 of the microcomputer 35. The digital terminal RB3 is one of several similarly tagged digital output terminals which are capable of being effectively switched by the microprocessor 35 under the control of the computer program between a first high voltage state in which the terminal is internally connected through from the VDD terminal to the VDD voltage and a second low voltage state in which the terminal is internally connected through the GND terminal to the ground module.

The NTC resistor 41 can be mounted on the circuit board of the battery monitoring module 12 or it can be packed with the battery 11 and connected by electric lead wires or other connectors to terminals on the circuit board of the module 12. Many such Alternate designs are known to those skilled in the art to maximize the sensitivity of the NTC 41 resistor to the temperature of the associated stack 11. With a suitable design, the resistance of the NTC resistor 41 will vary with this temperature. The temperature can therefore be sampled, under the control of the microcomputer 35, by activating the digital terminal RB3 thereof to its high state, such as to apply the voltage VDD through the microcomputer 35 and from the digital terminal 35 through of resistors 45.40 and 41 in series to ground. The zener diode 42 sets the voltage across the resistors 40 and 41 to its rated voltage, which appears in the seal 44 and can be monitored in the analog input AN3. The voltage on the seal 43 therefore varies with the temperature of the stack 11 and can be sampled by the analog input AN2 when the voltage on the digital output terminal RB3 is high. The voltage on the RB3 terminal can be switched low to reduce the current when the temperature is not being sampled. The temperature can be calculated from the voltages in the analog inputs AN2 and AN3 according to the internally stored program based on the principles well known in the art.

The switch circuit is provided by the microcomputer 35 with a pair of light emitting diodes (LEDs) 50 and 51 and resistors 52 and 53 of 200 ohm. The combination of LED series 50 and resistor 52 is connected in parallel with the combination of LED series 51 and resistor 53 between voltage VDD and a plurality of digital terminals - RB4, RB5, RB6 and RB7 - of the microcomputer 35 When the digital terminals RB4-RB7 are switched to their low state, they are connected internally through the microcomputer 35 to the GNE terminal; and the switch circuit is thus activated to bypass the current around the associated stack 11 through a current path of the switch from the + BATTERY terminal through the power supply flake 20 (VDD output), of the resistors 52 and 53, LEDs 50 and 51, and the microcomputer 35 to the ground module and the terminal - PILA. When the digital terminals RB4-RB7 are switched to their high states, the switch circuit is deactivated and there is no switch current path.

The microcomputer 35 has a pair of digital terminals RBOINT and RBl connected for a digital communication with the communication busbar 15 through a pair of opto-couplers 60 and 65, which electrically insulate the battery monitoring module 12 from the bus bar 15 and therefore from the interconnection module 13. The opto-coupler 60 includes a light-emitting diode (LED) 61 in optical communication with an NPN phototransistor 62. The collector of the phototransistor 62 is connected through a resistor 63 (10K) to the voltage VDD to form a voltage divider, the board 64 which is connected to the digital terminal RBOINT of the microcomputer 35. The emitter of the photo-transistor 62 is connected to the module to ground. The LED cathode 61 is connected to a communication terminal DATA1, of surveillance module, which is connected to a line of the communication bus 15; and the LED anode 61 is connected through a current limiting resistor 68 (1K) to a similar terminal DATA2 which is connected to the other line of the communication bus 15. The opto-coupler 65 includes a transmitting diode of light (LED) 66 in optical communication with an NPN phototransistor 67. The phototransistor 67 of the opto-coupler 65 has an emitter connected to the terminal DATA2 and a collector connected to the terminal DATA1. The LED 66 has an anode connected through a current limiting resistor 69 to the voltage VDD and a cathode connected to the digital terminal RB1 of the microcomputer 35.

Figure 3 shows the interconnection module 13. The DC current of the source 14 is provided between a current terminal VCC and ground. The VCC current terminal is connected through a resistor 70 to a terminal DATA1 of the interconnection module 13 and to the collector of an NPN transistor 71 having an earthed transmitter. A microcomputer 85 has a digital output terminal DATA OUT connected through an inverter 72 and the resistor 73 to the base of the transistor 71 and a digital input terminal DATA IN connected to the terminal DATA1 of the interconnection module 13 and therefore to the transistor collector 71. The power terminal VCC is also connected to the collector of an NPN transistor 75 having an emitter connected to the emitter of the PNP transistor of the ground connector 76. The microcomputer 85 has a digital output terminal DATA DIRECTION connected through an inverter 77 and a resistor 78 to the base of the transistor 75 and further connected through the inverter 77 and a resistor 81 to the base of the transistor 76. A diode 79 is connected from the output of the inverter 77 to the base of the transistor 75, in parallel with the resistor 78; and a diode 80 is connected from the base of the transistor 76 to the output of the inverter 77, in parallel with the resistor 81. The emitters of the transistors 75 and 76 are connected to each other and to a terminal DATA2. The terminals DATA1 and DATA2 of the interconnection module 13 are connected by the lines of the communication bus 15 to the similarly named terminals DATA1 and DATA2, respectively, of each stack monitoring module 12.

The microcomputer 85 may further have external communication ports such as EXCOM1 and EXCOM2 connected to terminals 17 and 18, respectively, for communication to an external apparatus such as a control or display, so that the interconnection module 13 can serve as an interconnection between the external device and the stack monitoring modules 12.

Bi-directional digital communication between the interconnect module 13 and each stack monitoring module 12 is provided by the apparatus described in Figure 1-3. To provide a message to one or more battery monitoring modules 12, a microcomputer 85 of the interconnection module 13 enters the transmit mode by sending the voltage over a low DATA DIRECTION output terminal, which causes a high voltage. is provided from the inverter 77 to the bases of the transistors 75 and 76. This turns on the transistor 75 and turns off the transistor 76 to provide a high voltage on the terminal DATA2 and therefore, through the line DATA2 / DATA2 of the bar communication bus 15, on the terminal DATA2 and the LED anode 61 in each battery monitoring module 12. Therefore, LED 61 in each battery monitoring module 12 is connected to be controlled by transistor 71 of the interconnection module 13 through the line DATA1 / DATA1 of the bus bar 15. When the transistor 71 is turned on through a low DATA OUT output of the microcomputer 85, the DATA1 terminal is sent low and LED 61 of each battery monitoring module 12 leads to provide light to the phototransistor 62 and therefore decrease its resistance. Since the phototransistor 62 forms a voltage divider with the resistor 63 through the voltage VDD, this provides a low voltage over the digital terminal RBOINT of the microcomputer 35 in each stack monitoring module 12. However, when the DATA output The high output of the microcomputer 85 turns off the transistor 71, the DATA1 terminal is turned high and the LED 61 stops driving. Since no light is generated, the resistance of the phototransistor 62 increases to provide a high input on the RBOINT digital terminal. Therefore, the microcomputer 85 of the interconnection module 13 provides digital messages to the stack monitoring modules 12 in the transmit mode to sustain the low DATA DIRECTION output and switch DATA OUT between high and low in a predetermined code. In the transmit mode, the microcomputer 85 ignores the voltage on the DATA IN input terminal.

To receive a return communication from a stack monitoring module 12 after ordering a response, the interconnect module enters the receive mode by providing a high DATA DIRECTION output from the microcomputer 85; and this causes the inverter 77 to provide a low voltage to the bases of the transistors 75 and 76. This turns off the transistor 75 and turns on the transistor 76 to the ground terminal DATA2 and therefore, through the DATA line DATA2 / DATA2. the communication bus bar 15, of the emitter of the phototransistor 67 in each stack monitoring module 12. The microcomputer 85 also provides a high DATA OUT voltage to turn off the transistor 71; and the phototransistor 77 of each stack monitoring module 12 is therefore connected in series via the line DATA1 / DATA1 of the communication bus 15 with the resistor 70 of the interconnection module 13 to form a voltage divider with the same through the supply voltage VCC, with the terminal DATA1 of the interconnection module 13 providing a mid-point output of the voltage divider which is connected to an input to the digital terminal DATA IN of the microcomputer 85. When switching the microcomputer 35 of a battery monitoring module 12 driving through LED 66 on and off, this therefore causes the corresponding switching of the DATA IN terminal of the microcomputer 85 between the high and low voltages according to the predetermined code.

The operation of the interconnection module 13 will now be described with reference to the flow scheme of Fig. 4. With the initial awakening, the microcomputer 85 of the interconnection module 13 first runs the INITIALIZE subroutine 102, in which the internal registers, the Internal ports and exit ports are set and other internal tasks are carried out. The details of these depend on the particular microcomputer used and will not be further described at this point.

The microcomputer 85 then runs a subroutine IDENTIFYING BATTERY MONITORING MODULES 104 where the interconnection module 13 identifies all the stack monitoring modules 12 connected to it on the data busbar. In this subroutine, the microcomputer 85 sends an objectified initialization question for each of the possible two directions of bite from OOOlh to FFFFh, with a short wait for answer between the consecutive questions. Each stack monitoring module 12 answers this question sent to its address by sending its return address on the communication bus 15; and the microcomputer 85 stores each such address in the memory when it is received.

Once the stack monitoring modules have been identified by the interconnection module 13, the microcomputer 85 can put its main circuit, during which it executes the subroutine FREEZE DATA ORDER 106. In this subroutine, it sends an order to freeze data which does not have as its objective any specific of the battery monitoring modules 12 but which has a general address OOOOh which is answered by all those modules connected to the communication bus 15. The purpose of this order is to make all the stack monitoring modules 12 simultaneously set aside the values recorded at the last voltage and temperature of the associated stacks 11, together with any derivative parameters thereof, and store the recorded data until an order to send is received the data to the interconnection module 13. In this manner, the interconnection module 13 can receive a "snapshot "of all the batteries 11 in the dry cell block 10 in a single moment in time.

Then, the microcomputer 85 of the interconnection module 13 runs the SEND DATA ORDER subroutine 108, in which each stack monitoring module 12 for which an address is stored is issued one or more orders to send the stored data to the module of interconnection 13. A number of different orders are possible, depending on what data is required by the PILOT MONITOR programs of the interconnection module. In a basic apparatus, each stack monitoring module 12 will be instructed to send the voltage (VLG) and temperature (TMP) values for the corresponding stack 11. In other systems, the BATTERY MONITOR programs may require one or more of the following derivative parameters of the basic voltage or temperature values: the measured voltage (VLO) or temperature (TLO) lower, the voltage (VHI) or temperature (THI) measured higher, the measured voltage lower to which occurred TLO (VTL) or the highest measured temperature at which VHI (TVH) occurred. In addition, the microcomputer 85 may have the additional ability to order one or more of these "higher" or "lower" derivative parameters to be put back into any particular stack monitoring module 12. The additional data required from a module of Battery monitoring that responds may include the status of your switch circuit (STA). The amount of time (TMR) remaining for your circuit breaker to be activated, or your computer program and device version numbers. After any of these commands requiring sending data, the microcomputer 85 in the interconnection module 13 expects to receive the data before proceeding with the next command for this or the next stack monitoring module 12.

When all the required data has been ordered and received, the microcomputer 85 runs the ROUTINE SYSTEM 110 which uses this data to determine the need to balance the stack and select the stack monitoring modules 12 and the operating mode for the activation of interruption circuits. These routines are not the subject of this patent application and therefore will not be described in detail.

Then, the microcomputer 85 in the interconnection module 13 runs the subroutine SWITCH ORDER 112, in which the selected stack monitoring modules 12 are sent orders in relation to the activation of their switch circuits. Each stack monitoring module 12 is programmed for two different switch control modes; and the interconnection module 13 commands each module 12 to use, gives the module 12 a relevant control parameter, and then allows the module 12 to proceed under its own local control. A first switch control mode is based on time: the microcomputer 85 instructs a battery monitoring module to activate its switch circuit for a specified period of time, which can be expressed as a specified number of time periods on average hour up to a total of 24 hours. A second switch control mode is based on the battery voltage: the microcomputer 85 instructs a battery monitoring module 12 to activate its switch circuit when the voltage of its corresponding battery 11 exceeds a specified voltage. In any case, the battery monitoring module proceeds to carry out the control method ordered under its own control by chronizing and counting the specified number of time periods in the first mode or by monitoring the battery voltage in the second mode.

The operation of the battery monitoring module 12 will now be described with reference to the flow scheme of the BATTERY MONITOR program in Figure 5 and the circuit diagram of Figure 2. The microcomputer 35 of the battery monitoring module 12 has a low power sleep mode and responds to a low voltage input of a predetermined duration over the RBOINT port to wake up and become fully active. Therefore, the activity on the bus bar 15 causes the microcomputer 35 to wake up from its sleep mode and perform any wake-up duties required in the AWAKEN 120 subroutine before advancing to the main circuit of its program.

In this main circuit, the BATTERY MONITOR program first checks, at decision point 121, to see if the circuit breaker is activated in the timer control mode and a switch timer has not been turned off. The switch timer is a computer program timer which can be set to a predetermined TMR number of time periods, such as half an hour. When it contains a non-zero number, it is decreased at the appropriate times by a chronometer switch routine triggered by a real-time clock on the microcomputer 35. Immediately upon awakening, the switch circuit is in a deactivated state and the switch timer is set at the end of the delay interval (TMR = 0). Therefore, the program then determines, at decision point 128, whether the arrival at the end of the delay interval has occurred, as will be more fully explained at a later point in this description. Immediately after awakening, the answer will be no. The program then continues to determine at decision point 122 if there is new activity in bus bar 15.

Immediately after the awakening, the answer is yes, since there was new activity on the omnibus bar 15 that caused the awakening. Therefore, the program immediately determines, at decision point 123, whether the activity on the bus bar 15 comprises a valid message to which it must be answered. Each of the stack monitoring modules 12 responds to any of two addresses: its unique home address and the OOOOh address, to which all the stack monitoring modules 12 respond. If the address is any of these, the battery monitoring module 12 carries out the command included in the message in the take command COMB. 124 subroutine.

A sample of the typical messages and commands is shown in the table of figure 7 to illustrate the capabilities of the apparatus. The messages 0, 3 and 14 are general messages sent to the stack monitoring modules 12. Therefore the first two bits of the data sequence of these messages, IDL and IDH, provide the general address OOOOh. The third and fourth bits of the data sequence of these messages each provide the message number. All other messages are directed to a specific stack monitoring module; and the address is provided in the first two bits of the data stream, the first low byte (IDL). The third bite of these other messages gives the message number; and the fourth bite provides a check sum of CK1 to help determine the validity of the message. In messages 52-255, the third bite message number also carries data to the stack monitoring module, as will be explained in more detail below. All messages except 0, 3 and 14 require a message in response from the directed stack monitoring module. If the data is requested, the first two bits of the response comprise the requested data; and if no data is requested, the first two bits of the response comprise the address of the stack monitoring module as a confirmation. The third bite of the answer is a check sum CK2.

The message 0 (FREEZE DATA COMMAND) causes all the stack monitoring modules to set aside their measured voltage and temperature values to the latter for a subsequent transmission to the interconnection module 13. This ensures that the interconnection module 13 will receive a "snapshot" of the data from all the battery monitoring modules taken at essentially the same time, even when the data is communicated to the interconnection module 13 from a stack monitoring module at one time.

Message 1 (Initialization Question of Objectives) causes the stack monitoring module on the busbar having the indicated address to respond by returning its address to the interconnection module 13. In this way the interconnection module 13 identifies the stack monitoring module as being on the bus bar.

Message 2 (General Initialization Question) causes any battery monitoring module that has not been recognized by the interconnect module 13 to return to its address. This response is controlled by a "Recognized" flag in the stack monitoring module computer program that is set when the stack monitoring module is specifically directed by the interconnection module 13 and which subsequently prevents an answer to the question of general initialization until it is reset. Message 3 (return to the "Recognized" flag) causes each battery monitoring module on the busbar to replace its "Recognized" flag.

Message 4 (Module Version Question) causes the directed stack monitoring module to return its SFW computer program version number, followed by its HDW device version number. This allows the interconnection module 13 to be reprogrammed to work with the stack monitoring modules having different configurations of computer programs and apparatuses on the same busbar.

Message 5 (VLG Request, TMP) causes the directed stack monitoring module to return to the frozen voltage value VLG, which is represented on a scale of 0-255, and a temperature value TMP, which is the temperature measured in Celsius plus 40.

Message 6 (Request for VLO, VHI) causes the directed stack monitoring module to return the stored values of the lowest (VLO) and highest (VHI) voltages it has recorded. As will be explained below, each battery monitoring module can measure voltage and temperature at different times when specifically asked for such data; and it is therefore programmed to store the highest and lowest values recorded, in case this is required by the interconnection module 13.

Message 7 (Request for TLO, THI) similarly causes the directed stack monitoring module to return the stored values of the lowest (TLO) and highest (THI) temperature recorded.

Message 10 (Request for VTL, TVH) causes the directed stack monitoring module to return the stored values of the lowest measured voltage (VTL) at which a TLO occurs and the highest measured temperature (TVH) at which a VHI.

Message 8 (return to VLO, VHI), the message 9 (return to TLO, THI) and message 11 (return to VTH, TVH) each have the battery monitoring module clean the named parameters and then return your address for confirmation.

Message 12 (Request for STA, TMR) causes the directed battery monitoring module to return two bits indicating the status of the circuit breaker. The first bite is zero if the circuit breaker is deactivated and 1 if activated. The second indicates the number of half-hour periods of the remaining time switch. If the second bite is zero and the first is one, the switch circuit in voltage mode, with the measured battery voltage greater than that transmitted in the most recent switch voltage command.

Message 13 (Blink) causes the directed battery monitoring module to activate its circuit breaker for approximately one second if it is not already activated.

Message 14 (Clean Switch Command) causes the stack monitoring modules on the bus bar to deactivate their switch circuits.

Each of the messages 52-99 (Command of Switch Stopwatch) causes the directed battery monitoring module to activate its switch circuit in stopwatch mode for a specified number of half-hour periods up to 24-hour periods with the specified number of half-hour periods equal to the number of message minus 51.

For this purpose, in the COMMAND COMMAND subroutine, a new message 52-99 causes the stack monitoring module to return its TMR switch stopwatch value to the new specified number before returning its own address as confirmation. In addition, the stored value of BCV is set to 100 to terminate any existing voltage control mode as described below. With a non-zero value of TMR and a BCV value of 100, the stack monitoring module is in a timer control mode for switch activation; and the TMR value indicates the activation time of the remaining switch.

Each of the messages 100-255, switch voltage command, causes the battery monitoring module to run between the voltage mode of the circuit breaker control. Currently, this order doubles as a switch off command for a single stack monitoring monitor. When the third bite of this BCV command is equal to 100 the stored value of TMR is cleared to zero to end the stopwatch control mode; and the BCV value of 100 is stored to terminate the voltage control mode. However, when the new command value is equal 101-255 the newly stored fresh BCV is read as a reference voltage so that the battery monitoring module activates its switch circuit when the measured voltage of the associated battery 11 exceeds. at a voltage specified by the BCV value.

Returning to the flow chart of Figure 5, the program next reads the assembly and temperature of stack 11 in the READ DATA 125 subroutine after carrying out the command in subroutine 124. Similarly, it reads the voltage and temperature if a message was not received by this stack monitoring module, as determined at decision point 123, whenever there has been activity on the bus bar 15, as determined at decision point 122. The voltage of the Stack 11 can be read directly over a similar ANO input. The temperature is read by activating the temperature measurement circuit through the RB3 port and reading the voltages on the analog inputs AN2, which is the voltage drop across the NTC resistor 41. The microcomputer 35 can also read the voltage over the analog input AN3, which is a drop in the total voltage across the resistor voltage divider 40 / resistor 41 to be used in the scaling of the digital conversion process. Next, in the PROCESS DATA 126 subroutine, the microcomputer 35 processes the voltages read in the READ DATA 125 subroutine to determine and store the TMP temperature and battery VLG voltage values. The PROCESS DATA subroutine is shown in greater detail in Figure 6. The VLG voltage is derived by digitally converting the unprocessed voltage read over the analog input ANO to a representative value from 0-255, as indicated in step 140 from Figure 6. The TMP temperature was determined by digitally converting the unprocessed voltage read over the analog input AN2 to a digital value (using the voltage read on the analog input AN3 as an escalation factor) and to carry out a closure of tables on the digital value in step 141. At this time, these values are also processed to determine and store the other parameters derived from them. Referring to Figure 6, the new value of VLG is compared to VLO at decision point 142, and if it is smaller, it replaces VLO in step 143. Similarly, VLG is compared to VHI at decision point 144 and, if it is greater, it replaces VHI in step 145. If VLG replaces VHI, the new value of TMP is compared to TVH at decision point 146, and if it is greater, it replaces TVH in step 147. The new value of TMP is compared to THI at decision point 148, and if it is higher, it replaces THI in step 149. TMP is compared to TLO at decision point 150 and, if it is smaller, replaces TLO in step 151. If TMP replaces TLO, VLG is compared to VTL at decision point 152, and if it is smaller, it replaces VTL in step 153.

After the voltage and temperature data have been processed in the task 126 of Figure 5, the switch circuit is served in the SWITCH CONTROL 127 subroutine. In this subroutine, the microcomputer 35 verifies the TMR and BCV values for determining the state of the ordered switch and controlling the state of the switch circuit accordingly. With the TMR value of zero and a BCV value of 100, the microcomputer 35 deactivates the switch circuit. With a non-zero value of TMR and a BCV value of 100, the microcomputer 35 activates the circuit breaker if it is not already activated. With a value of zero of TMR and a BCV value of 101-255, the microcomputer 35 compares the voltage VLG of the battery 11 with the stored value BCV, activates the switch circuit if VLG is greater and otherwise deactivates the circuit of switch.

When the SWITCH CONTROL subroutine is completed, the program returns to decision point 121 and again verifies the value of the TMR switch timer. If the TMR value is non-zero, the program proceeds to decision point 122, as previously described. Therefore, as long as the circuit breaker is activated in the chronometer control mode, the program continues to the circuit. If the TMR value is zero at decision point 121, however, the program checks an activity timer at decision point 128. The activity timer is incremented regardless of whether it is programmed by a switch routine triggered by a real-time clock in the microcomputer 35. If the activity timer indicates that there has been activity on the bus 15 within a predetermined time period, such as 5 seconds, the program proceeds to determine, at the decision point 122, if there has been new activity on the bus bar 15. If there has been such activity, the activity timer is cleaned and the program follows the path already described, to determine if the activity includes a command to which the program must respond. If not, the program returns to decision point 121.

When the idle timer is found, in task 128, to have the end of the delay interval, the microcomputer 35 proceeds to sleep in task 129 after deactivating the switch circuit, if the latter is activated, and carry out such other tasks as required in preparation for sleep mode. It should be noted, however, that task 128 which leads to sleep mode is never entered while the value of TMR is non-zero. In other words, even if the switch circuit of the module 12 is activated in the stopwatch mode, the BATTERY MONITOR program will not allow the battery monitoring module to go to sleep, even if all the activity on the bus bar communication 15 stops until the stopwatch mode is finished. Once in the sleep mode, the microcomputer 35 remains in the sleep mode until it is awakened by the activity on the bus bar 15.

Claims (14)

R E I V I N D I C A C I O N S

1. A distributed handling apparatus for a battery block comprising a plurality of batteries connected in series, the apparatus comprises an interconnection module and a plurality of battery monitoring modules, one of the battery monitoring modules being associated with each of the batteries and connected there through the module terminals, each of the stack monitoring modules comprises, in combination: an energy conditioning circuit connected through the module terminals to provide a regulated operating voltage within the stack module; sensor means responding to a parameter of the associated stack to generate a stack parameter signal; an effective battery switch circuit, when activated, to bypass the load around the associated battery; a microcomputer powered by the regulated operating voltage, the microcomputer comprises a CPU, a memory, an input device for receiving the stack parameter signal, the output apparatus for providing the activation control of the battery breaker circuit and a stored program providing the microcomputer control for receiving and storing the signal of the battery parameter and the activation of the battery breaker circuit, each of the microcomputers are linked to the interconnection module and to the other microcomputers by means of a common digital communication circuit so that each microcomputer receives commands from the interconnection module and send data to it.

2. The distributed handling apparatus as claimed in clause 1 characterized in that the microcomputer further comprises a pair of switch terminals that can be connected inside and under the control of the microcomputer and the battery switch circuit comprises the microcomputer with the pair of switch terminals connected in series with a current limiting resistor and the module terminals to provide a battery switch current path through the microcomputer and resistance when the switch terminals are connected inside the microcomputer.

3. The distributed handling apparatus as claimed in clause 2, characterized in that the battery switch circuit comprises a current-activated LED through the current limiting resistor.

4. The distributed handling apparatus as claimed in clause 2 characterized in that one of the pair of switch terminals is connected to one of the module terminals and the other of the pair of switch terminals of the microcomputer is one of a plurality of the microcomputer terminals, all of which can be connected inside and under the control of the microcomputer to one of the switch terminals and are externally connected to the microcomputer in parallel with each other and in series with the current limiting resistor, to the plurality of microcomputer terminals being simultaneously connected to and disconnected from one of the switch terminals.

5. The distributed handling apparatus as claimed in clause 2 characterized in that the sensor means respond to the voltage of the associated cell and the microcomputer responds through the common digital communication circuit to a communicating voltage activation command signal for storing an ordered voltage portion of the voltage activation command signal in the memory and connecting and disconnecting the switch terminals within the microcomputer in a voltage control mode in response to the stored voltage portion stored and to the sensor means .

6. The distributed handling apparatus as claimed in clause 2 characterized in that the microcomputer further comprises a stopwatch and responds through the common digital communication circuit to a communicated chronized activation command signal to store an ordered time portion of the activation signal chronized in memory and connecting and disconnecting the switch terminals inside the microcomputer in a chronometer control mode in response to the stored time part stored and the stopwatch.

7. The distributed handling apparatus as claimed in clause 5 characterized in that the sensor means respond to the voltage of the associated cell and the microcomputer also responds through the common digital communication circuit to a communicating voltage command signal communicated for store a part of the ordered voltage of the activation command signal chronized in memory, to terminate an existing timer in the control mode, and connect and disconnect the switch terminals within the microcomputer in a voltage control mode in response to the ordered and stored voltage part and to the sensor means.

8. The distributed handling apparatus as claimed in clause 1 characterized in that the microcomputer further comprises a stopwatch and responds through the common digital communication circuit to a communicated timing command signal to store an ordered time portion of the activation signal chronized in memory and activating and deactivating the battery-breaker circuit in a chronometer control mode in response to the ordered and stored time part and the stopwatch.

9. The distributed handling apparatus as claimed in clause 7 characterized in that the microcomputer is provided with a sleep mode which is normally initiated when a communication on the common digital communication circuit has not been received for a predetermined period of time which is terminated with a communication received over a common digital communication circuit but which is not initiated while the microcomputer is activating the battery switch circuit in the timer control mode and a predetermined activation time has not expired.

10. The distributed handling apparatus as claimed in clause 8 characterized in that the sensor means respond to a voltage through the associated battery and the microcomputer also responds through the common digital communication circuit to an activation command signal of communicated voltage to store an ordered voltage portion thereof in memory, terminate an existing timer control mode, and activate and deactivate the battery switch circuit in a voltage control mode in response to the voltage portion stored order and sensor means.

11. The distributed handling apparatus as claimed in clause 10 characterized in that: the microcomputer of each stack monitoring module periodically and independently samples an output of the sensor means and stores a voltage value through the associated stack; all the microcomputers respond to an order to freeze data communicated by the interconnection module on the common digital communication circuit to store and retain the most current value of the voltage through the associated stack; each of the microcomputers also responds to an order to send data directed uniquely from the interconnection module on the digital communication circuit to communicate the value retained on the digital communication circuit to the interconnection module, so the voltages The battery cells are simultaneously sampled by the battery monitoring modules but are communicated individually to the interconnection module.

12. The distributed handling apparatus as claimed in clause 1 characterized in that the common digital communication circuit comprises, in each stack monitoring module: (a) the first and second optoelectronic couplers each having LED and a light sensitive resistor electrically isolated from one another but arranged for optical communication therebetween, (b) the first circuit means connecting the light-sensitive resistor of the first optoelectronic coupler in series with a first fixed resistor and the power conditioning circuit, (c) the second circuit means connecting a joint of the light sensitive resistor and the first fixed resistor to an input data terminal of the microcomputer, (d) the third circuit means selectively connected, under a control of the output data terminal of the microcomputer, the LED of the second optoelectronic coupler in series with the power conditioning circuit, (e) the fourth circuit means connecting the first LED between a terminal DATAl of the stack monitoring module and a DATA2 terminal of the stack monitoring module, (f) the fifth circuit means, in parallel with the fourth circuit means, connecting the second light-sensitive resistor between the DATAl terminal of the stack monitoring module and the DATA2 terminal of the stack monitoring module.

13. The distributed handling apparatus as claimed in clause 12 in which: (a) the second light sensitive resistor is a light sensitive transistor, a terminal of which is connected through a second fixed resistor to a terminal of the first LED and is also connected to the DATA2 terminal of the surveillance module of battery and the other terminal of which is connected to the DATAl terminal of the battery monitoring module; (b) the other terminal of the first LED is connected to the DATAl terminal of the battery monitoring module; (c) the LED and the light sensitive transistor are oriented in an opposite current carrying polarity in relation to each of the terminals DATAl and DATAl of the stack monitoring module.

14. The distributed handling apparatus as claimed in clause 12 characterized in that: (a) the interconnection module comprises an interconnection microcomputer comprising the input and output data terminals and a data address control terminal and further comprising an energy supply providing a regulated voltage between the first and interconnection power terminals; second within the interconnection; (b) the common digital communication circuit comprises, in the interconnection module, (1) a third fixed resistor connecting the first interconnection power terminal with a DATAl terminal of the interconnection module, (2) the sixth circuit means selectively connecting, under control of the output data terminal of the interconnection microcomputer, the DATAl terminal of the interconnection module in series with the second interconnection power terminal of the interconnection module, (3) the seventh circuit means connecting the DATAl terminal of the interconnection module with the input data terminal of the interconnection microcomputer, and (4) the eighth circuit means by alternately connecting, under control of the address control terminal of the interconnection microcomputer, the DATA2 terminal of the interconnection module to one of the first interconnection power terminal and the second interconnection terminal. interconnection energy thereof; (c) a first single wire communication line connects the terminal DATAl of the interconnection module with the terminal DATAl of each of the stack monitoring modules; (d) a second single wire communication line connects the terminal DATA2 of the interconnection module with the terminal DATA2 of each of the stack monitoring modules. SUMMARY In a distributed handling apparatus for a battery block, a battery monitoring module for each individual battery comprises a microcomputer and an apparatus for bi-directional communication with a central control. Each microcomputer is provided with a memory and its own control program, which allows sophisticated data collection, communication and switch control functions to be performed by each stack monitoring module independently of the central control, even when it is still under your orders, for an efficient and more flexible control design and a capable system operation. In a preferred embodiment, each battery monitoring module may further comprise voltage and temperature measurement circuits with inputs to the microcomputer and a switch circuit incorporating the microcomputer itself. All battery monitoring modules are linked to the interconnection module by a minimum element, the common digital communication circuit for bi-directional communication between each of the stack monitoring modules and the central control. Each stack monitoring module may alternatively provide switch activation, as ordered by the central control, in a stopwatch mode, in which the switch path is activated for an ordered time, or a voltage mode, in the which the switch path is activated when the battery voltage equals an ordered value.