MXPA96001092A - Modulator-demodulator apparatus and method for synchronizing a data communication equipment with a clock of one - Google Patents

Modulator-demodulator apparatus and method for synchronizing a data communication equipment with a clock of one

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Publication number
MXPA96001092A
MXPA96001092A MXPA/A/1996/001092A MX9601092A MXPA96001092A MX PA96001092 A MXPA96001092 A MX PA96001092A MX 9601092 A MX9601092 A MX 9601092A MX PA96001092 A MXPA96001092 A MX PA96001092A
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Mexico
Prior art keywords
signal
data
samples
modem
qls
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MXPA/A/1996/001092A
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Spanish (es)
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MX9601092A (en
Inventor
Alexander Gelblum Ehud
Emery Mazo James
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Lucent Technologies Inc
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Publication date
Priority claimed from US08/413,678 external-priority patent/US5828696A/en
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Publication of MX9601092A publication Critical patent/MX9601092A/en
Publication of MXPA96001092A publication Critical patent/MXPA96001092A/en

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Abstract

The present invention relates to a modem apparatus, characterized in that it comprises: means for receiving a pulsed signal that includes a superimposed timing signal, and a means that responds to the received superimposed timing signal for synchronizing a modem clock frequency to a sampling clock of a telecommunications network, wherein the timing signal is a plurality of

Description

MODULATOR-DEMODULATOR APPARATUS AND METHOD TO SYNCHRONIZE A DATA COMMUNICATION TEAM TO A CLOCK OF A NETWORK FIELD OF THE INVENTION The present invention relates to data communications equipment, for example, to modems (modulators-demodulators), and, more particularly, to modems synchronized to the network.
BACKGROUND OF THE INVENTION For a large number of users, the local telephone circuit is still the primary means of transmission between a user's data communications equipment, that is, a modem, and a local central office, which is part of the Telephone Network Switched Public (PSTN). The local telephone circuit is an analogue transmission medium in which the modem transmission signals are restricted to the voice signal band with a nominal bandwidth of 3.5 kiloHertz (kHz). With the increase in the number and different kinds of data-oriented services, similar to Prodigy, available, and the simple access of information through the well-known Internet, users have shown the desire to increase the transmission speeds of data on the local telephone circuit beyond what is commonly available in the modems available in stock or in the warehouse. In the commonly assigned, co-pending, United States of America patent applications of: Ayanoglu et al., Entitled "A High-Speed Modem Synchronized to a Remote Codee", Serial No. 07/963539, filed on 20 October 1992; N.R. Dagdeviren, entitled "A Modem with Received Signals and Transmitted Signis Comprising Signal Sets," No. of * Series 08/080161, filed on June 21, 1993; and Ayanoglu et al., entitled "High-Speed Quantization-Level-Sampling Modem with Equalization Arrangement", Serial No. 08/176742, filed January 3, 1994; a high-speed modem technology is described, which significantly increases the speed of data transmission over the local telephone circuit. Specifically, these patent applications describe a high-speed modem technology in which a modem is synchronized in both time and quantization levels to analog-to-digital (A / D) and digital-to-analog (D / A) converters. ), that is, the quantification devices of the PSTN. This synchronization makes it possible effectively that a subset of quantization levels can be used as a signaling alphabet and by this the quantization noise which is input by the PSTN over any signals of the transmitted data is greatly reduced. As a result, the data transmission speed is greatly increased. For example, this synchronization approach allows a modem to operate at the clock speed of the PSTN, and, under certain assumptions, for example, no limitation of the band in local telephone closed circuits, a data transmission rate of 64 kilobits per second (kb / s) can theoretically be achieved over the local telephone circuit. A modem using this high-speed modem technology is referred to herein as a "quantization level sampling" (QLS) modem, and the signals communicated in a QLS data communications system are referred to herein as "impulse signals". "or" pulsantes ". As mentioned so far, for the modulation scheme of the QLS modem, described above, to work, there must be a synchronization of the timing in both the transmission and reception directions, between the QLS modem and a time clock. - Map of the network in the PSTN. This synchronization is necessary because the sampling clock of the network controls the sampling instants of any quantization device located within the PSTN. For example, data symbols transmitted from a QLS modem to your local central office must reach the A / D converter of the local central office at the precise moment when the A / D converter reads each sample. In a similar way, a reception QLS modem must be synchronized with the sampling clock of the network of your local central office. Unfortunately, any timing deviations measured as variations or cyclical fluctuations of the timing introduce intersymbol interference in the respective received data signal. At these high data transmission rates, the maximum permissible, cyclical variations or timing fluctuations in a QLS data communication system is typically very small. For example, the cyclic variation of the allowable, maximal timing for a data transmission rate greater than 42 kilobits / second (kb / s) may be less than 70 nanoseconds (ns).
BRIEF DESCRIPTION OF THE INVENTION The invention presents a timing system that synchronizes a QLS modem with a network sampling clock in the PSTN. In particular, a timing signal is superimposed on a pulse-da signal, which is transmitted from the PSTN to a reception QLS modem. In response to this received temporation signal, the reception QLS modem is synchronized with the network sampling clock. In one embodiment of the invention, the pulsed signal includes samples that carry the data, which can be provided by a QLS modem of the remote or remote end or a source within the network, and at least one sample that carries the data that they are not from the user (NUDB) in which the level of this NUDB sample alternates or changes periodically. The receiving QLS modem extracts the timing information from this periodically alternating signal level, to synchronize the QLS modem with the network sampling clock. In addition, the receiving QLS modem uses the information of the extracted timing to calibrate any distortion effects of the NUDB sample on the samples carrying the data of the received QLS signal. In accordance with a feature of the invention, the inventors have realized that both the A / D and D / A converters in the PSTN operate from the. Same network sampling clock, the QLS modem synchronization with the downstream sampling frequency is equivalent to the synchronization of the QLS modem with the upstream sampling frequency. Using this principle, the temporization system of the invention places all of the timing information only on the downstream pulsed signal and the receiving QLS modem acquires synchronization for both directions.
BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of a portion of a data communication system with Quantization Level Sampling (QLS); Figure 2 shows an illustrative portion of a DSO representation of a pulsed signal provided by a QLS modem; Figure 3 is a block diagram of a QLS modem at the network level; Figure 4 is an illustrative timing configuration in which the principles of the invention are embodied for use in a QLS data communications system; Figure 5 is the representation of a coding table * of the law M ~; Figure 6 is a block diagram of a portion of a QLS modem at the network level, in which the principles of the invention are embodied; Figure 7 is a block diagram of a portion of a QLS modem in which the principles of the invention are embodied; Figure 8 is a flow chart illustrative of a start or start phase, in which the principles of the invention take; Figure 9 is a flow chart illustrative of a method for canceling an echo signal from the timing signal; and Figure 10 is a block diagram of a portion of a transmitter of a QLS modem for use in the method of Figure 9.
DETAILED DESCRIPTION OF THE INVENTION Before describing the concept of the invention, the general operation of a QLS data communication system will be described to provide some background information. Additional information, if desired, may be obtained from patent applications of the United States of America »described above. Figure 1 is a block diagram of a QLS data communications system that includes the QLS 203 modem, the PSTN 309, and the QLS 205 modem. For reasons of simplicity, only the transmission address is shown. from the QLS modem 203 to the QLS modem 205 in Figure 1 and will be described later. The transmission in the opposite direction, that is, from the QLS 205 modem to the QLS 203 modem, it happens in a similar way. It is assumed that a data connection between the QLS 205 modem and the QLS 203 modem already exists, for example, call setup, training, etc., has been completed and the data is being communicated between the modem of QLS 205 and the QLS modem 203. It is also assumed in the example that the PSTN 309 network operates at a sample rate of 8000 samples / s and employs the codes (decoders-decoders) 301 and 315 of the Zi law. -, which include a band-limiting filter that limits the response of closed circuits 217 and 219 telephone premises, to a nominal frequency range of 300 Hz - 3.3 kHz. Thus, local closed circuits 217 and 219 can be considered to have 6 kHz of bilateral bandwidth available. As is known in the art, codees 301 and 315 of the law At, are encoders-decoders that use the coding of the law Ai-to convert an analog signal to a digital representation and vice versa. The transmission of the data os in a digital format crossing the PSTN 309 through the QLS 305 modem at the network level (described later). There is a similar excenario in the European telephone networks with the exception that codees 301 and 315 of the L law are replaced by the code-decoders of law A. Since the coding of the European A law is completely analogous to the counterpart of the law tx? American, all the processes described in this patent apply equally to both. The underlying concept of a QLS modem is one in which the QLS modem is synchronized both in time and in the quantization levels with analog to digital (A / D) and digital to analog (D / A) converters, that is, the quantification devices of the PSTN. This synchronization greatly reduces the quantization noise that is introduced by the PSTN over any transmitted data signals and, as a result, greatly increases the data transmission rate. The synchronization in the levels of quantification-cipn is achieved by using, in each QLS modem, the quantization levels of the tx-law as the signaling alphabet. As a result, each data symbol is equivalent to one of the 255 quantization levels of the JLL, or sample levels, and therefore representative of approximately eight bits of user data. Thus, the sequence of transmitted data symbols is conveyed explicitly through the network in digital form. From the basic theory of Nyquist, it is known that a channel with bilateral bandwidth of W Hz is able to support signaling with low distortion at a speed no greater than w 'symbols / s. Accordingly, with the approximately 6 kHz of the available bilateral local loop circuit bandwidth, the maximum symbol transmission rate is around 6000 symbols / s. Since the sampling levels of the law tí * are used as the signaling alphabet, this maximum symbol transmission rate is equivalently established as 6000 samples / s. In contrast, it has been assumed that the PSTN 309 is capable of sampling 8000 samples / s. As a result, at most 6 out of 8 samples received by the PSTN 309 can be chosen arbitrarily. In other words, it is not possible to choose 8000 independent samples / s and pass them through the modem when the modem output is limited in the band to 6000 samples / s. Since, in this example, each of these 6000 samples / s represents 8 bits, then a transmission speed of up to 48 kbps is feasible over a local telephone circuit, even when considering the bandwidth practice. Generally established, the resulting analog signal from the QLS modem 203 is referred to herein as a "pulsed or pulsating signal" in which analog samples are sent 'in groups of M symbols., or samples, in a sequence of cycles of recurrent impulses. Each of the recurring pulse cycles comprises N clock periods, wherein each clock period is equal to the period of the network sampling clock, T, of the PSTN 309. The period of the cycle of recurring pulses, T, per therefore it is equal to NT. In each cycle of recurrent pulses of the pulsed or pulsating signal, the group of M samples is referred to here as the samples "carrying the user data" (UDB), while the group of (NM) samples is referred to as the samples "that carry data that is not of the user" (NUDB). In this example, M = 6 samples are sent in a cycle of recurring pulses that comprises N = 8 clock periods, where, for 8000 samples / s, the period of the network sampling clock, T, is equal to 125 microsecond (Ltseg.) and, therefore, T = 1 millisecond (msec.). Thus, 6 out of 8 of the output samples are activated or boosted at the level of quantification transmitted, that is, they are samples of UDB, while the two remaining samples are samples of NUDB. Since under the Nyquist theory the NUDB samples can not be chosen arbitrarily, they are set to zero by the QLS 203 modem and by the QLS 305 modem at the network level (described later). In order for the QLS 203 modem to provide a data transmission rate of 6000 samples / s on the local loop 217, additional design considerations must be taken into account. As described in the aforementioned United States patent application of Ayanoglu et al., Entitled "High Speed Quantization-Level-Sampling Modem with Equalization Arrangement", it has been shown that if a signal, h (t), has a spectral support that does not fade, bilateral, at least M of the Nyquist frequency is translated or translated (f + 1 / T), 1 = 0, ±, ± 2, ... of the whole of f for IfJ <; 1 / (2T), it is then possible to specify transmitter and receiver filters in such a way that each of the data streams M, from M users, can be recovered without interference from the other data streams. A set of transmitter and receiver filters that effect this state of affairs can be referred to as satisfying the generalized zero forcing (GZF) criterion as is known in the art. As pointed out in the aforementioned United States patent application of Ayanoglu et al., This analysis can be extended to show that if the set of transmitter filters or the set of receiver filters is fixed, it has the flexibility of choose the other set provided that the fixed set satisfies certain spectral requirements. In particular, if the elements of the set of fixed filters are only delay elements and if neither of the two delay values are identical, then these spectral requirements are almost always satisfied, and it is possible to choose the other set of filters to execute or achieve the GZF criterion. This notion forms the basis of the design of a QLS modem in which a single user transmits a sequence of symbols at MT speed, but without any uniform time spacing between the symbols. Figure 1 shows an illustrative block diagram of the transmitting portion of the QLS modem 203, which provides a pulsed signal on the line 217. The user data 229 is applied to the transmission to the QLS modem 203 at a speed of approximately 48 kbps if no restrictions are imposed on the use of quantification levels. The encoder 233 codes the user data 229 in six streams of symbols 235-240 of the channel, of 1000 symbols / s, parallel, that is, the encoder 233 provides illustratively a sampling stream at the MT speed, where M = 6, and 1 / T = 1 kHz. As mentioned above, the encoder 233 uses the law's own quantization levels as the signaling alphabet. The transmission component 221 includes six transmitter filters 251-256, each such filter (or the transmitter equalizer) operates in one of the symbol streams of the channel. The outputs 261-266 of the transmit filter are summed in the adder or aggregator 270 of the transmitter, and the output signal 272 of the adder is converted to the analog form and filtered by the digital-to-analog converter 279. The latter provides a pulsed signal or pulse for the transmission over the subscriber's loop 217 to a local central office (not shown) of the PSTN 309. In the central office (not shown) of the PSTN 309, the codec 301 filters and samples the pulsed or pulsed signal at a rate of 8000 samples / s, and quantizes and encodes these sample voltages into a DSO digital sequence, which is transported through the PSTN 309 by passing it through or through the modem 305 at the network level (described below) to the codein 315. An illustrative portion of this modified DSO digital sequence is shown illustratively in Figure 2. The portion 302 of the DSO is a representation digital signal of the pulsed or pulsed signal on line 217 on the cycle of recurrent pulses 303 and the cycle of recurrent pulses 307. The samples of UDB are represented by d., (i = i "to 12), while the samples of NUDB are set or zeroed in. To complete the transmission of the signal from the transmission QLS modem 203, the codec 315 converts the DSO sequence into another pulsed or pulsating signal which is transmitted over the electronic circuit. rred subscriber 219 up to the receiving QLS 205 modem. This pulsed or pulsed signal is received by the receiver component 223 of the QLS 205 modem. The received pulsed or pulsed signal is converted to the digital form by an A / D converter 281, which samples at a rate of 8000 samples / sec. The digital signal The resulting 283 is operated by six parallel 291 -296 receiver filters. The kth receiver filter (or receiver equalizer) RX, 294 produces a stream of digital samples 454 at a rate of 1000 samples / s, these samples being estimated from the transmitted sample stream 238, corresponding, are inputted to the kesimo transmitter equalizer TX, 254 of the QLS 203 modem. The currents 451-456 of the samples, are operated by amplifiers 461-466 which assign coordinates to each sample for the 8-bit word corresponding to the closest level of the 255 sampling levels of the U * law possible. The six output symbol currents 471-476 of the amplifier are operated by the decoder 480 which assigns coordinates to the six symbol streams of the channel, of 1000 symbols / sr in a data output stream 230 of the single user to one. speed up to 48 kbps. Having generally described the operation of a QLS data communications system, the QLS 305 modem will now be described at the network level. The QLS 305 modem at the network level represents a set of such QLS modems at the network level that are a part of a high-speed, offer data service provided by PSTN 309. This set can be have access in any number of ways, for example, through a predefined telephone number, associated with this high-speed data service. Once this set is accessed, the subsequent data connection is then switched through the QLS 305 modem to the network level. The latter implements a code conversion process as described in the aforementioned United States patent application of N.R. Dagdeviren, entitled "A Modem with Received Signals and Transmitted Signis Comprising Signal Sets". This code conversion process compensates for the hybrid leak that occurs within the PSTN 309 and ensures that the NUDB samples are placed or adjusted to zero. For the purposes of this example, it is assumed that each QLS modem at the network level simply receives and transmits a digital representation of a pulsed or pulsating signal. An illustrative mode of a QLS modem at the network level is shown in Figure 3. The QLS 305 model at the network level, comprises digital signal processors (DSP's) and associated circuits to manipulate or manage the tasks of Echo cancellation and code conversion. It is assumed that lines 304 and 306 are already in the digital DSO format, which have been filtered and quantized in > the converters A / p from the local telephone exchange office. The QLS 305 model at the network level is coupled or joined to the QLS data connection through lines 304 and 306. In particular, the digital signal 301 is used by the echo canceller 70 to estimate the echo on the line 302. The converter 60 of the code converts the samples carrying the data on line 303 from its reception constellation to its transmission constellation and the send outside line 306 to the local telephone exchange. For the purposes of this description, the conversion of the code effected by the code converters 60 and 65 is not important. The recovery of the timing on any QLS data communications equipment in the network, for example, modem 305 at the level of the QLS network, is not of interest since any device in the network implicitly receives a signal from the network. clear timing within the network. However, as mentioned previously, for the modulation scheme of the QLS modem described above to work, there must be synchronization of the timing in both the transmission and reception directions between the QLS modem and a sampling clock. of the PSTN network. This synchronization is necessary because the sampling clock of the network controls the sampling instants of any quantization device located within the PSTN. For example, data symbols transmitted from a QLS modem to your local central office must reach the A / D converter of the local central office at the precise moment in which the A / D converter reads each sample. Similarly, a receiving QLS modem must be synchronized with respect to the sampling clock of the network of its local central office. Unfortunately, any deviations in the timing, measured as timing fluctuations, introduce an intersymbol interference in the respective received data signal, since the quantization device is no longer sampling the signal in the zeros of the other pulses. At these high data rates, the allowable, maximum timing jitter in a QLS data communications system is typically very small. For example, the fluctuation of the maximum allowable tempopzation for a data transmission rate greater than 42 kilobits / second (kb / s) may be less than 70 nanoseconds (ns). As described in the U.S. patent application. mentioned above from Ayanoglu et al., entitled "A High Speed Modem Synchromed to Remote Codee", se. suggest a number of synchronization methods. All of these techniques are generally focused on a reception QLS modem that matches a training signal during the start or start portion of a QLS data connection. From this equalization, the delays of the timing can be adjusted as is known in the art. After this, the conventional adaptive matching approach can be taken to maintain the timing. Since the synchronization in a QLS modem is required in both the transmission and reception directions, this equalization is performed on the routes or trajectories of both reception and transmission. Although the equalization approaches described above could be used to synchronize a QLS modem with a network sampling clock, the inventors present an alternative timing system. According to the invention, a timing signal is superimposed on a pulsed or pulsating signal, which is transmitted from the PSTN to a receiving QLS modem. In response to this received timing signal, the reception QLS modem is synchronized to the sampling frequency of the network. In the following description, it is implicitly assumed that any timing fluctuations of the network, internal, is either a very small high-frequency fluctuation, so that the sample-to-sample variations are not severe, for example, of the order from 10 to 20 ns, or the fluctuation is long-term and the trace can be followed by a closed-phase fixed circuit (PLL), with only a small degradation caused by the delay of the round strip accumulated in the path or path of the PSTN 309 to the receiving QLS modem and back again. As samples NUDB not be used to transport arbitrary data described above, a pulse signal or pulse, because this would violate the limitation Nyquist 6000 samples / s for the 6 kHz of available bandwidth on circuit closed local phone, in particular, for M = 6 and N = 8, attempting to use the two samples NUDB to transmit arbitrary data results in the introduction of intersymbol interference which can not be eliminated by any of the equalizers reception linear However, it is understood that a class of NUDB samples other than zero can be used to synchronize the reception modem with a network sampling clock without inducing non-deletable interference in the receiver. In parti-cular, proposed by the inventors method requires overlapping, ie, the addition explicitly, a pure tone (and concomitant harmonics elements) on the current power transmission down from the network to modem QLS reception. This tone is only detected by manipulating one of the samples not used in each cycle of recurrent impulses so that it does not alter the values of any of the data samples that carry the information. Continuing with the example above, it is assumed that a scheme of pulsating signals of between 6 and 8 is used, whereby 6 samples send data, that is, they are samples of UDB, followed by two unused time intervals. Although it has been described for illustrative purposes as being contiguous, it is not required that the NUDB samples or the UDB samples within a cycle of recurrent pulses be contiguous. In one embodiment of the invention, the last sample of each recurring cycle pulses of 8 samples, which normally would be held to zero, is alternatively placed at a level of + A and -A in consecutive cycles of recurrent pulses. That is, in a period of the cycle of recurrent impulses, T, the pulsed or pulsating signal includes samples that carry data, which were provided by the QLS modem of the remote or remote end, and at least one sample that carries data different from the user (NUDB) in which the level of the NUDB sample is alternated. This is illustrated in Figure 4 by the recurring pulse cycles 11 and 12, which represent the timing path or path that is superimposed on a pulsed or pulsed signal transmitted to the receiving QLS modem. In general, for the totally bilateral or double transmission, the choice of A is a compromise between the strong tones received in the modem against the low crosstalk of the tones through the hybrid element. In the downstream direction, for example, from network 304 of the PSTN to the receiving QLS modem, A is chosen to be 64 levels, or 247.5 units out of a maximum of 4015.5 units. These units conform to the codification of the law. well known as shown in Figure 5. This configuration or superimposed path of ['** - A 0 0 0 0 0 0 0 A 0 0 0 0 0 0 0 - A, # *] creates a collection of individual tones, but the tones of the inner band (<; 4 kilohertz (kHz) are in 500, 1500, 2500, and 3500 Hertz (Hz). In this example, the 1500 Hz tone is used as the timing reference. Although the other tones are superfluous, the manufacture of only one tone may require adding a signal to the 6 UDB samples. Although this could be done, it is undesirable for two reasons. First, since samples of the downstream signal are selected from an alphabet of discrete values (the levels of the law i?), The creation of a perfect tone can confirm that it will be impossible. Second, it is required that the samples carrying the data "share" the dynamic range with the timing information to effectively reduce the dynamic range available for the actual data. In fact, the most general periodic configuration can also be used [** "- A 0 0 0 0 0 0 0 B 0 0 0 0 0 0 0 - A ***] For this example, the tones in the multiples of 1000 Hz could also be created if A B. Since the downstream transmission is timed by the D / A converter in the central office, the four overlapping internal band tones arrive at the receiving QLS modem which has the frequencies determined in Precisely by the frequency of the network device The reception QLS modem extracts the timing information from this level of the periodic alternation signal both to synchronize the QLS modem with the network sampling clock, and to cancel Any distorting effects of the NUDB samples on the samples carrying the data of the received QLS signal.
In this example, it is assumed that the timing signal is superimposed on a pulsed or pulsed signal transmitted by a QLS modem at the network level. Figure 6 is a block diagram of a QLS modem at the network level, in which the principles of the invention are embodied. The QLS 405 modem at the network level of Figure 6 replaces the QLS 305 modem at the network level of ~ Figures 1 and 3. The QLS 405 modem at the network level is similar to the QLS modem 305 at the network level, except for the addition of timing procedures 80, 85, 90, and 95. As in Figure 3, lines 304 and 306 are assumed to provide digital DSO information to / from the office of the local telephone exchange, the echo cancellers 70 and 75 provide a relative immunity to the trans-hybrid echo, and the code converters 60 and 65 are intermediate between the reception and transmission constellations. In addition, processes 90 and 95 place the energy in the NUDB samples at a non-zero number, caused by the confluence of intersymbol interference and near-hybrid echo. Processes 80 and 85 generate timing samples that are to be inserted into the NUDB samples just placed in a non-zero number, before signals 304 and 306 are transmitted back to the offices of the local telephone exchanges. Figure 7 is a block diagram of a portion of a QLS modem in which the principles of the invention are embodied. For reasons of simplicity, only the receiving portion of the QLS 505 modem is described. As noted above, QLS modem 405 at the network level sends a data stream (d.) Interspersed with the timing tone (+ A) in the data format described, [* "" d1 d_ d, d4 d5 d6 0 A d? dQ dg d ^ Q d11 d12 0 -A "*] This data stream passes through the local codec and local closed circuit filters and the reception filter, the cascade of which is represented by the response function of the channel C (Q) as represented by the element 500, and arrives at the reception QLS modem 505, through the line 501, where it is converted to digital format by the analog-to-digital converter 575. The signal received is applied to the tone canceller 580 of the QLS 505 modem. The latter includes the timing response filter 565 and the aggregator or add-on 510. The timing response filter 565 provides a signal representing a sampled estimate with respect to to the signal itself and the received timing, and the estimate of the channel response to the timing signal is represented here by C_, which is determined in the start or start phase, described later. or addor 510 subtracts the output signal from the response filter 565 to the timing of the received pulsed or pulsed signal, by means of which the timing signal of the pulsed or pulsed received signal is removed or canceled. Accordingly, the signal provided by the adder 510 through line 511 is, ideally, a data only signal. The latter is applied to the echo canceller 560, the equalizer 550, and the amplifier 545 for the recovery of the data signal, which is provided on the line 546. The recovered data signal is also applied to the data canceller 585. The latter includes the element for reissuing the recurring pulse cycle 570, the filter 530 of the channel model, the delay element 520, and the aggregator or adder 525. After the data signal is recovered, it becomes to emit as a cycle of recurring pulses in blocks of 8 (6 data symbols followed by 2 zeros) by the element 570 to reissue the cycle of recurring pulses, and is again passed through the filter 530 of the channel model . This last filter provides an estimate of the response of the channel to the data signal. This estimate is represented here as C (60) which is determined in the start or start phase, described later. Finally, the aggregator 525 subtracts the output signal of the filter 530 from the channel model of a delayed version of the original input signal, which is provided by the delay element 52? (described later), to cancel the data signal therefrom and provide an estimate of the timing signal through line 526. The recovery of the timing is effected by the fixed phase closed circuit (PLL) 535, which is set on the received 1500 Hz tone and controls the temp reference 555 to provide a reference timing signal, T, on line 556, which is representative of the same 8000 Hz sampling clock that he created the tone. In particular, the timing reference 555 provides the reference timing signal Ts on the line 556 and also »derives a signal from 1500 Hz from T that is provided on line 554. PLL 535 compares the 1500 Hz signal generated by timing reference 555 with the received 1500 Hz tone and sets the timing reference 555 to synchronize the two 1500 Hz signals , by , ? means of which Ts is also synchronized with the reloi J of the network. Experimentally, a PLL with a bandwidth of 0.1 Hz is used. Also, the signal from? Reference timing, T, is then applied to the converter 540 which, in a manner similar to the element 570 to regenerate the cycle of recurring pulses, regenerates the path or timing path, which is applied to the response filter 565 of the timing, through line 541. In response to this regenerated timing configuration, the response filter 565 to the timing provides the estimate of the channel response to the timing signal, described above. One benefit of this technique is the simple nature of the 565 response filter to the timing due to the periodicity of the tones. That is, the number of branches is just twice the number of samples in a cycle of recurring impulses. In this example, since a pulsed or pulsed signal scheme of between 6 and 8 is used, the filter response 565 to timing only needs to be 16 branches in length. In addition, the last 8 branches are related to the first 8 by the simple relation, C2 (i) = -C2 (i-8) where 8 < i < 15, so that only 8 locations in the memory need to be stored in the response filter 565 to the timing. For example, the sequence of + A's is placed at T = 16 T. It is a fundamental identity that the frequency spectrum of the tones can be represented by: TO ? exp (i? nT) = - J ~ d (/ - mf0); (1) where fQ = 1 / T. In the present situation f = 500 Hz. There is a similar representation for the impulses -A, which are displaced by T / 2. In particular, - ^ expH? («R + l)) = - ^ ¿(-ird (/ - / 0), (2) m-oo adding the equations (1) and (2) we have: odd m ' Therefore, from equation (3), the expression of the time domain for the generated timing signal, referred to here as the tones (t) is: 4A v "-> tones (t) = - V cos (2pmf0T) .Tl (4) m odd After passing through a linear channel as represented by the response function of the channel C_ (< ü ) described above, the QLS modem receives a tone signal equal to: received tones (t) =? amcos (2pmf0t + fm), m-l '(5) m = odd with ? and f representing the components of the attenuation and phase shift of C "((A)) at the frequency mfQ. Presumably for me > 7 0L is negligible because of channel and filter attenuations. Returning to equation (5), each tone of the individual component of the frequency mf has a period which is a submultiple of T, and each tone changes sign during a time shift of T / 2. Hence, received tones (t) = received tones (t + kT), (6) where k = 0, +1, +2, *** > received tones (t) = - received tones (t + T / 2). (7) Therefore, assuming that the out-of-band tones have a negligible energy, the tones of the internal band can be canceled by subtracting output from a 16-branch delay line synchronized with a clock signal, whose values are the / alues spaced at 16Ts from the tone signal. This is the function of the tone canceller 580 in Figure 7. As described below, these values are learned during an initial training step when data is not being sent. Furthermore, from equation (7), only eight consecutive values need to be remembered; the other eight are the negatives of these. The above description assumes that the respective response functions of the channel C2 and C ()), used by the filter response 565 to the timing and filter 530 of the channel model, respectively, were determined in the start-up phase. , that is, training. An illustrative portion of the start or start phase is shown in Figure 8. Other elements of a training phase, for example, the negotiation of the data rate, etc., are not shown. In step 605, of Figure 8, the modem of QLS 405 at the network level, transmits only the timing signal as shown in Figure 4, to the QLS 505 modem. From this reference clock, the QLS 505 modem generates a timing signal in step 610 on line 541. In particular, the delay element 520 provides a voluminous delay of the N branches and represents the propagation delay through the equalizer 550. The value of N must be half the length of an equalizer. Since an equalizer can be of the order of 100 branches, N is illustratively equal to a delay of 50 branches or branches. Since no data signal is being transmitted usually, the aggregator 525 provides the output signal from the delay element 520 directly to the PLL 535. The latter is set on the 1500 Hz tone, and derives an estimated A of the 8000 Hz sampling clock, T. This estimate is applied to filter 565 response to timing. After the PLL 535 is set and T is estimated, the QLS 505 modem then estimates the response of the channel with respect to the timing signal,? that is, the QLS modem 505 determines C_, in step 615. In this step, the filter 565 responds to the time-periodization, samples every T seconds and averages the received signal, which is only the timing signal , to learn exactly the response of the 16-sample channel to the synchronization or timing signal. (As noted at the beginning, only 16 branches or derivations are required to implement the channel response to the timing signal). These learned samples are then stored in the memory (not shown) of the time response filter 565 as the 16 branches or branches of the response filter 565 to the timing. After step 615, the QLS 405 modem at the network level deactivates the timing signal in step 620 and begins transmitting a predefined training signal in step 625. This training signal is a pseudo sequence at predefined random, a ,, which can be binary, that is, sent from the QLS 405 modem to the network level at a speed 1 / T, using all time intervals. In A to step 630, the estimate of channel C (L) is formed A by the modem of QLS 505. (Since C (6J) is not known A, it is estimated by C (Ct)), which is an approximation of the channel response across the full bandwidth). The received training signal is delayed by the delay element 520 and applied to the aggregator 525. In addition, the 590 processor applies an N-delayed version of the same sequence, a., To the channel 530 model by means of reformat-dor 570. The channel 530 model is an adaptive filter that adjusts adaptively the error between the outputs of the channel and the channel model to zero. This error signal is provided by the output 526 of the aggregator. It is assumed that step 630 is performed fast enough so that PLL 535 does not start to deviate, i.e. it is assumed that PLL 535 operates freely A during this step. It should be noted that the resulting C (£) includes the channel delay. Once the adaptation of the channel model is completed, the QLS 405 modem at the network level deactivates the pseudo-random data signal in step 635 and activates the timing signal again in step 640 to re-set the PLL 535 of the modem, A of QLS 505. In addition, the estimated channel model, C ((J), is used outside the line by the QLS 505 modem to quickly train the equalizer 550 in step 635. For more information , see the above-mentioned US Patent Application of Ayanoglu et al., entitled "High Speed Quantization-Level-Sampling Modem with Equalization Arrangement." Alternatively, the equalizers 550 can be trained or instructed directly from another training or training signal. instruction, but the slowness of real time and the inevitable noise caused by momentary, momentary, slight mismatches usually makes this a less than desirable option.
Finally, the steady-state operation begins at step 645. The cancellation of the tone is entered, the equalizer 550 is carried on the line and its estimates of the output data are sent through the model of channel 530 to subtract the background from the data, providing a relatively clean timing signal (high signal-to-noise ratio (SNR)) to PLL 535 for final fixing purposes. In the previous start or start phase, A assumes that the response of the total channel, C (U), and the response of the channel to the timing signal, A C_, does not change, or, if it does, each changes very slowly. If during data communications, the error rate increases beyond a predefined point, it is assumed that a retraining or re-training is performed to estimate these channel responses again. According to one feature of the invention, it is known that since both the A / D and D / A converters in the PSTN operate from the same clock. network sampling, the synchronization of the QLS modem with the downstream sampling frequency is equivalent to the synchronization of the QLS modem with the upstream sampling frequency. That is, since the A / D converter of the network "observed" by a transmission QLS modem uses the same working clock, the transmission QLS modem also knows the sampling frequency of the network A / D device. . Any relative, fixed phase shift between the network and the transmission QLS modem is then taken into account by including it as part of the channel characteristic in the upstream direction. Illustratively, a first QLS modem at the network level "learns the channel" during the start-up or startup phase described above. In this start-up or start-up phase, the QLS modem at the network level receives a pseudo-random data stream, which is provided by the QLS modem, and calculates a response from the channel. This channel response includes any time delay. The QLS modem at the network level then sends the calculated channel response back to the QLS modem. Using this principle, the timing system of the invention places all of the timing information only on the pulsed or pulsed downstream signal and the reception portion of the QLS modem acquires synchronization for both directions. A point should be noted for this to be completed. Even for half-double type transmission in the upstream direction, a timing signal must still be sent downstream to a QLS modem. However, bse of the hybrid device in the central office of the PSTN, this timing signal causes crosstalk in the analog segment of the upstream address. That is, an echo of this timing signal appears in the upstream transmission. This echo can be treated in a similar way to the crosstalk induced by the hybrid device, usual, found in the completely double transmission, for example, this echo can be eliminated with an echo canceller in the QLS modem at the network level , previously described. However, it is understood that another possibility is to cancel this echo of the timing signal by adding the appropriate analog samples in the transmission QLS modem during the upstream transmission. In other words, the transmission QLS modem now adds an additional analog signal to cancel any echo of the transmitted timing signal, caused by a hybrid device in the network. This allows the transmitted timing signal to be increased in energy without taking into account the corresponding increase in the echo signal, since the echo is subsequently canceled by the transmission of the additional analog signal. The higher the power or transmitted power of the timing signal, the better is the ability of the receive QLS modem to track. An illustrative method for canceling the echo signal generated by the transmission of a timing signal from the PSTN to a receiving QLS modem is shown in Figure 9. The latter is the same as for Figure 8, except for the addition of steps 805, 810, and 815. In step 805, the QLS 405 modem at the network level, measures the amount of the 1u echo signal received as a result of the transmission of the timing signal to the QLS 505 modem during the start or start phase. This measurement can be made in any number of ways, for example, since no data signal is being "5 transmitted, any samples in a cycle of recurrent pulses in the upstream direction, ideally must be equal to zero.Therefore, any level of the measured signal is equal to the echo of the transmitted timing signal. phase Starting or starting, the opposite value of the measured echo signal is transmitted to the QLS 505 modem in step 815. The QLS 815 modem then adds an additional analog signal equal to this opposite value, to any pulsed signal or pulsating, transmitted, in step 820. As a result, and in accordance with the principles of this invention, the subsequent addition of the echo signal to the signal transmitted by the hybrid PSTN device leads to the cancellation of the echo signal. A portion of a QLS 505 modem transmitter is shown in Figure 10, which is similar to transmitter 221 of Figure 1, except for the addition of processor 905. The latter generates the analog signal of the opposite value for addition to the pulsed or pulsed signal, transmitted, by means of the aggregator 270. This analog signal of opposite value is aggregated through all the samples of a cycle of recurring pulses. Consequently, the dynamic range of the underlying data signal is correspondingly reduced. Although the concept of the invention was described in the context of superimposing a timing signal on a pulsed or pulsed signal through the use of at least one alternating NUDB sample, it should be understood that any timing signal could also be superimposed. on at least one sample of UDB. In this case, the timing signal does not have to be generated from a device at the network level. Actually, the source of the timing signal could be anywhere, for example, the transmission QLS modem. However, as noted at the beginning, the use of a UDB sample restricts the dynamic range of the underlying data signal since this UDB sample represents the addition of the underlying data signal and the timing signal. Furthermore, it should be understood that if the quantization devices located within the respective local central offices are too coarse or rough, any of the timing signals could be interpreted as the data, or any of the data signals may be be interpreted as a timing signal. Similarly, a combination of NUDB and UDB samples could be used to carry the timing signal. The foregoing only illustrates the principles of the invention and will therefore be appreciated by those skilled in the art who will be able to contemplate numerous alternative arrangements which, although not explicitly described herein, take up the principles of the invention and are within the scope of the invention. .its spirit and scope. For example, although the invention is illustrated herein as being implemented with functional, discrete building blocks, eg, a fixed phase closed circuit, etc., the functions of any one or more of these building blocks can be carry out using one or more appropriate programmed processors, for example, a digital signal processor. Furthermore, although it is illustrated in the context of a pulsed or pulsating signal having 6 samples of UDB out of the 8 samples in each cycle of recurrent pulses, ie, a scheme 6 out of eight or between 6 and 8, they are possible other combinations, for example, 4 samples of UDB out of the 5 samples in each cycle of recurrent pulses, 6 samples of UDB out of the 7 samples in each cycle of recurrent pulses, etc. It should be understood that changing the format of the pulsed or pulsating signal alters the corresponding tones that are generated. For example, in a scheme 4 out of 5 or between 4 and 5, or a scheme 6 out of 7 or between 6 and 7, the fundamental frequency, fQ, could be 8000/10 = 800 Hz and 8000/14 = 571.4286 Hz, respectively. It should be noted that in these latter examples, both of these frequencies have an odd multiple number at 4000 Hz and the cancellation of this frequency component can be difficult. However, channel attenuation at 4000 Hz can be effective to suppress this component of the frequency. Finally, although the invention is described in terms of a connection between two user QLS modems, this is not necessarily the case. For example, a final point of view of the data connection may be an application of a data server that is digital versus an analog one. This application of the data server communicates through a digital installation and a QLS modem at the network level with the data communications equipment compatible with the user's QLS.
It is noted that in relation to this date the best method known by the applicant to carry out the aforementioned invention, is that which is clear from the present description of the invention.
Having described the invention as above, property is claimed as contained in the following

Claims (10)

R E I V I N D I C A C I O N S
1. A modem apparatus (modulator-demodulator), characterized in that it comprises: means for receiving a pulsed or pulsating signal including a superimposed timing signal; and means operating in response to the received superimposed timing signal, for synchronizing a modem clock frequency with a network sampling clock, of a telecommunications network.
2. The apparatus according to claim 1, characterized in that the timing signal is a plurality of tones.
3. The apparatus according to claim 1, characterized in that the timing signal is a single tone.
4. The apparatus according to claim 1, characterized in that the pulsed or pulsed signal represents a sequence of cycles of recurring pulses, each cycle of recurring pulses includes a plurality of samples, and wherein the timing signal is aggregated to at least one of the samples.
5. The apparatus according to claim 4, characterized in that the plurality of samples includes a number of samples that carry the user's data and at least one sample that carries different user data, and where the timing signal is represented by a level of the periodic alternating signal in the sample carrying different data from the user, and wherein the means operating in response to the timing signal include means for deriving the timing signal from this level of the periodic alternating signal.
6. The apparatus according to claim 4, characterized in that the plurality of samples includes a number of samples carrying user data and at least one sample carrying different user data, and wherein the timing signal is added to at least one of the samples that carry the user's data.
7. A method for synchronizing a reception data communications equipment with a network clock, the method is characterized in that it comprises the steps of: receiving a data signal from a transmission data communications equipment; superimposing a timing signal on the data signal to provide a combined signal; Y transmit the combined signal to the receiving data communications equipment.
8. The method according to claim 7, characterized in that the data signal represents a sequence of cycles of recurring pulses, each cycle of recurring pulses includes a plurality of samples, and wherein the step of overlapping includes the step of adding the timing signal to at least one of the samples.
9. The method according to claim 8, characterized in that the plurality of samples includes a number of samples that carry the data of the user and at least one sample that carries the different data of the user, and wherein the overlap step includes the step of adding a periodic alternating signal level in a sample that carries the user's different data, such as the timing signal.
10. The method according to claim 8, characterized in that the plurality of samples includes a number of samples that carry the data of the user and at least one sample that carries the different data of the user, and wherein the overlap step includes the step of add the timing signal to at least one of the samples that carry the user's data.
MXPA/A/1996/001092A 1995-03-30 1996-03-25 Modulator-demodulator apparatus and method for synchronizing a data communication equipment with a clock of one MXPA96001092A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08413678 1995-03-30
US08/413,678 US5828696A (en) 1995-03-30 1995-03-30 Timing recovery in a network-synchronized modem

Publications (2)

Publication Number Publication Date
MX9601092A MX9601092A (en) 1997-07-31
MXPA96001092A true MXPA96001092A (en) 1997-12-01

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