MXPA06003710A - Dc voltage converter with several isolated regulated outputs - Google Patents

Abstract

The present invention relates to a DC voltage converter with soft switching of the type with half-bridge arrangement at the primary side and of quasi-resonant half-wave type at the secondary side. This converter comprises a single transformer (Trf) and can generate a plurality of regulated voltages at output (Vout1,Vout2). It furthermore comprises a resonant circuit (Lf,Cr1,D1;Lf,Cr,D1) for creating a half-wave resonant current in the secondary winding (Ls) and charging a first load capacitor (Cs1) so as to produce a first DC voltage (Vs1). It furthermore comprises an inductive circuit (D2,Lr,T3) connected between said secondary winding and a second load capacitor (Cs2) able to generate a current so as to charge the second load capacitor during a part of the half-wave of the resonant current flowing in the secondary winding and thus produce a second DC voltage (Vs2).

Description

DC VOLTAGE CONVERTER WITH VARIOUS ISOLATED REGULATED OUTPUTS The present invention relates to a DC voltage converter with soft switching comprising a single transformer and which can generate at the output a plurality of isolated regulated voltages. The invention applies to any type of application that requires several regulated voltages. There are currently numerous arrangements for generating a plurality of regulated output voltages isolated from an output voltage. The first is to use as many independent converters as regulated output voltages are going to be provided. Each converter generates a regulated output vol- ume from the single voltage of the winding and has, to generate this voltage, its own galvanic isolation component (transformer) and its own regulation loop. The cost of this arrangement is great, as are the proportions of it, since it requires many transformers as regulated output voltage. On the other hand, the mutual synchronization of the various converters is difficult to achieve and requires the addition of additional extra components. Another possible arrangement is to wire DC / DC converters that are preferably not isolated, but to the secondary side of a master converter that is insulated with the transformer. The transformer of this converter Master is responsible for the galvanic isolation between the voltage of enira and the output voltages. The DC / DC converters are arranged in parallel on the output of the master converter. This arrangement becomes relatively complex when looking for certain functions (low switching losses, synchronization of the DC / DC converters on the master converter). Finally, a further provision consists in using a single DC / DC converter that comprises a single galvanic isolation transformer and in using, at the transformer level, secondary windings as regulated output voltages are to be provided. For example, the transformer comprises a primary winding and two secondary windings, each secondary winding is used to produce a regulated output vol- age. A commutator is available in series with the primary winding. This switch is supported by the output of a pulse width modulation circuit (PWM) that receives as input the voltage signal of one of the outputs of the converter. This disposiive has the advantage of being simple to implement, since it is enough to use as many windings on the secondary side of the transformer as desired regulated voltages, to rectify and filter each of them and use one of them to enslave or control (to slave) the montage. The problem with this arrangement is that only the output used for the control is perfectly regulated. The other outputs vary as a function of the charges present in their terminals and there is a tendency to increase in a low load. The main disadvantage of this arrangement is that it is rather inefficient in terms of cross-regulation between outputs. The object of the invention is to reduce all or some of these disadvantages. The present invention relates to a DC converter with soft switching, comprising a transformer that has a primary winding and a secondary winding, the primary side of the converter is of the type with semi-bridge arrangement and capable of being connected to an ignition voltage source via two switchers and the second side of the converter is a quasi-resonant half-wave type and capable of providing at least a first DC voltage at a first load and a second DC voltage at a second load , the second DC voltage is less than the first DC voltage, first control means for controlling alimerinarily the two crammers, at a fixed frequency, by pulse width modulation as a function of the first DC output and a resonant circuit to create a half-wave resonant current in the secondary winding and load a first capacitor connected to the terminals of the first load to produce the first DC volcano, and because it also comprises an inductive circuit connected to the second winding and a second capacitor connected to the terminals of the second load, the circuit The inductive can generate a current to charge the second capacitor during a part of the half wave of the resonant current flowing in the secondary winding and produce the second DC vol- ume. The inductive circuit more parlicularly comprises a first rectifying diode in series with a first inductance and a third switch, the third switch being closed during a part of the half wave of the resonant current flowing in the secondary winding. Second control means are designed to control the third switch by modulation of the pulse width as a function of the second DC output. According to a first embodiment, the resonant circuit comprises a second rectifying diode arranged in series with a second inductance and a capacitor resonanie, the moniaje is connected between the terminals of the secondary winding of the transformer, and the first capacitor is connected to the terminals of the resonance capacitor via a leveling inductance. According to a second embodiment, the resonant circuit comprises a second rectification diode arranged in series with a second inductance between the second winding and the first capacitor, and a capacitor arranged in series with the primary winding which, reflected to the secondary side, is propose to resonate with the second inductance.

In both embodiments, the second inductance is the leakage inductance of the transformer reflected to the secondary side or possibly the series inductance formed of the leakage inductance of the transformer reflected to the secondary side and of an additional inductance disposed between the secondary winding and the first load . The invention will be better understood on reading the following description, given by way of non-limiting example, and with reference to the appended drawings, in which: - Figure 1 is an electrical diagram of a first converter in accordance with the invention, - Figures 2A to 2H represent current and voltage schedules that illustrate the operation mode of the converter of Figure 1, - Figure 3 is an electrical diagram of a second converter according to the invention, - Figures 4A a 4H represent current and voltage schedules that illustrate the operation mode of the converter of Figure 3. According to the invention, multiple regulated voltages are generated by a soft-switched converter operating with a secondary side current resonance. The resonant current on the second side is used to charge a capacitor disposed between the terminals of a first output that supplies a first regulated voltage. The other regulated voltages they are generated by means of post-regulation connected to the eerminales of the secondary coil of the converter. The invention will be described through two exemplary embodiments shown in Figures 1 and 3. Of course, these two modalities are given merely by way of example modalities. The proposed post-regulation circuit can be connected to any type of soft-switched converter that operates with a current resonance on the secondary side. In both modes, the converter supplies a regulated Vs1 main volume and a posi-regulated Vs2 volume. With reference to Figure 1, the converter comprises an isolation transformer Trf with a half-bridge arrangement on the primary side and a quasi-resonant circuit with half-wave rectification on the secondary side. More precisely, the primary circuit comprises a semi-bridge circuit with two switches T1 and T2 arranged in series between the terminals of a voltage generator SV which supplies the input voltage Ve. Switches T1 and T2 are conventionally MOSFET transistors. The midpoint of the half-bridge circuit is connected to a first end corresponding to the pin with the primary winding point Lp of the transformer Trf. The other end corresponding to the spike without point of the primary winding Lp is connected, via a capacitor Cdp having a high capacitance, to that terminal of the generator SV connected to the switch T2. Switches T1 and T2 are operated by the control signals Drv1 and Drv2 generated on the basis of a pulse width modulation circuit as a function of the output voltage Vs1 and the ratio m between the number of turns secondary def and the primary of the transformer Trf. The non-point spike of the secondary winding Ls of the transformer Trf is connected by an inductance Lf and a rectification diode D1, with a first end of a resonant capacitor Cr1, the other end of this capacitor is connected to the spike with a point of the secondary winding Ls. The inductance Lf which corresponds to the leakage inductance of the transformer Trf reflected to the secondary side is possibly supplemented with an additional inductance. A leveling inductance L1 is connected between the junction of the inductance Lf-capacitor Cr1 and one end of the capacitor Cs1 placed between the terminals of a first output of the converter that supplies the voltage Vs1. The other end of the capacitor Cs1 is connected to the pin with the secondary winding point Ls. The function of the inductance L1 is to level the current supplied by the output that supplies the voltage Vs1. A bridge of resistors R1, R2 arranged between the terminals of this output is contemplated to provide a pulse width modulation control block PWM1 with a voltage representative voltage Vs1. This conirol block is of known structure and supplies the control signals Drv1 and Drv2. The structure of such a block is described, for example, in Patent Application No. FR 2 738 417.

The manner of operation of this part of the converter is well known to those skilled in the art. It is described in particular in Patent Application No. FR 2 738 417. The control signals Drv1 and Drv2 for switches T1 and T2 are closed one after the other. A dead time is contemplated between the alternate performances of these switches so that the transistors are in an open state twice during the operation cycle of these two signals. The switch-on ratio of switches T1 and T2 defines the output voltage Vs1. The manner of operation of this part of the converter is described later in detail with reference to Figures 2A to 2H. To generate the voltage Vs2 on the basis of the voltage Vs1, post-regulation means are connected to the terminals of the series inductance formed of the secondary winding Ls and the leakage inductance Lf. The inductance Lf-diode D1 is connected by a rectifier diode D2 with a first end of an inductor Lr, the other end of the inductance Lr is connected to a first end of a charge capacitor Cs2 via a switch T3. The switch T3, which is conventionally a MOSFET transistor, is controlled to delay the occurrence of a current in the inductance Lr. The outer shell of the capacitor Cs2 is connected to the spike with the secondary winding point Ls. When the T3 switch is closed, the voltage across the terminals of the inductance Lr is positive. The current that crosses the inductance Lr increases until the voltage on the primary side is inverted. During the next period, switch T3 is open when current ILr reaches zero. This current, decreased by the average current used by the load, ensures regulation of the average voltage Vs2 across the capacitor terminals Cs2 compared to the desired output Vs2 value. The value of this voltage is handled directly by the phase delay supervision of the switch T3. A resistor bridge R3, disposed between the terminals of this output is contemplated to provide a control block PWM2 with a voltage representative of the voltage Vs2. This block is responsible for producing the control signal for transistor T3. This signal is active for part of the time of the current resonance of the secondary side of the converter. The PWM2 conirol block essentially consists of an INT ingratiator circuit that provides a representative v ally of the average difference between the measured value and the desired regulated value for V s2, a RAMP circuit for generating a voltage ramp synchronized with the current crossing Ls, a comparator circuit COMP for comparing the voltage ramp and the output voltage of the in ivering circuit, a power conducting circuit D for supplying a current sufficient to charge the gate of transistor T3 and a circle of voltage displacement formed of a capacitor C3 and a diode D3. The INT integrator circuit receives as input the voltage VI present at the mid point of the bridge R3, R4 of resistor and a reference voltage VREF. The voltage V1 is applied to the positive input of a differential amplifier AE and the voltage VREF is applied to the negative input of the amplifier AE via a resistor R5. The negative enlrada and the output of the amplifier AE are connected by a capacitor C1 of taf way so as to obtain an integrating monia and supply a voltage Vint representative of the average difference between the measured value and the desired regulated value for Vs2. Additionally, the ramp circuit RAMP comprises two diodes D4, D5 and a resistor R6 which are arranged in series between the earth and the inductance link Lf-diode D2. The two diodes D4 and D5 are oriented to allow a current to flow to the inductance Lf-diode D2 when they are turned on. The junction between the two diodes D4 and D5 is connected to a first end of a capacitor C2 via a diode D6 in series with a resistor R7. The other end of capacitor C2 is connected to ground. The diode D6 is oriented to allow a current to discharge the capacitor C2. Finally, a resistor R8 is connected between a supply terminal Vcc and the resistor connection R7-capacitor for charging capacitor C2 when diode D6 is off. This ramp generator operates in the following way: when the voltage at the LF-diode inductance link D1 is positive, diodes D4, D5 and D6 are damped and the capacitor is charged with a current provided by resistor R8 which determines the positive slope of the ramp and when the voltage at the inductance Lf-diode D1 is negative, the capacitor is discharged by means of D6 and D7, the resistor R7 deferred the negative slope of the ramp. Volíje Viní supplied by the integrating circuit INT is compared to the voltage ramp generated by the RAMP circuit by means of the COMP comparator circuit and the latter is supplied with a high level volcanic signal if VC2 > Vint and a low-level voie signal in another way. This output signal is amplified by the conductive circuit D to check the transistor T3. A capacitor C3 is inserted between the output of the conductive circuit D and the gate of the transistor T3 to displace the voltage level applied to the gate of the transistor T3 so that it is last greater than that of the transistor source. This capacitor is charged to the voltage Vs2 via the diode D3 connected between the source and the gate of the transistor T3 when the output of the conductor D is in the low state. The general manner of operation of the circuit was shown in Figures 2A to 2H. Figures 2A and 2B illustrate the shape of the conirol signals Drv1 and Drv2 for the switches T1 and T2. Figure 2C represents the variations of the voltage V? _s through the terminals of the secondary winding Ls. Figure 2D represents the current lD? which crosses the diode D1. Figures 2E and 2F represent particularly the control signal of transistor T3 and the current flowing through the inductance Lr. Figures 2G and 2H represent the currents Is and Ip that respectively cross the winding Ls and the winding Lp. The current that crosses Ls is the sum of the currents the diode D1 and the inductance Lr. In these Figures, T represents the period of the opening / closing cycle of the switches T1 and T2. A dead time tm during which the two switches T1 and T2 are open is contemplated between each switch closure. A first dead time tm1 is set before the closing of the switch T1 and a second dead time m2m2 is set up after the closing of the switch T2. Switch T1 is closed for the time period [tm1, aT] and switch T2 is closed for the time period [aT + tm2, T]. During the rest of the time, they are open. In general, the opening of the switches T1 and T2 is carried out while the current on the primary side (which results from the magnetization current and the secondary current Ls reflected to the primary side) naturally generates the transitions of the primary voltage before that one of the transitions comes to close with a zero voltage between its terminals. Esío creates a smooth switching of the switches and consequently a reduction of the losses due to commutation.

During the time [tm1, aT], the switch T1 is closed. The Ve voltage is applied to the primary windings and capacitor Cdp. The diode D1 is then turned off. Ip flows through the primary winding Lp (= the magnetizing current flowing through the winding Lp of the transformer Trf generated by the application of the voltage Ve through the terminals of the primary winding Lp and the capacitor Cdp and increased by the current average output reflected to the primary side in the ratio m between the number of turns of the secondary and primary) increases to a maximum value that is reached in time aT. The switch T1 is then opened, the T2 switch is still open. The current Ip is significantly significant at this junction to cause the voltage across the terminals of the switch T2 to drop naturally and hence to ensure smooth switching at zero voltage with the closure of the switch T2. The switch T2 is closed subsequently after the dead time lm2. The leakage inductance Lf subsequently starts resonating with the capacitor Cr1. A current I DI resonanfe then flows through the diode D1. The Ip current through the primary winding then begins its decay following a sinusoid in phase opposition to that of current i. This decay is emphasized by the inductive circuit current reflected to the primary side. At the opening of the switch T2, the corridor Ip is sufficiently high to decrease the voltage at the terminals of the switch T1 and thus ensure smooth switching at zero voltage. The switch T1 closes again to start a new operating cycle again. During the conduction phase of the switch T2, the switch T3 is controlled to delay the appearance of a current in the inductance Lf and thus generate a voltage Vs2 smaller than Vs1. The transistor T3 is closed at a time t2 subsequent to aT. A positive voltage is applied to the terminals of the inductance which is therefore traversed by a rising current ILr proposed to charge the load capacitor Cs2. This increment in the current is interrupted when the voltage across the terminals of Ls is reversed, that is, when the switch T2 is open and the switch T1 is closed on the primary side. The current ILr falls very quickly since the inductance Lr is subjected to a very large negative voltage. Switch T3 is then opened when the current ILr has become zero. A regulated voltage Vs2 is thus obtained through the capacitor terminals Cs2. The post-regulation is very easy to achieve since the T3 switch is subject to very weak voltages, since it is closed as operated at zero current. The regulation of the output Vs2 is synchronous with the main converter. A second mode is proposed in Figure 3. It is related to a converter that can operate in mode zero current or in secondary current mode interrupted during switching of the switches. The diagram of the converter of Figure 3 differs from that of Figure 1 both by the position of the resonant components and possibly by their mode of operation. In the circuit of Figure 1, the leakage inductance Lf of the transformer Trf reflected to the secondary side resonates with the capacitor Cr1 of low value. In the circuit of Figure 3, the leakage inductance Lf resonates with a capacitor Cr positioned in place of the capacitor Cdp on the primary side of the converter. The leakage inductance Lf resonates with the capacitor Cr reflected to the secondary side. The capacitors Cr1 and Cdp are removed and since there is no resonant capacitor on the secondary side, the leveling inductance L1 is not relevant. The remainder of the diagram of Figure 3 is identical to that of Figure 1. It is possible to operate this converter in the same manner as that of Figure 1, ie by switching switches T1 and T2, the current Ip naturally generates the transitions of the primary vol. However, according to a blown operation mode, switch T2 is open while current lD? it is not zero, which helps to improve the soft switching in tm2 without considering the output power. Therefore, provision is made in this mode to interrupt the circuit generated by VS1. In addition, the means of post-regulation to generate the additional regulated vortex operates in the same manner as in the monaage of Figure 1. The manner of operation of the converter of Figure 3 according to the preferred embodiment described above is illustrated by Figures 4A to 4H. Figures 4A and 4B, identical to Figures 2A and 2B, illustrate the shape of the control signals Drv1 and Drv2 for the switches T1 and T2. Figure 4C, identical to Figure 2C, represented the variations of the VLS voltage across the terminals of the secondary winding Ls. Figure 4D represented the current I D-I crossing the diode D1. Figure 4E represents the control signal Drv3 for switch T3. Figure 4F represents the stream ILr which crosses the inductance Lr. Figure 4G represented the current Is crossing the secondary winding Ls and Figure 4H represented the current Ip crossing the primary winding Lp. This converter operates in general in the same way as the converter of Figure 1, except for the fact that the T2 switch is open while the current is being dialed. It is not zero. From the point of view of post-regulation, this converter has the same advantages as that of Figure 1. Another mode of operation is to connect the inductive circuit (Lr, D2, T3) not to the resonanie circuit used by Lf, but to a parfe of the secondary winding Ls, notably when Vs2 is very low versus Vs1, or to a secondary isolated parabolic winding.

Claims (9)

1. CLAIMS 1. DC voltage converter with soft switching, comprising a transformer that has a primary winding and a secondary winding, the primary side of the converter is of the type with semi-bridge arrangement and capable of being connected to a power source of enirade via two switches and the secondary side of the converter is a quasi-resonant half-wave type and capable of providing at least a first DC voltage at one charge and a second DC voltage at a second charge, the second voltage of DC is smaller than the first DC voltage, first control means for alternately controlling the two switches, at a fixed frequency, by pulse width modulation as a function of the first DC output, characterized in that it comprises a resonant circuit for create a resonant wave half wave in the secondary winding and load a first capacitor connected to the terminals of the first load to produce the first volt DC link, and because it also comprises an inductive circuit connected between the secondary winding and a second capacitor connected to the terminals of the second load, the inductive circuit can generate a current to charge the second capacitor during a part of the half wave of the resonant current flowing in the secondary winding and producing the second DC voltage.
2. 2. A converter according to claim 1, wherein the inductive circuit more particularly comprises a first rectifying diode in series with a first inductance and a third switch, the third switch being closed during a part of the half wave of the resonant current flowing in the secondary winding.
3. 3. A converter according to claim 2, wherein second confrol means is designed to confrolate the commutator by modulation of the pulse width as a function of the second DC output.
4. 4. Convergent according to any of claims 1 to 3, wherein the resonant circuit comprises a second rectifying diode arranged in series with a second inductance and a resonant capacitor, the assembly is connected between the terminals of the secondary winding of the transformer, and wherein the The first capacitor is connected to the terminals of the resonance capacitor via a leveling inductance.
5. 5. Converter according to claim 4, wherein the second inductance is the leakage inductance of the transformer reflected to the secondary side.
6. 6. Converter according to claim 5, wherein the second inductance is the series inductance formed of the leakage inductance of the transformer reflected to the secondary side and of an additional inductance disposed between the secondary winding and the second load.
7. 7. Converter according to any of claims 1 to 3, wherein the resonant circuit comprises a second rectification diode arranged in series with a second inductance between the secondary winding and the first capacitor, and a capacitor disposed in series with the primary winding which, reflected On the secondary side, it is proposed to resonate with the second inductance.
8. 8. Converter according to claim 7, wherein the second inductance is the leakage inductance of the transformer reflected to the secunda side.
9. 9. The converter according to claim 8, wherein the second inductance is the series inductance formed of the leakage inductance of the transformer reflected to the secondary side and of an additional inductance disposed between the secondary winding and the charge bore. (claim that is going to be added for the last modality)