MXPA01006283A - Blanked dynamic focus power supply transient elimination - Google Patents

Blanked dynamic focus power supply transient elimination

Info

Publication number
MXPA01006283A
MXPA01006283A MXPA/A/2001/006283A MXPA01006283A MXPA01006283A MX PA01006283 A MXPA01006283 A MX PA01006283A MX PA01006283 A MXPA01006283 A MX PA01006283A MX PA01006283 A MXPA01006283 A MX PA01006283A
Authority
MX
Mexico
Prior art keywords
transistor
voltage
current
during
amplifier
Prior art date
Application number
MXPA/A/2001/006283A
Other languages
Spanish (es)
Inventor
Barrett George John
Original Assignee
Barrett George John
Thomson Licensing Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Barrett George John, Thomson Licensing Sa filed Critical Barrett George John
Publication of MXPA01006283A publication Critical patent/MXPA01006283A/en

Links

Abstract

In order to accurately measure a low current bias in an automatic kine bias (AKB) circuit during several video lines that immediately follow vertical retrace, dynamic focus is interrupted by deactivating a dynamic focus voltage amplifier. The amplifier draws its power from a horizontal flyback transformer. In order to avoid a horizontal transient which may occur when the dynamic focus voltage amplifier isreactivated after being deactivated during a vertical blanking interval, the dynamic focus amplifier draws a current during vertical blanking which approximates the average current drawn during vertical scan.

Description

TRANSIENT ELIMINATION OF THE POWER SUPPLY OF A DYNAMIC FOCUS AND LOCKED The invention relates to an arrangement for correcting the focus of the incidence of a beam.
BACKGROUND OF THE INVENTION An image that is deployed in a cathode ray tube (CRT) may suffer from imperfections or distortions such as the blurring that is incident with the beam scan in the CRT. These imperfections or distortions occur because the distance from the electron gun of the CRT to the clamping plate varies markedly as the beam deviates, for example, in the horizontal direction. The focus reduction that occurs as the beam is deflected in the horizontal direction, for example, can be obtained by developing a dynamic focusing voltage that has a parabolic voltage component in the horizontal relationship and by applying the dynamic focus voltage to a Focus electrode of the CRT to dynamically vary the focusing voltage. It is known to derive the voltage component in the horizontal relationship from an S-correction developed in a Sen-shaped capacitor to an output stage of the horizontal deflection. The CRT that employs dynamic focus can have internal wiring that places the dynamic focusing voltage near, for example, the blue electron gun. During normal operation, the proximity of the blue electron gun will probably not cause any problems.
However, when a low current bias measurement is made in an automatic kinematic polarization circuit (AKB), several times of the video line, which immediately follows the vertical retrace, referred to as the AKB measurement range, the parasitic coupling of the horizontal component of the dynamic focusing voltage can introduce an error in the polarization of the cathode electrode of the blue electron gun. As a result, the polarization of the blue electron gun probably does not track the polarization of the green and red electron guns. This can lead to unacceptable changes in background color temperature. It may be desirable to remove the horizontal dynamic focus voltage component from the focusing electrode during the AKB measurement range. In this way, undesirable coupling with the focusing electrode is advantageously eliminated. During the AKB measurement interval, the focus voltage value can be displaced, due to the removal of the dynamic focus voltage component. After the completion of the AKB measurement range, a significant transient of the focusing voltage may occur when the focusing voltage returns to its appropriate value. Also, it may be desirable to point out the problem of image distortion that occurs when the high-voltage dynamic focus amplifier is energized with a power supply derived from the deflection, especially when the horizontal frequency is a multiplicity of normal horizontal broadcast frequency. . The dynamic focus signal is amplified at very high peak-to-peak voltages. He amplifier doing this work uses more power when operating at a high frequency such as horizontal deflection frequencies greater than 30 kHz, such as those used for multimedia and H DTV, than when operating at a relatively low frequency of 1 5 kHz which is used in conventional television. When the high frequency variations are suspended during vertical blocking, the current drawn by the amplifier is reduced considerably. This causes a load transient in the power source. If the power source also provides the scanning deflection for the image tube, as is often convenient, this load transient may cause a distortion in the image, such as an oscillation in the width modulation, which appears as ripples in the lines verticals at the top of the image.
BRIEF DESCRIPTION OF THE INVENTION The problems of changes in the deflection load can be solved by designing the amplifier to draw approximately the same current average during vertical blocking, which is dragged during normal dynamic focus operation. This strategy eliminates the undesirable transient in the deflection current.
BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 A and 1 B illustrate a horizontal deflection circuit output stage and a blocked dynamic focus power supply in accordance with a novel feature.
DESCRIPTION OF THE PREFERRED MODALITIES Figure 1A illustrates a horizontal deflection circuit output stage 1 01 of a television receiver having a multi-scan frequency capability. The stage 101 is energized by a supply 1 00 of regulated power A that generates a supply voltage B +. A conventional conductor stage 1 03 responds to an input signal 107a at the selected horizontal scanning frequency nfH. The driver stage 1 03 generates a control conductor signal 1 03 a for controlling the operation of a switching switching transistor 1 04 of the output stage 1 01. By way of example, a value of n = 1 may represent the horizontal frequency of a television signal according to a given standard, such as the broadcast standard. The collector of transistor 104 is coupled with a terminal TOA of a primary coil TOW1 of a return transformer TO. The collector of transistor 1 04 is also coupled with a non-switched retrace capacitor 105. The collector of transistor 1 04 is additionally coupled with a horizontal deflection coil LY to form a resonant retrace circuit. The collector of transistor 1 04 is also coupled with a conventional damper diode 108. The LY coil is coupled in series with a linearity inductor LIN and with a non-switched trace or capacitor-S CS 1. The capacitor CS1 is coupled between a terminal 25 and a reference potential or ground GND in such a way that the terminal 25 is interposed between the inductor LI N and the capacitor-S CS 1.
The output stage 101 is ca to produce an i and deflection current. The deflexirXt current has essentially the same predetermined amplitude for cu & Her selected frequency of horizontal scan of signal 10 -. selected from a range of 2f. a 2.4f. , and for a selected horizontal frequency of 1 fH. It is possible to control the amplitude of the corp. -nfe ¡and of deflection by automatically increasing the voltage B + when the horizontal frequency increases and vice versa, in order to also maintain the constant amplitude of the current i and of deflection. The B + voltage is controlled by a conventional regulated power supply 100 operating in a closed circuit configuration by means of a TOWO feedback coil of the TO transformer. The magnitude of the voltage B + is established, in accordance with a rectified feedback feedback pulse signal FB having a magnitude which is indicative of the amplitude of the current iy. A parabolic E-W signal of the vertical relationship is generated in a conventional manner, not shown. The signal E-W is coupled in a conventional manner with the power supply 1 00 to produce a vertical ratio parabola component of the voltage B + to provide the correction of the east-west distortion. A switching circuit 60 is used to correct a beam incidence error such as linearity. The circuit 60 is selectively coupled with none, one or both of a trace or capacitor CS2 and a trace and with a trace or capacitor-S CS3 in parallel with the trace capacitor CS 1. The selective coupling is determined as a function of the frequency range, from which the horizontal scout frequency. In the switching circuit 60, the capacitor CS2 is collected between the terminal 25 and a drain electrode of a switch Q20 of a field effect transistor (FET). A source electrode of transistor Q20 is coupled with terrestrial GND. A protective resistor R20 which prevents excessive voltage through transistor Q20 is coupled through transistor Q20. A register 201 applies switching control signals 60a and 60b. The control signal 60a is coupled by means of a memory 98 with a gate electrode of the transistor Q20. When the control signal 60a is on a selectable first level, the transistor Q20 is turned off. On the other hand, when the control signal 60a is at a second selectable level, the transistor Q20 is turned on. The memory 98 provides the required level offset of the signal 60a to effect the aforementioned switching operation in a conventional manner. In the switching circuit 60, the capacitor CS3 is coupled between the terminal 25 and the drain electrode of a FET switch Q20 '. The FET switch Q20 'is controlled by the signal 60b in a similar manner in which the FET switch Q20 is controlled by the control signal 60a. In this way, the memory 98 'performs a function similar to that of the memory 98. A microprocessor 208 responds to a data signal 209b generated in a converter 209 of data-frequency signals. The signal 209b has a numerical value co which is indicative of the frequency of a HORZ-SYNC synchronizing signal or deflection current iy. He converter 209 includes, for example, a counter that counts the number of clock pulses, during a given period of HORZ-SYNC signal and generates a word signal 209a, according to the number of clock pulses occurring in the determined period. The microprocessor 208 generates a data control signal 208a which is coupled to an input of the register 201. The value of the signal 208a is determined according to the horizontal relationship of the HORZ-SYNC signal. The register 201 generates, in accordance with the data signal 208a, control signals 60a and 60b at levels determined by the signal 208a, according to the frequency of the HORZ-SYNC signal. Alternatively, the value of the signal 208a can be determined by means of a signal 109b that is provided by a keyboard, not shown. When the frequency of the horizontal deflection current iy is 1 fH, the transistors Q20 and Q20 'are turned on. The result is that both S-capacitors CS2 and CS3 are in the S-capacitor circuit which are coupled in parallel with a non-switched S-capacitor CS 1 and establish a maximum S-capacitance value. When the frequency of horizontal current i and horizontal deflection is equal to or greater than 2fH and less than 2.14fH, transistor Q20 is turned off and transistor Q20 'is turned on. The result is that capacitor-S CS2 is decoupled from capacitor-S CS1 not switched and capacitor-S CS3 is coupled to capacitor-S CS 1 to establish an intermediate value of capacitance-S. When the frequency of horizontal current i and horizontal deflection is equal to or greater than 2. 14 fH, transistors Q20 and Q20'are turned off. The result is that the S-capacitors CS2 and CS3 are decoupled from the capacitor-S CS 1 not switched and establish a minimum value of capacitance-S. Current i and deflection in capacitor CS1, CS2 or CS3 produces an S-shaped parabolic voltage V5. The total retrace capacitance formed by a capacitor 105 does not change at the different scanning frequencies. Therefore, the retrace interval has the same length at the different scanning frequencies. The values of the capacitors CS 1, CS 2 and CS 3 are selected to produce the parabolic voltage V 5 at the different amplitudes at the various scanning frequencies. The different amplitudes of voltage V5 are required because the length of the retrace interval is constant. In Figure 1 B, a transistor Q1 and a transistor Q2 are coupled to each other to form a differential input stage. These transistors have a very high collector current for the base current referred to as beta, to increase the input impedance at the base of transistor Q 1. The junction-voltages of the emitter-base of the transistors Q1 and Q2 compensate each other and reduce the displacement of polarization of direct current with changes in temperature. The resistor R 1 5 and the resistor R16 form a voltage divider that is applied to a supply voltage 12V-D at + 1 2V to bias the base voltage of the transistor Q2 by approximately + 3V. The value of an emitting resistor R1 that couples with the emitters of the transistors Q 1 and Q 2 is selected to drive a maximum current of about 6 mA. This protects a high voltage Q4 transistor. The transistor Q4 is coupled to the transistor Q 1 by means of a transistor Q3 which operates as a switch. The transistor Q4 is coupled to the transistor Q 1 by the transistor Q3 in a coarse configuration. Transistor Q4 needs to be protected from being over-powered because transistor Q4 can tolerate only about 1.0 mA of collector current. This is achieved because the amplifier has a high transconductivity in a collector current of approximately 6mA, and a low transconductivity of approximately 6mA. The cubic configuration of the transistors Q4, Q3 and Q1 isolates the Miller capacitance, not shown, through the collector-base junction of transistor Q4; In this way, the bandwidth is increased. The cubic configuration also makes the gain amplifier independent of the low beta of the high voltage transistor Q4. A coil TOW3 of the transformer TO of Figure 1 A produces a stepped retrace voltage which is rectified in a diode D4 and filtered in a capacitor C5 to produce a supply voltage of approximately 1 500 volts, to energize the focus voltage generator dynamic of Figure 1 B. An active transistor Q5 has a collector coupled with the supply voltage. A drag base resistor R4 of transistor Q5 is coupled with the supply voltage. A diode D 1 is coupled between the collector of transistor Q4 and the emitter of transistor Q5. A capacitance C 1 represents the sum of the parasitic capacitance of the focusing electrode and the wiring not shown. The active transistor Q5 is capable of creating a current from its emitter to charge the capacitance C 1 for a raft. The descending Q4 transistor is capable to decrease current by means of a diode D 1 from the capacitance C 1. Advantageously, the active upwash array is used to obtain fast response time with low power dissipation. The dynamic amplifier uses distributor feedback for the output in the emitter of the transistor Q5 by means of a feedback resistor R5. A periodic control signal V_LOCK is in a HIGH state, during vertical blocking and during, for example, four times of video line following vertical blocking, referred to as the measurement interval AKB, not shown. The V_BLOCK signal is delayed by a delay circuit, (not shown), which delays a conventional vertical blocking signal B_BLOQU EO by an appropriate number of video line times, such as four times. The delayed signal is coupled to the base of a commutator transistor Q7. The collector of transistor Q7 is coupled to the base of transistor Q3. During vertical blocking and during the measurement interval AKB, transistor Q3 is turned off by transistor Q7. The class B amplifier shown in Figure 1 B incorporates one aspect of the invention. Typically, this type of amplifier uses the separated transistors, the upstream transistor Q5 and the downstream transistor Q4 to alternately charge and discharge a capacity load, to the focus electrode 1 7 of a CRT 1 0. Load capacity is shown as capacitor C 1. A voltage drop in the resistor R4 can then be chosen in such a way that a desirable output voltage, near the maximum peak of The normal dynamic focus waveform is maintained during vertical blocking. Unfortunately, the current that is required to do this, with a value of 1 Meg of resistor R4 is very small, and is much lower than the average current drawn by the amplifier during normal dynamic focus operation. It is desired that it be made to the current, during vertical blocking, approximately equal to the average current drawn during the normal operation of dynamic focus. To achieve this objective and to maintain a focus output voltage approximately equal to the positive peak of the normal dynamic focus waveform, it is necessary to turn on the transistor Q5 during vertical blocking. For example, if the fundamental focus parabola frequency at the output, H-PARAB-I N, is 31 kHz, then the average current during normal dynamic focus operation could be, for example, 2 mA. Therefore, 2 mA will need to be dragged during vertical blocking in order to make the power supply load consistent and free of transients. However, with the non-conductive transistor Q5, as would happen if the transistor in the photocoupler PC 1, Q-PC 1, were turned on, as it is in normal dynamic focusing operation, then 2 mA would cause a voltage drop of about 2 kV through a resistor R4 with an upward drag of 1 meg ohm. Because only 1500 V is available, the current source transistor Q4 will become saturated and the focus output will be close to 1 2 volts during vertical lock.
The vertical blocking conductor is a positive continuous pulse of 5 volts or greater that appears during the vertical retrace time at the V_BLOCK input and turns on the transistor Q7. Normally, the light emitting diode in the photocoupler PC 1, DPC 1, is conducting approximately 1 5 mA of the supply 12 V V4 through the resistors R8 and R6. This current provides a flow of light to keep driving transistor Q-PC1. When the transistor Q7 conducts, this current is distributed outside the diode D-PC1 inside the diode D3 and the transistor Q7. This method of switching keeps the current through resistors R6 and R8 close to constant so that the voltage drop across the resistor R8 does not change significantly during the vertical retrace. A change in the voltage drop across R8 would also alter the 3V_REF derived from the divider of resistors R1 5 and R1 6. This 3V_REF regulates the amplitude of supply 1 2V-D. The conduction of transistor Q7 also causes transistor Q3 to turn off by forcing its base voltage to near ground. The emitter of transistor Q3 is supported approximately 3 volts by the direct conduction of the base junction of the collector of transistor Q 1 and by the charge in coupling capacitor C2. At the junction of the emitter of transistor Q4, the collector of transistor Q3 and resistor R2, the voltage is supported by approximately 1 1 volts because the base current of Q4 is small and causes very little voltage drop across resistor R1 1. Transistor Q6 is off for other scanning modes other than the conventional 1 5 kHz TV broadcast. During the vertical lock, Q3 serves to disconnect the normal feedback gain control circuit of the focusing amplifier consisting of R5, R3, R1, Q1 and Q2. The current through resistor R2 and Q7 to ground is replaced. Simultaneously, transistor Q-PC1 turns off to allow transistor Q5 to turn on. The focus output is dragged 1 500 V with 2 mA as required to avoid transients. For horizontal scanning frequencies in the range of 31 kHz to 38 kHz, the average current of the amplifier changes. However, a value of the resistor R2 is sufficient to minimize the transients to an acceptable level. At the conventional 1 5 kHz television scan frequency, the power of the amplifier and the average current are about half in this mode, the transistor Q6 turns on and reduces the voltage at the base of the transistor Q4 about half of its previous value. This action reduces the current in resistor R2 so that the average current of the amplifier equals this scanning frequency.

Claims (8)

  1. CLAIMS 1. A video image apparatus comprising: a cathode ray tube including a focusing electrode; a source of an input signal for the correction of the focusing voltage; a deflection circuit; an amplifier energized from the deflection circuit having a first input responsive to the input signal for correction of the focusing voltage to generate at an output of the amplifier, a dynamic focus voltage component of a focusing voltage that is collected with the focusing electrode; a first semiconductor switch that responds to a periodic control signal and which couples with a signal path of the input signal for the correction of the focusing voltage to disable the dynamic focusing voltage component, during an automatic measurement interval of kinematic polarization of a deflection cycle; and means responsive to the first semiconductor switch to control the current drawn by the amplifier from the deflection circuit during the automatic kinematic polarization measurement interval.
  2. 2. The apparatus according to claim 1, wherein the means for controlling the current drawn by the amplifier they comprise a resistor coupled in the path of the current drawn by the amplifier.
  3. 3. The apparatus according to claim 2, wherein the amplifier comprises a first transistor and a second transistor having their main current conducting paths coupled with the focusing electrode, both transistors being conductive during the automatic kinematic polarization measuring interval.
  4. 4. The apparatus according to claim 3. comprising means for coupling the resistor with a voltage reference during the automatic kinematic polarization measurement interval.
  5. 5. The video image apparatus comprising: a cathode ray tube including a focusing electrode; an input signal source for focus correction; a first transistor which responds to the input signal and which is coupled with the focusing electrode to supply current in a first direction by forming an active drive arrangement; a second transistor which responds to the input signal and which is coupled with the focusing electrode to supply current in an opposite direction when forming a downward active arrangement; the first and second transistors develop a dynamic focusing voltage at the focusing electrode; a source of periodic signal blocking focus voltage, and; means responsive to the blocking signal to maintain the conduction of the first transistor during focus voltage blocking.
  6. 6. The apparatus according to claim 5, comprising means responsive to the blocking signal to maintain the conduction of the second transistor during focus voltage blocking.
  7. 7. The apparatus according to claim 6, comprising a resistor coupled in the path of the main current conduction of the second transistor to control the current therein, during focus voltage blocking.
  8. 8. The apparatus according to claim 6, comprising a resistor coupled in the path of the main current conduction of the first and second transistors to control the current therein, during the focusing voltage lock.
MXPA/A/2001/006283A 1998-12-21 2001-06-19 Blanked dynamic focus power supply transient elimination MXPA01006283A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60/113,049 1998-12-21
US09343737 1999-06-30

Publications (1)

Publication Number Publication Date
MXPA01006283A true MXPA01006283A (en) 2001-12-13

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