MXPA00005619A - Programmable linear receiver - Google Patents

Abstract

A programmable linear receiver (1200) which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non-linearity in the ouput signal from the receiver (1200). The amount of non-linearity can be measured by the RSSI slope or energy-per-chip-to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver (1200) is measured. The ouput signal comprises the desired signal and intermodulation products from non-linearity within the receiver (1200). When the receiver (1200) is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver (1200) transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation due to non-linearity can be determined. This information is then used to adjust the IIP3 operating point of the amplifiers (1234) and mixer (1230) to provide the requisite level of performance while minimizing power consumption.

Description

PROGRAMMABLE LINEAR RECEIVER BACKGROUND OF THE INVENTION I. FIELD OF THE INVENTION The present invention relates to communications. More particularly, the present invention relates to a novel and improved programmable linear receiver.

II. Description of the Related Art The design of a high performance receiver is done in defiance of the various design limitations. First, in many applications, high performance is required. High performance can be described by the linearity of the active devices (eg, amplifiers, mixers, etc.) and the noise factor of the receiver. Secondly, for some applications, such as, in a cellular communication system, the consumption of energy or energy is an important consideration, due to the portable nature of the receiver. In general, high performance and high efficiency are conflicting or conflicting design considerations. An active device has the following transfer function: y (?) = Aa x + a5 + a3 + higher order terms (1) where x is the input signal, and (x) is the output signal and ai, a2 and a3 are coefficients that define the linearity of the active device. For simplicity, higher-order terms were ignored (for example, terms above the third order). For an ideal active device, the coefficients a2 and a3 are 0.0 and the output signal is simply the input signal scaled by ai. However, all active devices experience a certain amount of non-linearity, which is quantified by the coefficients a2 and a3. The coefficient a2 defines the quantity of non-linearity of the second order and the coefficient a3 defines the quantity of non-linearity of the third order. Most communication systems are narrow-band systems that operate on an incoming RF signal having a predetermined bandwidth and a central frequency. The input RF signal usually comprises other spurious signals located throughout the frequency spectrum. The non-linearity within the active devices causes the intermodulation of the spurious signals, resulting in products that may fall in the signal band. The effect of second-order linearity (for example, that caused by the term x2) can usually be reduced or eliminated by careful design methodology. The non-linearity of second order produces' products in the sum and in the difference of frequencies. Normally, spurious signals that can produce second-order products within the band are located far away from the signal band and can easily be filtered. However, non-linearity of the third order is more problematic. For non-linearity of third order, the spurious signals x gx • cos (wit) + g2 * cos (w2t) provide products in the frequencies (2w? -w2) and (2wj-?). In this way, spurious signals close to the band (which are difficult to filter) can produce third order intermodulation products that fall within the band, causing the degradation of the received signal. To complicate the problem, the amplitude of the third-order products are scaled by g? # G22-yg? 2 # 9'2- Thus, each doubling of the amplitude of the spurious signals produces an eight-fold increase in the breadth of third-order products. In other words, each 1 dB increase in the input RF signal results in 1 dB of increase in the RF output signal but 3 dB increase in the third order products. The linearity of a receiver (or active device) can be characterized by the third order intersection point referred to the input (IIP3). Normally, the output RF signal and the third order intermodulation products are plotted against the input RF signal. As the input RF signal increases, the IIP3 is a theoretical point where the desired output RF signal and the third order products are equal in amplitude. IIP3 is an extrapolated value, because the active device goes into compression before point IIP3 is reached. For a receiver comprising multiple active devices connected in cascade, the IIP3 of the receiver of the first stage of the active device in the nésmo stage can be calculated as follows: + 10 (? V "-IIP3d") l 1 (2) where IIP3n is the point of intersection of third order referred to the input of the first stage of the active device to the stage nés? ma? HP3n-? is the point of intersection of third order referred to the input of the first stage to the stage (n-1) és? ma, Avn is the gain of the stage nés? ma /? iP3dn is the point of intersection of third order referred at the entrance to the nth stage and all terms are given in decibels (dB). The calculation of equation (2) can be done in sequential order for the subsequent stages within the receiver. From equation (2), it can be seen that one way to improve the cascade IIP3 of the receiver is to reduce the gain before the first non-linear active device. However, each active device also generates thermal noise that degrades the quality of the signal. Since the noise level remains at a constant level, the degradation increases as the gain is reduced and the amplitude of the signal is decreased. The amount of degradation can be measured by the noise factor (NF) of the active device that is provided as follows: NFd = SNRi SNRout / (3) where Fd. is the noise data of the active device, SNRin is the signal-to-noise ratio of the input RF signal in the active device, SNRout is the signal-to-noise ratio of the output RF signal from the active device and NFd , SNRn and SNRout are all provided in decibels (dB). For a receiver comprising multiple active devices connected in cascade, the noise factor of the receiver of the first stage of the active device at the nth stage can be calculated as follows: (4) where NFn is the noise factor from the first stage to the nth stage, NFn_? is the noise factor of the first stage at the (n-l) th stage, NF n is the noise factor of the nés? m stage and Gn_? is the cumulative gain of the first stage up to the (n-l) th step in dB. As shown in equation (4), the gain of the active device can affect the noise data of the subsequent stages. Similar to the calculation of IIP3 in equation (2), the calculation of the noise data in equation (4) can be made in sequential order for the subsequent stages of the receiver. The receivers are used for many communication applications, such as cellular communication systems and high definition television (HDTV). Exemplary cellular communication systems include code division multiple access (CDMA) communication systems, time division multiple access (TDMA) communication systems, and analog FM communication systems. The use of CDMA techniques in a multiple access communication system is disclosed in U.S. Patent No. 4,901,307, entitled "SPREAD SPECTRUM MULTIPLE ACCESS COMMUNICATION SYSTEM USING SATELLITE OR TERRESTRIAL REPEATERS" and in U.S. Patent No. 5,103,459, entitled "SYSTEM AND METHOD FOR GENERATING WAVEFORMS IN A CDMA CELLULAR TELEPHONE SYSTEM", both assigned to the assignee of the present invention and incorporated herein by reference. An HDTV system is disclosed, for example, in U.S. Patent No. 5,452,104, U.S. Patent No. 5,107,345, and U.S. Patent No. 5,021,891, all three entitled "ADAPTIVE BLOCK SIZE IMAGE COMPRESSION. METHOD AND SYSTEM "and in U.S. Patent No. 5,576,767, entitled" INTERFRAME VIDEO ENCODING AND DECODING SYSTEM ", these four patents are assigned to the assignee of the present invention and are incorporated by reference herein. In cellular applications, it is common to have more than one communication system operating or operating within the same geographical coverage area. In addition, these systems can operate in the same frequency band or close to it. When this happens, the transmission of one system may cause degradation in the signal received from another system. The CDMA is a stepped spectrum communication system that propagates or scales transmission power to each user over the entire bandwidth of the 1.2288 MHz signal. The spectral response of an FM-based transmission can be more focused on the central frequency. Therefore, FM-based transmission can cause disturbing broadcasts to appear within the assigned CDMA band and very close to the received CDMA signal. In addition, the amplitude of the disturbances can be many times greater than that of the CDMA signal. These disturbances can cause third-order intermodulation products that can degrade the performance of the CDMA system. Normally, to minimize the degradation of life to intermodulation products caused by disturbances, the receiver is designed to have an IIP3. However, the design of a high IIP3 receiver requires that the active devices within the receiver be polarized with a high DC current, thereby consuming large amounts of energy. This design approach is especially undesirable for cellular application, where the receiver is a portable unit and the power is limited. Several techniques have been deployed in the prior art to solve the need for a high IIP3. One of these techniques, which also tries to minimize the energy consumption, is to implement the gain stage with a multitude of amplifiers connected in parallel and selectively enable the amplifiers as needed an upper IIP3. This technique is disclosed in detail in U.S. Patent Application Serial No. 08 / 843,904, entitled "DUAL MODE AMPLIFIER WITH HIGH EFFICIENCY AND HIGH LINEARITY", filed on April 17, 1997, assigned to the assignee hereof. invention and incorporated herein by reference. Another technique is to measure the energy of the received RF signal and adjust the gain of the amplifiers based on the amplitude of the RF signal energy. This technique is disclosed in detail in U.S. Patent Application Serial No. 08 / 723,491, entitled "METHOD AND APPARATUS FOR INCREASING RECEIVER POWER IMMUNITY TO INTERFERENCE", filed on September 30, 1996, assigned to the transferee of the present invention and incorporated by reference herein. These techniques improve the performance of IIP3 but have not effectively reduced energy consumption nor minimized the complexity of the circuit. An exemplary block diagram of a prior art receiver architecture is shown in Figure 1. Within the receiver 1100, the transmitted RF signal is received by the antenna 1112, routed or directed through the duplexer 1114 and supplied to the receiver. Low Noise Amplifier (LNA) 1116. The LNA amplifies the RF signal and supplies the signal to the bandpass filter 1118. The bandpass filter 1118 filters the signal to remove some of the spurious signals that may cause products of intermodulation in the subsequent stages. The filtered signal is supplied to the mixer 1120, which subverts the signal at an intermediate frequency (IF) with the sinewave from the local oscillator 1122. The IF signal is supplied to the bandpass filter 1124 which filters the spurious signals and the products of subconversion before the subsequent stage of subversion. The filtered IF signal is supplied to the automatic gain control amplifier (AGC) 1126 which amplifies the signal with a variable gain to supply an IF signal at the required amplitude. The gain is controlled by a control signal from the AGC control circuit 1128. The IF signal is supplied to the demodulator 1130 which demodulates the signal in accordance with the modulation format used in the transmitter. For digital transmission, such as manipulation by binary phase shift (BPSK), manipulation by displacement of the quaternary phase (QPSK), displacement manipulation of the deviated quaternary phase (OQPSK) and quadrature amplitude modulation (QAM), a digital demodulator is used to provide the digitized baseband data. For FM transmission, an FM demodulator is used to provide the analog signal. The 1100 receiver comprises the basic functionalities required by the majority of the receivers. However, the location of the amplifiers 1116 and 1126, the bandpass filters 1118 and 1124, and the mixer 1120 can be rearranged to optimize receiver performance for a particular application. In this receiver architecture, a high IIP3 is provided by biasing the active devices at high DC bias current and / or by controlling the gain of the amplifier 1126. This receiver architecture has several disadvantages. First, the active devices are usually biased with a high DC current to provide the highest required IIP3. This has the effect of operating the 1100 receiver at the high IIP3 operating point at all times, even though a high IIP3 is not required most of the time. Second, the high IIP3 can be improved by adjusting the gain of the AGC amplifier 1126, as disclosed in the aforementioned U.S. Patent No. 5,099,204. However, reducing the gain of the amplifier 1126 can degrade the noise data of the receiver 1100.

SUMMARY OF THE INVENTION The present invention is a novel and improved programmable linear receiver, which provides the required level of system performance at a reduced "power consumption" In the exemplary embodiment, the receiver comprises an attenuator, at least one amplifier stage of fixed gain, a mixer and a demodulator Each amplifier has a bypass signal path comprising a fixed attenuator and a switch In the exemplary embodiment, the amplifiers and the mixer comprise active devices whose operating point IIP3 can be adjusted individual with bias control signals In the exemplary embodiment the required AGC is provided by the attenuator, amplifiers and fixed attenuators and the demodulator It is an object of the present invention to provide a programmable linear receiver that minimizes consumption of energy based on the non-linearity measured in the receiver output signal. In the exemplary embodiment, the amount of non-linearity is measured by the slope method of the received signal intensity indicator (RSSI). The slope of the RSSI is the ratio of the change in the output signal plus the intermodulation to the change in the input signal. In the exemplary embodiment, the level of the input signal is periodically increased by a predetermined level and the output signal of the receiver is measured. The output signal comprises the desired signal and the intermodulation products of the non-linearity within the receiver. When the receiver is operating linearly, the level of the output signal increases dB for each dB with the level of the input signal. However, as the receiver makes a transition to a non-linear region, the intermodulation products due to non-linearity increase faster than the desired signal. By detecting the slope of the RSSI, the amount of degradation due to non-linearity can be determined. This information is then used to adjust the IIP3 operational point of the amplifiers and the mixer to provide the required level of performance while minimizing the power consumption. The amount of non-linearity can also be estimated by other measurement techniques, such as energy per chip at noise ratio (Ec / Io). It is another object of the present invention to provide a programmable linear receiver that minimizes power consumption based on the mode of operation of the receiver. Each mode of operation, that is, operating mode, the receiver can operate on an input signal that has unique characteristics (eg, CDMA, FM) and each operating mode can have different performance requirements. In the exemplary embodiment, a controller within the receiver is aware of the mode of operation and the associated adjustments of the components within the receiver to provide the required performance. For example, the CDMA mode requires a high operational point IIP3 and the active devices are polarized accordingly, when the receiver is operating in the CDMA mode. In contrast, the FM mode has less stringent linearity requirements and can be polarized at a lower IIP3 operating point while the receiver is operating in FM mode. It is yet another object of the present invention to provide a programmable linear receiver that minimizes power consumption based on the level of the signal measured at various stages within the receiver. The energy detectors can be connected to the output of the selected components to measure the energy level of the signal. The energy measurements are then used to adjust the operational point IIP3 of any component that operates beyond a predetermined non-linearity level.

BRIEF DESCRIPTION OF THE DRAWINGS The features, objects and advantages of the present invention will be more apparent from the detailed description set forth below when considered together with the drawings, in which similar reference characters are identified correspondingly in FIG. all of them and, where: Figure 1 is a block diagram of an exemplary receiver of the prior art; Figure 2 is a block diagram of a programmable linear receiver eg of the present invention; Figure 3 is a block diagram of a programmable linear two-band receiver of the present invention; Figure 4 is a block diagram of a QPSK demodulator eg emplificative which is used within the receivers of the present invention; Figures 5A-5B are schematic diagrams of a discrete design for low noise amplifier (LNA) and the current source used in the receivers of the present invention, respectively; Figures 6A-6B are diagrams of the IIP3 performance against the polarization current of the transistor used in the LNA and the performance curves of the LNA, respectively; Figures 7A-7B are diagrams of the specifications of the two tone and single tone disturbance transmitters for the CDMA signal as defined by IS-98-A, respectively; Figures 8A-8B are diagrams of the AGC control range for raising and lowering the CDMA input power, respectively; Figure 9 is a diagram of a polarization control mechanism IIP3 eg of the present invention; and Figures 10A-10B are diagrams of the polarization control IIP3 for raising and lowering the CDMA input power, respectively.

DETAILED DESCRIPTION OF THE PREFERRED MODALITIES The receiver of the present invention provides the required level of system performance and minimizes energy consumption by controlling the DC polarization of the active devices. The present invention can be practiced using one of the three modalities described below in detail. In the first mode, the amount of non-linearity at the output of the receiver is measured and used to set the operational point IIP3 of the active devices within the receiver, such as the amplifiers and the mixer. In the second embodiment, the operational point IIP3 of the active devices is set according to the expected level of the received signal based on the operating mode of the receiver. And in the third mode, the operative point IIP3 of the active devices is set according to the level of the signal measured in several stages within the receiver. In the present invention, the AGC function is provided by an AGC control circuit which operates in conjunction with a polarization control circuit. The operational point IIP3 of the active devices are set or adjusted in accordance with the measured amount of non-linearity, which depends on the amplitude of the signal. The amplitude of the signal depends, in turn, on the settings or configurations of the gain of the receiver. In the present invention, AGC and polarization control are operated in an integrated manner to provide the level of linearity required in a specified AGC range while minimizing energy consumption.

I, Receiver Architecture In Figure 2 a block diagram of an exemplary receiver architecture of the present invention is shown. Within the receiver 1200, the transmitted RF signal is received by the antenna 1212, routed through the duplexer 1214 and supplied to the attenuator 1216. The attenuator 1216 attenuates the RF signal to supply a signal with the required amplitude and provides the attenuated signal to the RF 1210 processor. Within the RF 1210 processor, the attenuated signal is supplied to the fixed attenuator 1222a and to the amplifier low noise (LNA) 1220a. The LNA 1220a amplifies the RF signal and provides the amplified signal to the bandpass filter 1226. The fixed attenuator 1222a provides a predetermined attenuation level and is connected in series with the switch 1224a. The switch 1224a provides a bypass path around the LNA 1220a when the gain of the LNA 1220a is not necessary. The bandpass filter 1226 filters the signal to eliminate spurious signals that may be caused by intermodulation products in the subsequent steps of signal processing. The filtered signal is supplied to the fixed attenuator 1222b and the low noise amplifier (LNA) 1220b. The LNA 1220b amplifies the filtered signal and supplies the signal to the RF / IF processor 1248. The fixed attenuator 1222b provides a predetermined attenuation level and is connected in series with the switch 1224b. The switch 1224b provides a bypass path around the LNA 1220b when the gain of the LNA 1220b is not needed. Inside the RF / IF 1248 processor, the mixer 1230 subverts the signal at an intermediate frequency (IF) to the sine of the local oscillator (LO) 1228. The IF signal is supplied to the bandpass filter 1232 which filters out the spurious signals and the down-conversion products out of band. In the preferred embodiment, the filtered IF signal is supplied to the voltage control amplifier (VGA) 1234 that amplifies the signal with a variable gain that is adjusted by a gain control signal. The amplifier 1234 can also be implemented as a fixed gain amplifier, depending on the system requirement and this is also within the scope of the present invention. The amplified IF signal is supplied to the demodulator 1250 which demodulates the signal in accordance with the modulation format used by the transmitter (not shown). The RF 1210 processor and the RF / IF 1248 processor are referred to collectively as the front end. In FIG. 4 a block diagram of a demodulator 1250 is described as an emplificative used for the demodulation of quadrature modulated signals (eg, QPSK, OQPSK and QAM). In the exemplary embodiment, the demodulator 1250 is implemented as a subsampling bandpass demodulator. The IF signal is supplied to the analog sigma delta bandpass (S? ADC) 1410 analog to digital converter, which quantizes the signal at a high sampling frequency determined by the CLK signal. An exemplary design of an S? ADC is described in detail in U.S. Application Serial No. 08 / 928,874 entitled "SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER", filed on September 12, 1997 and assigned to the assignee of the present invention. The use of an S? ADC within a receiver is disclosed in copending United States Patent Application Serial No. 08 / 987,306, entitled "RECEIVER WITH SIGMA-DELTA ANALOG-TO-DIGITAL CO. VERTER", filed on December 9, 1997, assigned to the assignee of the present invention and incorporated herein by reference. The quantized signal is supplied to the filter 1412, which filters and eliminates the signal. The filtered signal is supplied to multipliers 1414a and 1414b, which subconvert the signal to the baseband with the in-phase and quadrature sinusoids of the local oscillator (L02) 1420 and the phase shifter 1418, respectively. The phase shifter 1418 supplies 90 ° of phase shift for the quadrature sine. The I and Q signals of the baseband are supplied to the low pass filters 1416a and 1416b, respectively, which filter the signal to provide the I and Q data. The baseband data of Figure 2 comprise the data I and Q. Q of Figure 4. In the exemplary embodiment, the filter 1412 and / or the low pass filters 1416 also provide scaling of the signal to allow the demodulator 1250 to provide the baseband data at various amplitudes. Other implementations of the demodulator 1250 can be designed to perform the demodulation of the QPSK modulated waveform and are within the scope of the present invention. Referring again to Figure 2, the receiver 1200 comprises the basic functionalities required in most of the receivers. However, the array of attenuator 1216, LNAs 1220a and 1220b, bandpass filters 1226 and 1232 and mixer 1230 can be rearranged to optimize receiver 1200 performance for specific applications. For example, the attenuator 1216 may be interposed between the LNA 1220a and the bandpass filter 1226 to improve the performance of the noise data. In addition, a bandpass filter can be inserted before the LNA 1220a to eliminate the undesirable spurious signals before the first amplifier stage. Various arrangements of the functionalities shown herein can be contemplated and are within the scope of the present invention. In addition, other arrangements of the functionalities shown herein in combination with other receiver functionalities that are known in the art may also be contemplated and be within the scope of the present invention. In the present invention, the attenuator 1216, the switches 1224a and 1224b and the demodulator 1250 are controlled by the AGC control circuit 1260, such that the IF signal of the amplifier 1234 is at the required amplitude. The AGC function is described in detail later. In the exemplary mode, LNAs 1220a and 1220b are fixed gain amplifiers. The LNAs 1220a and 1220b and the mixer 1230 are controlled by the bias control circuit 1280 to adjust the bias current of DC and / or the voltages of these active devices, so that the required linearity performance is achieved with a minimum energy consumption. The variable IIP3 polarization control mechanism is described in detail below. The architecture of the receiver of the present invention can be adopted for use in various applications, including cell phone and HDTV applications. In the cell phone, the receiver 1200 can be adopted for use in CDMA communication systems operating in the personal communication system (PCS) band or in the cellular band. Figure 3 shows a block diagram of an exemplary receiver that supports a dual band (PCS and cellular) and a dual mode (CDMA and AMPS). The PCS band has a bandwidth of 60 MHz and a central frequency of 1900 MHz. The cellular band has a bandwidth of 25 MHz and a central frequency of 900 MHz. Each band requires a bandpass filter. RF unique. Therefore, two RF processors are used for the two bands. Receiver 1300 comprises many of the same components as receiver 1200 (see Figure 2). The antenna 1312, the duplexer 1314 and the attenuator 1316 are identical to the antenna 1212, duplexer 1214 and attenuator 1216 of the receiver 1200. The attenuated signal of the attenuator 1316 is supplied to the RF processors 1310a and 1310b. The RF 1310a processor is designed to operate in the cellular band and the RF 1310b processor is designed to operate in the PCS band. The RF processor 1310a is identical to the RF processor 1210 of the receiver 1200. The RF processor 1310a comprises two stages of the low-noise amplifier (LNA) 1320a and 1320b connected in cascade with the bandpass filter 1326 interposed between the stages . Each LNA 1320 has a parallel signal path comprising the fixed attenuator 1322 and the switch 1324. The RF processor 1310b is similar to the RF processor 1310a, except that the LNAs 1321a and 1321b and the bandpass filter 1327 are designed to operate in the PCS band. The output of the RF processors 1310a and 1310b is supplied to the multiplexer (MUX) 1346 which selects the desired signal in accordance with a control signal from the controller 1370 (not shown in Figure 3 for simplicity). The RF signal of the MUX 1346 is supplied to the RF / IF processor 1348 which is identical to the RF / IF processor 1248 of Figure 2. The IF signal of the processor 1348 is supplied to the demodulator (DEMOD) 1350 which demodulates the signal in accordance with the modulation format used in the remote transmitter (not shown). The demodulator 1350, the AGC control circuit 1360, the bias control circuit 1380 and the non-linearity measurement circuit 1390 of FIG. 3 are identical to the demodulator 1250, the AGC control circuit 1260, the control circuit polarization 1280 and the non-linearity measuring circuit 1290 of Figure 2, respectively. The controller 1370 is connected to the AGC control circuit 1360, the bias control circuit 1380 and the MUX 1346 and controls the operation of these circuits. The controller 1370 may be implemented as a microprocessor, a microcontroller or a digital signal processor, programmed to perform the functions described herein. The controller 1370 may also comprise a memory storage element for storing the operating modes of the receiver 1300 and the associated control signals. Referring to Figure 2, an exemplary design of receiver 1200 especially adopted for the cell phone application is provided in detail below. In the exemplary mode, the attenuator 1216 has an attenuation range of 20 dB and provides an attenuation of 0.2 dB at -20 dB. The attenuator 1216 can be designed with a pair of diodes or by field effect transistors (FETs), whose implementations are known in the art. In the exemplary embodiment, the LNAs 1220a and 1220b have fixed gains of 13 dB each. The LNAs 1220a and 1220b can monolithic RF amplifiers outside the rack or amplifiers designed using discrete components. A discrete or exemplary design of the LNA 1220 is provided in detail below. In the exemplary embodiment, the fixed attenuators 1222a and 1222b provide 5 dB of attenuation and can be implemented with resistors in the manner known in the art. In the exemplary embodiment, the bandpass filter 1226 is a surface acoustic wave (SAW) filter having a bandwidth of 25 MHz, the entire bandwidth of the cellular band is centered around 900 MHz. exemplary embodiment, the bandpass filter 1232 is also a SAW filter having a bandwidth of 1.2288 MHz, the bandwidth of a CDMA system, and is centered around 116.5 MHz. The mixer 1230 is an active mixer which can be a line mixer, such as the Motorola MC13143 or another active mixer that is designed in the manner known in the art. The mixer 1230 can also be implemented with passive components, such as the double-balanced diode mixer. The amplifier 1234 can be a monolithic amplifier or an amplifier designed with discrete components. In the exemplary embodiment, the amplifier 1234 is designed to provide a gain of 40 dB. In the exemplary embodiment, the overall gain range of the receiver 1200, excluding the demodulator 1250, is from +51 dB to -5 dB. The gain range presumes an exemplary insertion loss of -3 dB for bandpass filter 1226, a gain of +1 dB for mixer 1230, and an insertion loss of -13 dB for the bandpass filter 1232. For CDMA applications, an AGD range of 80 dB is normally required to adequately handle path loss, weakening conditions and disturbance emitters. In the exemplary embodiment, the AGC range provided by the attenuator 1216, the LNAs 1220a and 1220b and the fixed attenuators 1222a and 1222b is 56 dB. In the exemplary embodiment, the remaining 24 dB of the AGC range is provided by the demodulator 1250 and / or the amplifier 1234. Within the demodulator 1250 (see Figure 4), the ADC 1410 quantizes the analog waveform and supplies the values digitized to the subsequent blocks of digital signal processing. In the exemplary embodiment, the resolution required for the ADC 1410 is four bits. In the exemplary embodiment, six additional resolution bits provide space for emitters of disturbances not yet filtered. The ADC 1410 can be designed to provide more than ten bits of resolution. Each additional bit over ten can be used to provide 6 dB of gain control. Fortunately, at high CDMA signal levels, the out-band disturbance transmitter levels can not continue to be +72 dB above the CDMA signal. Therefore, when the CDMA signal is strong, the disturbance transmitters require less than 6 bits of resolution for the space of the disturbance transmitter. In the exemplary embodiment, the AGC function performed on the demodulator 1250 is active only when the CDMA signal is strong, for example, at the high end of the CDMA control range. In this way, the additional resolution bits that are initially reserved for the disturbance emitter space are now used for the AGC function as a result of the strong levels of the CDMA signal. The design of the ADC S? Sub-sampling bandpass that provides the performance required for receiver 1200 is disclosed in the aforementioned co-pending United States Patent Application No. Series 08/987, 306.

II. Amplifier Design Figure 5A shows a schematic diagram of a discrete, eg emplificative, LNA design. Within the LNA 1220, the RF input is supplied to one end of the AC coupling capacitor 1512. The other end of the capacitor 1512 is connected to one end of the capacitor 1514 and the inductor 1516. The other end of the capacitor 1514 is connected to the analog ground and the other end of the inductor 1516 is connected to one end of the resistors 1518 and 1520 and to the base of the transistor 1540. The other end of the resistor 1518 is connected to the power supply of Vdc and the other end of the resistor 1520 is connects to the analog ground. The bypass capacitor 1522 is connected to the Vdc and the analog ground. In the exemplary embodiment, the transistor 1540 is a low noise RF transistor, such as the Siemens BFP420, which is commonly used in the art. The emitter of the transistor 1540 is connected to one end of the inductor 1542. The other end of the inductor 1542 is connected to the current source 1580, which is also connected to the analog ground. The collector of transistor 1540 is connected to one end of inductor 1532, resistor 1534, and capacitor 1536. The other end of inductor 1532 and resistor 1534 are connected to Vdc. The other end of the capacitor 1536 comprises the RF output. Within LNA 1220, capacitors 1512 and 1536 provide the AC coupling of the RF input and the output signals, respectively. Capacitor 1514 and inductor 1516 provide noise matching. The inductors 1516 and 1532 also provide the coincidence of the input and output of the LNA, respectively. The inductor 1532 also provides a DC path for the bias current of the transistor 1540. The inductor 1542 provides the degeneracy of the emitter impedance to improve the linearity. The resistors 1518 and 1520 set the DC bias voltage at the base of the transistor 1540. The resistor 1534 determines the gain of the LNA 1220 and the output impedance. The current source 1580 controls the bias current of the transistor 1540 which determines the IIP3 of the LNA 1220. A schematic diagram of an exemplary current source 1580 is shown in FIG. 5B. The sources of the n-channel MOSFETs 1582 and 1584 are connected to the analog ground. Drain or consumption of the MOSFET 1584 is connected to one end of the resistor 1586. The other end of the resistor 1586 is connected to the drain of the MOSFET 1582 and comprises the output of the current source 1580. The bypass capacitor 1588 is connected through of the output of the 1580 current source and the analog ground. The gate of MOSFET 1582 is connected to Vbiasl and the gate of MOSFET 1584 is connected to Vbias2. The MOSFETs 1582 and 1584 provide the polarization current of the collector Ice for the transistor 1540 which, in turn, determines the operational point IIP3 of the LNA 1220. The gates of the MOSFETs 1582 and 1584 are connected to the control voltages Vbiasl and Vbias2 , respectively. When the Vbiasl is low (for example 0V), the MOSFET 1582 turns OFF (OFF) and does not provide the collector polarization current Ice for the transistor 1540. When Vbiasl is high (for example, approaching Vdc), the MOSFET 1582 is turned ON and provides the maximum bias current of the collector of transistor 1540. In this way, Vbiasl determines the amount of bias current of the Ice collector supplied by MOSFET 1582. Similarly, Vbias2 determines the amount of collector bias current supplied by the MOSFET 1584. However, the voltage at the base of the transistor 1540 and the value of the resistor 1586 limit the maximum collector bias current provided by the MOSFET 1584. The IIP3 performance of the LNA 1220 against the Polarization current of the Ice collector is illustrated in Figure 6A. Note that IIP3 increases by approximately 6 dB per eighth increase (or doubling) in the collector bias current. The polarization current of the collector of transistor 1540, the gain of the LNA 1220 and that the IIP3 of the LNA 1220 against the control voltage Vbiasl are illustrated in Figure 6B. Note that the gain is approximately constant (for example, gain variation of approximately 1 dB for all Vbiasl voltages). Note also that IIP3 varies in a similar way to the polarization current of the Ice collector. In this way, the collector bias current can be reduced, if a high IIP3 with a minimum effect on the gain of the LNA 1220 is not required. Figures 5A and 5B illustrate an exemplary design of the LNA 1220 and the current source 1580, respectively. The LNA 1220 can be designed using other topologies to provide the necessary performance (for example, higher gain, improved noise data, better match). The LNA 1220 can be designed with other active devices, such as bipolar joint transistors (BJT), heterogeneous-bipolar joint transistors (HBT), metal-oxide-semiconductor field effect transistor (MOSFET), the field effect transistor of gallium arsenide (GaAsFET) or other active devices. The LNA 1220 can also be implemented as a monolithic amplifier in the manner known in the art. Similarly, current source 1580 can be designed and implemented in other ways known in the art. The various implementations of the LNA 1220 and the current source 1580 are within the scope of the invention.

III. IIP3 Polarization Control Variable As described above, intermodulation products within the band can be created by spurious signals that pass through non-linear devices. An application that has a demanding or demanding linearity requirement is a CDMA communication system that is co-located with other cell phone systems, such as the Telephone System Advance Mobile (AMPS). The other cell phone systems can transmit spurious signals (or disturbances) at high energy near the operating band of the CDMA system, thus necessitating a high IIP3 requirement at the CDMA receiver. The requirement for rejection of the spurious signal in a CDMA system is defined by two specifications, a two-tone test and a one-tone test, in the "TIA / EIA / IS-98 -A Intermodulation Spurious Response Attenuation", hereinafter standard IS-98-A. The two-tone test is illustrated in Figure 7A. The two tones are located at £ __ = +900 KHz and f2 = +1700 KHz of the center frequency of the CDMA waveform. The two tones have the same amplitude and 58 dB greater than the amplitude of the CDMA signal. This test simulates an FM-modulated signal that is transmitted on the adjacent channel, such as the signal from an AMPS system. The FM modulated signal contains the mass of the energy in the carrier, while the energy in the CDMA waveform propagates or scales across the 1.2288 MHz bandwidth. The CDMA signal is more immune to The condition of the channel is maintained at a low level of energy by an energy control circuit. In fact, the CDMA signal remains at the minimum level of energy needed for the required level of performance to reduce interference and increase capacity. The single tone test is illustrated in Figure 7B. The unique tone is located at fi = + 900KHz of the center frequency of the CDMA waveform and has an amplitude of +72 dBc greater than the amplitude of the CDMA signal. In accordance with IS-98-A, the linearity of the receiver is specified at the CDMA input power level of -101 dBm, -90 dBm and -79 dBm. For the two-tone test, the disturbances are at -43 dBm, -32 dBm and -21 dBm (+58 dBc) and the equivalent signal within the band of the intermodulation products are at -104 dBm, -93 dBm and -82 dBm, for the input power level of -101 dBm, -90 dBm and -79 dBm, respectively. As illustrated in Figure 7A, spurious tones (or perturbations) at fi = +900 KHz and f2 = +1700 KHz produce third-order intermodulation products at (2f? -f2) = +100 KHz and (2f2-f) ) = +2500 KHz. The product at +2500 KHz can be easily filtered by the subsequent bandpass filters 1226 and 1232 (see Figure 2). However, the product at +100 KHz falls within the CDMA waveform and degrades the CDMA signal. To minimize the degradation in the performance of the receiver 1200, the IIP3 of the active devices within the receiver 1200 is adjusted in accordance with the amount of non-linearity in the received signal. The receiver 1200 is designed to meet the two-tone intermodulation specification. However, in practice, disturbances are present only for a fraction of the operating time of the receiver 1200. In addition, the amplitude of the disturbances will rarely reach the level of +58 dB as specified. Therefore, designing for the worst case disturbances and operating the 1200 receiver in the IIP3 high mode in anticipation of the worst-case disturbances is a waste of battery power. In the present invention, the IIP3 of the active devices, in particular the LNA 1220b and the mixer 1230, are adjusted in accordance with the non-linearity measured in the output signal of the receiver 1200. In the exemplary embodiment, the non-linearity is measured using the slope method of the RSSI. The slope measurement of RSSI is described in detail in U.S. Patent No. 5, 107,225, entitled "HIGH DYNAMIC RANGE CLOSED LOOP AUTOMATIC GAIN CONTROL CIRCUIT", published on April 21, 1992, assigned to the assignee of the present invention and incorporated by reference herein. Referring to Figure 2, the bandpass filter 1232 has a bandwidth of 1.2288 MHz and suppresses most disturbances and out-band intermodulation products. The intermodulation products that fall within the band can not be deleted and are added to the CDMA waveform. The IF signal of the amplifier 1234 is supplied to the demodulator 1250 which processes the IF signal and supplies the digitized baseband data comprising the I and Q data. The baseband data is supplied to the non-electronic measurement circuit. linearity 1290. In the exemplary embodiment, the non-linearity measuring circuit 1290 calculates the signal energy in accordance with the following equation: (I2 + Q2), (5) where P is the energy of the signals of the band base and I and Q are the amplitude of the I and Q signals, respectively. The energy measurement is supplied in the polarization control circuit 1280. The energy measurement contains the energy of the desired baseband I and Q signals as well as the energy of the intermodulation products. As described above, for the second-order non-linearity, the intermodulation products increase by two dB for each dB of increase in the level of the input signal. For third-order non-linearity, the intermodulation products increase by three dB for each dB increase in the level of the input signal. In this way, the amount of intermodulation can be estimated by measuring the slope of the RSSI, which is defined as the change in the level of the output signal against the change in the level of the input signal. The change in the level of the input signal can be set at a predetermined increment (for example, 0.5 dB). For the receiver 1200 operating in the linear range or range, 0.5 dB increase in the level of the input signal corresponds to an increase of 0.5 dB in the level of the output signal and an RSSI slope of 1.0. However, as one or more active devices transition to the non-linear operating region, the slope of the RSSI increases. A higher slope of the RSSI corresponds to a higher level of non-linearity. A slope of the RSSI of 3.0 corresponds to the receiver 1200 operating in full compression (for example, no increase in the level of the desired output signal as the input increases) and the output will be dominated by the third order intermodulation products. In the present invention, the slope of the RSSI can be compared against a threshold of the predetermined RSSI. If the slope of the RSSI exceeds the threshold, the IIP3 of the active device itself increases. Alternatively, if the slope of the RSSI is below the RSSI threshold, the IIP3 is reduced. The RSSI threshold can be adjusted during the operation of the receiver 1200, based on the bit error rate (BER) or the performance of the required frame error rate (FER). A higher threshold of the RSSI allows a higher level of the intermodulation products before increasing the IIP3, thus minimizing the energy consumption at the expense of the performance of BER or FER. The RSSI threshold can also be adjusted by a control circuit that sets the threshold for a required performance level (for example, 1% FER). In the exemplary mode, the slope of the RSSI is selected in 1.2. However, within the scope of the present invention is the use of other RSSI thresholds. In the present invention, it is not critical to directly measure the amplitude of the disturbances. It is more important to measure the undesirable effect of the disturbances, in terms of the higher level of the intermodulation products, on the desired signal. Slope RSSI is a method to measure the level of non-linearity. The level of non-linearity can also be measured by calculating the change in energy per chip to the noise ratio (Ec / Io) of the output signal for an incremental change in the amplitude of the input signal. The intermodulation products are increased by a factor of three to one when the receiver 1200 is in compression and the output signal is dominated by the third order intermodulation products. As with the slope method of the RSSI, the level of non-linearity can be estimated by changing in Ec / Io against the change in the level of the input signal. Other methods for measuring the level of non-linearity can be contemplated and are within the scope of the present invention. In the exemplary embodiment, to maximize performance, the IIP3 of the active devices are adjusted in accordance with the amount of non-linearity (for example, by measuring the slope of the RSSI) experienced by each active device. The LNAs 1220a and 1220b provide a fixed gain. In this way, the mixer 1230 experiences the highest signal level, the LNA 1220b experiences the next highest signal level and the LNA 1220a experiences the smallest signal level (this assumes that the gain of the LNA 1220a is greater than the insertion loss of bandpass filter 1226). With these assumptions, the operational point IIP3 of the mixer 1230 is first increased if a disturbance is detected (for example, through a high measurement of the slope of the RSSI). Once the IIP3 of the mixer 1230 is fully adjusted (for example, to the highest operating point IIP3), the IIP3 of the LNA 1220b is increased. Finally, once the IIP3 of the LNA is fully adjusted, the IIP3 of the LNA 1220a can be increased. In the exemplary embodiment, the LNA 1220a is maintained at a predetermined operating point IIP3 to optimize the performance of the receiver 1200. In a complementary fashion, the IIP3 of the LNA 1220b is first reduced if no disturbances are detected. Once the IIP3 of LNA 1220b is fully adjusted (for example, at the lower operating point IIP3), the IIP3 of the mixer 1230 is reduced. The IIP3 of the LNA 1220b and the mixer 1230 can be adjusted in a continuous manner (for example, by providing the continuous Vbiasl and Vbias2 control voltages) or in discrete steps. The present invention is directed to the use of continuous and discrete steps or to other methods for controlling the IIP3 of the active devices. The above-described IIP3 adjustment order assumes that IIP3 is the only consideration. However, different applications may experience different input conditions and have different performance requirements. The adjustment order of IIP3 can be rearranged to meet these requirements. In addition, the adjustment of the IIP3 can be reversed from the direction of the above described (e.g., by reducing the IIP3 to increase the level of the input signal) to optimize the performance of the receiver 1200 for a particular operating condition. A different adjustment order of IIP3 and different direction of adjustment of IIP3 are within the scope of the present invention.

IV. Gain Control Most receivers are designed to support a wide range of input signal levels. For CDMA receivers, the nominally required AGC range is 80 dB. In the exemplary embodiment of the present invention (see Figure 2), the AGC range is supplied by the attenuator 1216, the LNAs 1220a and 1220b, the fixed attenuators 1222a and 1222b, the demodulator 1250 and possibly the amplifier 1234. In the embodiment For example, the attenuator 1216 provides a range of AGC of 20 dB, the fixed attenuators 1222a and 1222b each provide a range of AGC of 5 dB, the LNA 1220a and 1220b each provide a range of AGC of 13 dB and the amplifier 1234 and / or the demodulator 1250 provide an AGC range of 24 dB. The AGC range of one or more of these components can be adjusted and is within the scope of the present invention. In addition, the amplifier 1234 can be designed to provide a range of AGC that supplements those of the other components. For example, the AGC range of fixed attenuators 1222 can be reduced to 2 dB each and the amplifier 1234 can be designed with an AGC range of 6 dB. In the exemplary embodiment, the first 2 dB of the AGC range is provided by the demodulator 1250. The demodulator 1250 comprises the ADC S? bandpass sub-sampling 1410 which provides additional resolution bits, which can be used for AGC control. The next 20 dB of the AGC range is provided by the attenuator 1216 and / or the amplifier 1234. The next 18 dB of the AGC range is provided by the LNAs 1220a and the fixed attenuator 1222a. The next 18 dB of the AGC range is provided by the LNAs 1220b and the fixed attenuator 1222b. And the remaining 22 dB of the AGC range is provided by the amplifier 1234 and / or the demodulator 1250. An exemplary diagram illustrating the operation of the AGC control of the receiver 1200 of the present invention to increase the signal energy of the receiver. CDMA input is illustrated in Figure 8A. In this example, the amplifier 1234 is implemented for simplicity as a fixed gain amplifier. The level of the CDMA input power can range from -104 dBm to -24 dBm. -104 dBm to -102 dBm, LNAs 1220a and 1220b turn ON (ON), the switches 1224a and 1224b are turned OFF (OFF) and the AGC is provided by the demodulator 1250.

From -102 dBm to -85 dBm the AGC is provided by the attenuator 1216. From -84 dBm to -62 dBm, the LNA 1220a goes OFF, the switch 1224a turns ON, the LNA 1220b stays ON, the switch 1224b remains OFF and the AGC is provided by the attenuator 1216. From -63 dBm to -46 dBm, the LNAs 1220a and 1220b are turned OFF, the switches 1224a and 1224b are turned ON and the AGC is provided by the attenuator 1216. Finally, above -46 dBm, the attenuator 1216 is completely attenuated, the level of the IF signal in the demodulator 1250 increases dB for each dB with the level of the input RF signal and the AGC is provided after the ADC 1410 by the demodulator 1250. An exemplary diagram illustrating the AGC control operation of the receiver 1200 for reducing the energy of the CDMA signal is illustrated in Figure 8B. Again, in this example the amplifier 1234 is implemented, for simplicity, as a fixed gain amplifier. From -24 dBm to -46 dBm, the LNAs 1220a and 1220b are OFF, the switches 1224a and 1224b are ON and the AGC is provided after the ADC 1410 by the demodulator 1250. From -46 dBm to -66 dBm, the AGC is provided by the attenuator 1216. From -66 dBm to -69 dBm, the attenuator 1216 is in the minimum attenuation state and the AGC is provided by the demodulator 1250. At -70 dBm, the LNA 1220b is turned ON and the switch 1224b is switched on. TURNS OFF. From -70 dBm to -84 dBm, the AGC is provided by the attenuator 1216. From -84 dBm to -90dBm, the AGC is provided by the demodulator 1250. At -91 dBm, the LNA 1220a is turned ON and the switch 1224a is switched on. TURNS OFF. From -91 dBm to -102 dBm, the AGC is provided by the attenuator 1216. And from -102 dBm to -104 dBm, the AGC is provided by the demodulator 1250. Figures 8A and 8B illustrate the RF signal levels of entry where the LNAs 1220a and 1220b are ON and OFF. The LNA 1220a turns OFF as the input signal level exceeds -85 dBm (see Figure 8A) but does not turn ON again until the signal level drops below -91 dBm. The 6 dB hysteresis prevents the LNA 1220a from switching between the ON (ON) and OFF (OFF) states. The LNA 1220b is also provided with 6 dB of hysteresis for the same reason. Different amounts of hysteresis can be used to optimize the performance of the system and are within the scope of the present invention. The above description illustrates an exemplary implementation of the AGC control required. AGC control can also be implemented with AGC amplifiers that have adjustable gains. In addition, the Attenuator array 1216 and LNAs 1220a and 1220b as illustrated in Figure 2 is just an implementation that satisfies the CDMA specification. Other implementations of the AGC functionalities using the elements described herein and other implementations using these elements in combination with other elements or circuits known in the art are within the scope of the present invention.

V. Receiver Setting Accordance with Nonlinearity Measurement In the first embodiment in the present invention, the IIP3 of the active devices are set in accordance with the measured level of non-linearity produced by receiver 1200. The level of non-linearity it can be estimated by the slope of the Ec / Io or by measuring RSSI. The timing diagram of an implementation of measuring the RSSI slope is illustrated in Figure 9. In the exemplary embodiment, the level of the RF signal input changes by varying the attenuation of attenuator 1216 in narrow or short pulses. Each impulse is referred to as a "ripple". the slope of the RSSI is measured at each pulse and the measurements are averaged over a predetermined period T to improve the accuracy of the slope measurement of the RSSI. At the end of period T, the measured RSSI slope is compared to the RSSI threshold and the result is used to adjust the IIP3 of the active devices in the manner described above. As shown in Figure 9, the measurement of the RSSI slope at T0 is less than the RSSI threshold, indicating that the receiver 1200 is operating within the linear limit. In this way, the IIP3 of LNA 1220b is reduced to maintain power consumption. Similarly, at the end of the periods Ti, T2 and T3, the slope of the measured RSSI is less than the threshold of the RSSI and the IIP3 of the LNA 1220b continues to decrease. At the end of the period T, the slope of the RSSI measured is still lower than the RSSI threshold and the IIP3 of the mixer 1230 is reduced since the IIP3 of the LNA 1220b has been fully adjusted to the minimum operative point IIP3. At the end of period T5, the measured RSSI slope is greater than the RSSI threshold, indicating that the intermodulation products have been increased to an unacceptable level. The IIP3 of the mixer 1230 is increased to improve the linearity in response thereto. In the exemplary embodiment, each pulse has a duration of 200 μsec, the period T is 5 msec and the number of pulses within a period T is nine. Using these values, the work cycle is 36 percent. In the preferred embodiment, the duty cycle of the pulses must be low enough so that the Ec / Io of the desired signal is minimally degraded by the periodic perturbation in the amplitude of the signal. The width of the pulses is selected to have a short duration and minimize the disturbance of the AGC control circuit 1280. Normally, the AGC control circuit is slow and can not follow the changes in the signal level caused by the short attenuation pulses. This is particularly important, since the change in the magnitude of the output signal must accurately reflect the changes in the amplitude of the input signal and the intermodulation products and not the changes caused by the AGC 1280 control circuit. However, the short pulse width results in a less accurate measurement of the energy of the output signal. The present invention is directed to the use of pulses of various widths and various work cycles for the functions described herein. The amplitude of the disturbance at the level of the RF signal is selected to be small and minimize the degradation in the output signal and minimize the effect on the IIP3 of the entire receiver 1200. In the exemplary embodiment, the step of the attenuation in the measurement of the slope of the RSSI is 0.5 dB. Other values for the step of attenuation may be used and are within the scope of the present invention. In the exemplary embodiment, the RSSI threshold is selected to be 1.2. The use of an RSSI threshold may result in the switching of IIP3 operational points between successive T periods. To avoid this, two RSSI thresholds can be used to provide the hysteresis. IIP3 does not increase unless the measured RSSI slope exceeds the first RSSI threshold and IIP3 is not reduced unless the measured RSSI slope is below the second RSSI threshold. The use of a single threshold or multiple thresholds is within the scope of the present invention. A diagram illustrating the IIP3 bias control operation of the receiver 1200 of the present invention to increase the level of the incoming RF energy is shown in Figure 10A. The input RF signal comprises a CDMA signal and two-tone disturbances that are +58 dBm above the CDMA signal. When the power of the CDMA signal is between -104 dBm and -101 dBm, the IIP3 of the mixer 1230 is set to +10 dBm and the IIP3 of the LNAs 1220a and 1220b is set to 0 dBm. As the CDMA signal increases beyond -101 dBm, the measured RSSI slope exceeds the RSSI threshold and the IIP3 of the mixer 1230 is increased to +15 dBm to minimize the non-linearity level. The attenuator 1216 provides the attenuation of the input RF signal between -104 dBm and -84 dBm. At -84 dBm, the LNA 1220a is derived and the attenuator 1216 is readjusted in its low attenuation state. When the power of the CDMA signal is -83 dBm, -79 dBm, -75 dBm and -71 dBm, the IIP3 of the LNA 1220b is increased to minimize the intermodulation products. At about -64 dBm, the LNA 1220b is derived and the attenuator 1216 is again readjusted in its low attenuation state. A diagram illustrating the polarization control operation of the IIP3 of the receiver 1200 to lower the level of the incoming RF energy is shown in Figure 10B. Again, the input RF signal comprises a CDMA signal and two-tone disturbances that are +58 dBc above the CDMA signal. Initially, when the energy of the CDMA input signal is -60 dBm, the LNAs 1220a and 1220b are derived. When the CDMA signal power is reduced to -70 dBm, the LNA 1220b turns ON to provide the necessary gain. Approximately -76 dBm, -80 dBm, -84 dBm and -88 dBm, the IIP3 of the LNA 1220b is reduced to minimize energy consumption. At -90 dBm, the attenuator 1216 reaches its upper attenuation range and the LNA 1220a turns ON. At -100 dBm, the IIP3 of the mixer 1230 is reduced to maintain power, since the level of the input RF signal is small. As described above, the input RF energy level where the IIP3 of the mixer 1230 and the LNAs 1220a and 1220b are adjusted and determined by the slope of the RSSI measured. The slope measurement of the RSSI may not result in linearly separated IIP3 bias switching points. As shown in Figures 10A and 10B. In addition, the step switching points can be replaced by a continuously adjustable bias control.

SAW . Adjustment of the Receiver in Accordance with the Mode of Operation In the second embodiment of the present invention, the IIP3 of the active devices are set in accordance with the mode of operation of the receiver. As stated above, the 1300 receiver (see Figure 3) can be used on a cell phone, which is required to operate on either the PCS or the cellular band. Each band can support digital and / or analog platforms. Each platform may additionally comprise a variety of operational modes. The various operating modes are used to improve performance and to conserve battery power, for example, different operating modes are used to support the following features of a cell phone: (1) radiolocation in slotted mode for a longer time wait, (2) gain stage for the improvement of the dynamic range, (3) perforated output of the transmitter for a longer talk time, (4) selection of the frequency band for two-band phones (PCS and cellular), (5) multiple access that switches between systems (CDMA, AMPS, GSM, etc.), and (6) a means for controlling the polarization of the circuit in the presence of disturbances. Cell phone operating modes may have different performance requirements. In the exemplary embodiment, each mode of operation is assigned a unique identifier comprising N mode bits. The mode bits define particular characteristics of the operation mode.

For example, a mode bit may be used to select between the PCS and the cellular band and another mode bit may be used to select between digital (CDMA) or analog (FM) mode. The N mode bits are supplied to a logic circuitry within the controller 1370 which decodes the N mode bits in a main line or control bus comprising up to 2N control bits. The main line or control bus is routed to circuits within the 1300 receiver that require control. For example, the control bus can direct the following: (1) set the IIP3 of the mixer within the RF / IF 1348 processor and the LNAs within the RF processors 1310a and 1310b, (2) set the gain of the 1300 receiver , (3) setting the DC bias voltages and / or current to other RF and IF circuitry within the 1300 receiver, (4) select the desired signal band and (5) set the oscillators at the appropriate frequencies. An exemplary implementation of the IIP3 control for the 1300 receiver based on the mode of operation is illustrated in Tables 1 and 2. the 1300 receiver supports the dual band (PCS and cellular) and the double mode (CDMA and FM). In the exemplary embodiment, the PCS band only supports CDMA transmission, while the cellular band supports both CDMA and FM transmissions (the FM transmission may come from the AMPS system). In the exemplary embodiment, four mode bits are used. The four mode bits are the BAND_SELECT, IDLE /, FM /, and LNA_RANGE bits. The BAND_SELECT bit determines the operation band and is defined as 1 = PCS and 0 =. The IDLE / bit (0 = idle) puts the receiver 1300 in idle or free mode (for example, operating at a lower IIP3), while the cell phone is idle. The FM / (0 = FM) bit puts the receiver 1300 to process the FM signal. And the L bit? A_RANGE (l = derivation) sets the gain of the receiver 1300.

When bit L? A_RANGE is set high, designating the derivation mode, Vbiasl and Vbias2 of the first LNA 1320a or 1321a are set to low and L? A is turned OFF. When the BA? D_SELECT is set to 0 (cellular band), the 1300 receiver operates in one of the cell operation modes listed in Table 1. Table 1 only lists the IIP3 operation point of the L? As 1320a and 1320b . A similar frame can be generated for the operating point IIP3 of the active mixer within the RF / IF 1348 processor. While in cellular mode, the DC bias current for the L? As 1321a and 1321b is turned OFF to maintain the battery power.

Table 1 - Control of the Receiver for the Modes of Cellular Operation L? A L? A L? A L? A IDLE / FM / LNA_ Mode of 1320a 1320a 1320b 1320b RANGE Vbiasl Vbias2 Vbiasl Vbias2 Operation 0 0 0 0 1 1 0 Rx on FM 0 0 1 0 0 1 0 Rx in FM 0 1 0 1 0 1 1 CDMA Slotted 0 1 1 0 0 1 1 CDMA Slotted 1 0 0 0 1 1 0 Rx / Tx on FM 1 0 1 0 0 1 0 Rx / Tx on FM 1 1 0 1 1 1 1 CDMA Rx / Tx 1 1 1 0 0 1 1 CDMA Rx / Tx When the BA? D_SELECT is set to 1 (PCS band), the phone operates "in one of the PCS operation modes listed in Table 2. While in PCS mode, the polarization current of the L? As 1320a and 1320b turns OFF to maintain battery power.

Table 2 - Control of the Receiver for PCS Operating Modes L? A L? A L? A L? A IDLE / FM / L? A_ Mode 1321a 1321a 1321b 1321b RA? GE Vbiasl Vbias2 Vbiasl Vbias2 Operation 0 0 0 X X X X not used 0 0 1 X X X X not used 0 1 0 1 0 1 1 PCS slotted 0 1 1 0 0 1 1 PCS slotted 1 0 0 X X X X not used 1 0 1 X X X X not used 1 1 0 1 1 1 1 Rx / Tx of PCS 1 1 1 0 0 1 1 Rx / Tx of the PCS Table 1 and 2 list the IIP3 operation points of the LNAs to minimize energy consumption, while maintaining the required performance. Additional frames can be generated for other circuits that require control. For example, a frame may be generated which places the AGC in the appropriate operating range based on the expected level of the input signal of the desired mode of operation. Other frames may be generated to set the DC bias current or voltages that are required by the various circuits within the receiver 1300.

VIII. Adjustment of the Receiver of Conformity with the Level of the Received Signal In the third embodiment of the present invention, the IIP3 of the devices is set according to the measured amplitude of the signal in several stages of processing the signal within the receiver. Referring to Figure 2, energy detectors can be connected to the output of selected components to measure the energy level of the signal. In the first embodiment of this receiver adjustment scheme, the energy detectors can be connected at the output of the LNA 1220a and 1220b and the mixer 1230 to measure the energy of the RF signal of these components. The energy measurements are then supplied to the polarization control circuit 1280 which uses the information to adjust the operating point IIP3 of any component operating beyond a predetermined non-linearity level. In the second embodiment of this receiver adjustment scheme, the energy detectors can be connected at the output of the mixer 1230 and the modulator 1250 to measure the energy of the RF signal and the baseband signal, respectively, of these components. The energy measurements are also supplied to the polarization control circuit 1280. The energy difference between these two measurements represents the energy of the out-of-band signals, which can be used to infer the required IIP3 performance. The polarization control circuit 1280 adjusts the operating point of the components in the manner described above, to maintain the required level of performance. The energy detector can be implemented in many ways known in the art, such as a diode detector followed by a low pass filter. The previous description of the preferred embodiments is provided to enable any person skilled in the art to prepare or use the present invention. The various modifications to these modalities will be readily apparent to those skilled in the art and the generic principles defined herein can be applied to other modalities without using the inventive faculty. Thus, it is not intended that the present invention be limited to the modalities shown herein but be in accordance with the broader scope consistent with the novel principles and particularities which are now disclosed herein.

Claims (24)

1. NOVELTY OF THE INVENTION Having described the present invention, it is considered as a novelty and, therefore, the content of the following CLAIMS is claimed as property; A programmable linear receiver comprising: an adjustable gain element for receiving an RF signal, the adjustable gain element has a gain control input, at least one amplifier stage connected to the adjustable gain element, at least one of the at least one amplifier stage or amplifier stage has a variable IIP3 operating point, adjustable by a polarization control input; a demodulator is connected to at least one amplifier, the demodulator provides the data of the baseband; a non-linearity measuring circuit connected to the demodulator, a bias control circuit connected to the non-linearity measuring circuit, the bias control circuit is also connected to the bias control input of the at least one amplifying stage which has the variable IIP3 operation point; and a gain control circuit connected to the gain control input of the adjustable gain element.
2. 2. The receiver according to claim 1, wherein the adjustable gain element is an attenuator.
3. 3. The receiver according to claim 1, wherein the measuring circuit den or linearity measures the slope of RSSI. The receiver according to claim 1, wherein the non-linearity measuring circuit calculates the energy per chip at noise ratio (Ec / Io). The receiver according to claim 1, further comprising: a mixer having a bias control input connected to the bias control circuit, the blender is interposed between the at least one amplifier enclosure and the demodulator. 6 The receiver according to claim 1, further comprising: a switch connected in parallel with each of the at least one amplifier stage, the switch has a control input connected to the gain control circuit. The receiver according to claim 6, further comprising: a fixed attenuator connected in series with the switch. 8. A method for providing the programmable linearity in a receiver, comprising the steps of: receiving an RF input signal; attenuate the RF signal at a predetermined level; amplifying the RF signal with at least one amplifier to produce an amplified RF signal, the at least one amplifier comprises an active device, demodulating the amplified RF signal to obtain the output signal; measure the level of non-linearity in the output signal; and adjusting the IIP3 operation point of the active devices according to the level of non-linearity measured. The method according to claim 8, wherein the adjustment step is performed in an order determined by the performance of the noise factor of the receiver. The method according to claim 8, wherein the step or adjustment step is performed in an order based on the signal levels of the active devices within the receiver. The method according to claim 10, wherein the operating point IIP3 of the active device having the highest level of the output signal is first increased as the RF signal increases. The method according to claim 11, wherein the operating point IIP3 of the active device having the second highest level of the output signal is increased secondly as the RF signal increases and the active device having the Higher level of the output signal is increased to a predetermined IIP3 operating point. The method according to claim 10, wherein the operating point IIP3 of the active device having the lowest level of the output signal is first reduced as the RF signal is reduced. 14. The method according to claim 13, wherein the operating point IIP3 of the active device having the second lowest level of the output signal is reduced in second place as the RF signal is reduced and the active device having the lowest level of the output signal it is reduced to a predetermined IIP3 operating point. 15. The method according to claim 10, wherein the adjustment step is carried out in discrete steps or steps. 16. The method according to claim 10, wherein the adjustment step is carried out continuously. The method according to claim 8, wherein the step of the measurement is performed by measuring the RSSI slope of the output signal. 18. The method according to claim 8, wherein the step of the measurement is performed by measuring the Ec / lo of the output signal. 19. The method according to claim 17, further comprising the step of: comparing the slope of the RSSI measured with an RSSI threshold. where the adjustment step is made in accordance with the result of the comparison step. The method according to claim 19, wherein the RSSI threshold is set according to the required level of performance on the part of the receiver. 21. The method according to claim 19, wherein the RSSI threshold is 1.2. 22. The method according to claim 19, further comprising the step of: averaging the slope of the RSSI measured in a predetermined period. 23. The method according to claim 22, wherein the predetermined period has a duration of 5 msec. The method according to claim 8, wherein the step of attenuation is periodically performed by pulses. 24. The method according to claim 24, wherein the pulses have a duration of 200 μsec. 26. The method according to claim 8, wherein the predetermined level of the attenuation step is 0.5 dB. 27. The method according to claim 8, further comprising the step of: turning OFF the at least one amplifier, one at a time, as the RF signal exceeds a predetermined threshold. The method according to claim 27, wherein the amplifier closest to the receiver input is turned off first as the RF signal exceeds a predetermined threshold. The method according to claim 8, further comprising the steps of: mixing the amplified RF signal to obtain an IF signal, the mixing step is performed with a mixer comprising an active device and filtering the IF signal to get the filtered IF signal; wherein the step of the demodulation is carried out on the filtered IF signal. 30. The method according to claim 29, wherein the operating point IIP3 of the mixer is first increased as the RF signal increases. 31. The method according to claim 29, wherein the IIP3 operating point of the mixer is reduced to the last as the RF signal is reduced. SUMMARY OF THE INVENTION A programmable linear receiver (1200) is provided that provides the required level of system performance at reduced power consumption. The receiver minimizes energy consumption based on the measurement of non-linearity in the output signal of the receiver (1200). The amount of non-linearity can be measured by the slope of the RSSI or by measuring the ratio of energy per chip / noise ratio (Ec / Io). The slope of the RSSI is the ratio of the change in the output signal plus the intermodulation to the change in the input signal. The level of the input signal is increased periodically at a predetermined level and the output signal of the receiver (1200) is measured. The output signal comprises the desired signal and the intermodulation products of the non-linearity within the receiver (1200). When the receiver (1200) is operating in a linear fashion, the level of the output signal increases dB for each dB with the level of the input signal. However, as the receiver (1200) transitions to the non-linear region, the intermodulation products due to non-linearity increase faster than the desired signal. By detecting the slope of the RSSI, the amount of life degradation to non-linearity can be determined. This information is then used to adjust the IIP3 operation point of the amplifiers (1234) and the mixer (1230) to provide the required level of performance, while minimizing the power consumption.