MXPA00000926A - Converter for satellite broadcast signals comprising a plurality of output terminals - Google Patents

Abstract

A satellite-broadcasting receiving converter includes a plurality of output terminals (6a, 6b) each of which is connected to an external receiver, to each of which a selection control voltage in which a high-frequency voltage is superposed on a DC voltage is sent from the external receiver, and from each of which one type of a receiving signal is selected according to the selection control voltage and output;and a regulator (7) for generating a power-source voltage from the selection control voltage. Since a high-frequency attenuation unit (8, 9) is connected in series between each output terminal and the regulator in the satellite-broadcasting receiving converter, even if a plurality of selection control voltages are input in common to the regulator, the plurality of selection control voltages different from each other do not affect each other and thereby only one regulator is required.

Description

CONVERTER FOR RECEIVING SATELLITE TRANSMISSIONS WITH A PLURALITY OF OUTPUT TERMINALS BACKGROUND OF THE INVENTION FIELD OF THE INVENTION The present invention relates to converters for receiving satellite transmissions, with a plurality of output terminals, connected to receivers for satellite TV transmission (hereinafter referred to as receivers).

DESCRIPTION OF THE RELATED TECHNIQUE Satellite TV transmission uses, for example, a frequency band that varies from 10.7 GHz to 12.75 GHz, 10.7 GHz to 11.7 GHz for analog transmission and 11.7 GHz to 12.75 GHz for digital transmission. A horizontal polarization wave and a vertical polarization wave are used for analog transmission and digital transmission. In other words, four types of satellite TV transmission are used in combinations of analog transmission and digital transmission, and a horizontal polarization wave and a vertical polarization wave.

Converters that receive satellite transmissions receive satellite TV transmission signals sent from transmission satellites and convert a received frequency to a lower frequency. When an antenna receiving satellite transmissions (not shown) receives a signal, the signal is divided into a horizontal polarization wave and a vertical polarization wave by a waveguide (not shown), and is connected to a converter that receives transmissions via satellite. Figure 2 shows a conventional converter that receives satellite transmissions. The conventional converter for receiving satellite transmissions includes a received signal amplifier circuit section 51 for separately amplifying a horizontal bias wave and a vertical bias wave, a demultiplexer circuit section 52 for demultiplexing each amplified received signal into two signals with a limit frequency of 11.7 GHz, a filter section 53 for attenuating the image signal of each demultiplexed received signal, a frequency conversion section 54 for converting the frequency of each received signal leaving the filter section 53, a amplifier circuit section 55 for amplifying each received frequency signal converted, signal selection means 56 for selecting a received signal of one type from the received signals leaving the amplifier circuit section 55, and two regulators 57 and 58 to supply power source voltages to the circ section a received signal amplifier 51 for the signal selection means 56.

The received signal amplifier circuit section 51 has two amplifiers 59 and 60. The horizontal polarization wave is input to the amplifier 59 through an input end 51a and is amplified, and the vertical bias wave enters the amplifier 60 through from an input end 51 by is amplified. The demultiplexer circuit section 52 has two demultiplexers 61 and 62, and demultiplexes the polarized waves that amplify the received signal amplifier circuit section 51 into analog received signals A1 and A2 having a frequency of 11.7 GHz or less, and in received signals digital D1 and D2 that have a frequency of 11.7 GHz or greater. With this demultiplexing, the received signals are demultiplexed into four received signals and outputted from the demultiplexer circuit section 52. The filter section 53 has four band elimination filters (BEF). to 66. The received signals A1, A2, D1 and D2 leaving the demultiplexer circuit section 52 are input to the BEF 63 to 66, respectively. Among these BEFs, BEF 63 and 64 attenuate signals that have frequencies of 7.8 GHz to 8.8 GHz, which correspond to the frequency band of the image signals of the analog signals A1 and A2, and the BEF 65 and 66 attenuate the signals having frequencies of 8.45 GHz to 9.5 GHz, which correspond to the frequency band of the image signals of the digital received signals D1 and D2.

The received signals whose image signals attenuate BEF 63 to 66 are input to the frequency converter section 54. The frequency converter section 54 has four mixers 67 to 70 and two oscillators 71 and 72. The received signals A1, A2 , D1 and D2 are entered into mixers 67 to 70 that correspond to BEF 63 to 66, respectively. The oscillator 71 enters an oscillation signal having a frequency of 9.75 GHz in the mixers 67 and 68, and the oscillator 72 enters an oscillation signal having a frequency of 10.6 GHz in the mixers 69 and 70. The frequencies of the signals analog receivers A1 and A2, entered into mixers 67 and 68, are converted to those ranging from 950 MHz to 1950 MHz, and the frequencies of digital received signals D1 and D2, input to mixers 69 and 70, are converted to those that vary from 1100 MHz to 2150 MHz. The received signals of converted frequency a1, a2, d1 and d2 are input to the amplifier circuit section 55. The amplifier circuit section 55 has four amplifiers 73 to 76. The received signals of converted frequency a1, a2, d1 and d2 are input to amplifiers 73 to 76 that correspond to the mixers 67 to 70, respectively. The received signals amplified by the amplifiers 73 to 76 are input to the signal selection means 56. The signal selection means 56 has a signal change circuit 77, two change control circuits 78 and 79 and two output terminals 56a and 56b. The signal change circuit 77 selects one of the outputs of the amplifiers 73 to 76 according to the control of the shift control circuit 78, and connects it to a terminal 56a, and selects one of the outputs of the amplifiers 73 to 76 according to the control of the shift control circuit 79 and connects it to the other output terminal 56b. The output terminals 56a and 56b are connected to different receivers (not shown). Each receiver sends a selection control voltage used to operate each circuit section of the converter to receive satellite transmissions and to control the signal selection means 56. This selection control voltage is set to a first DC voltage of, for example, 18 V to select a horizontal bias wave, and set to a second DC voltage of, for example, 14 V to select a vertical bias wave. To select a digital received signal d1 or d2, a high frequency voltage of 22 KHz is superimposed on the corresponding DC voltage. More specifically, to select the horizontal bias analogue transmission signal a1, the first DC voltage is sent; to select the analog vertical bias transmission signal a2, the second DC voltage is sent; to select the horizontal bias digital transmission signal d1, the first DC voltage is sent in which the high frequency voltage is superimposed; and to select the vertical bias digital transmission signal d2, the second DC voltage on which the high frequency voltage is superimposed is sent to the corresponding output terminal 56a or 56b as a selection control signal. A selection control voltage sent to the output terminal 56a is input to the shift control circuit 78 and the regulator 57 through a high frequency shock coil 80. In the same way, a selection control voltage sent to the output terminal 56b is input to the shift control circuit 79 and the regulator 58 through a high frequency shock coil 81. The regulators 57 and 58 supply a power source voltage of, for example, 8V to the circuit sections 51 to 56. These two regulators 57 and 58 have the same structure and each has a voltage stabilizing circuit formed of an integrated circuit. The output ends of the regulators 57 and 58 are connected to an output voltage terminal of the power source 84 through reverse current prevention diodes 82 and 83., respectively. Therefore, even if a receiver is stopped, this converter for receiving satellite transmissions is ready to operate, since the power source voltage is supplied to the circuit sections 51 to 56. Since the two regulators 57 and 58 are connected in series between the two output terminals 56a and 56b, the shift control circuits 78 and 79 only work by the shift control voltage sent from one of the output terminals 56a and 56b. As already described above, since the conventional converter for receiving satellite transmissions has the two regulators 57 and 58 to be able to operate even when one of the two receivers connected to the output terminals 56a and 56b is stopped, the converter is expensive.

BRIEF DESCRIPTION OF THE INVENTION Accordingly, it is an object of the present invention to provide a converter for receiving economical satellite transmissions. The above objective is achieved in accordance with the present invention by providing a convert to receive transmissions via satellite including a plurality of output terminals, each of which can be connected to an external receiver, to each of which, any of the four types of selection control voltages specified in accordance with combinations of high and low DC voltages, and whether a high frequency voltage is superimposed with a predetermined frequency, is sent separately from the external receiver, and from each one of which a signal to receive satellite transmissions of a selected type according to the selection control voltage is output separately to the external receiver; a signal selection means for selecting a type of a reception signal in accordance with the selection control voltage from four types of signals to receive satellite transmissions different from each other in the form of a modulation signal and in the polarization direction so that each exit terminal allows them to exit; a regulator for receiving the selection control voltage sent from each output terminal in common and for converting the selection control voltage to a predetermined power source voltage for output; and a plurality of high frequency attenuation means connected in series between each output terminal and an input end of the regulator.

Since each high frequency attenuation means is connected in series between each output terminal and the input end of the regulator, the selection control voltage sent to each output terminal reaches the input end of the regulator, with the high superimposed frequency that is sufficiently attenuated by means of high frequency attenuation. The selection control voltage does not flow in the reverse direction at other output terminals from the input end of the regulator. A type of a reception signal is selected separately and outputs to each output terminal. Therefore, only one regulator is required for a plurality of selection control voltages sent from a plurality of output terminals. The converter for receiving satellite transmissions may be configured such that each of the plurality of high frequency attenuation means includes a transistor and a low pass filter having a cutoff frequency lower than the high voltage frequency. frequency. In this case, a simple circuit attenuates the high frequency voltage. The converter for receiving satellite transmissions can be configured so that the low pass filter is formed of a resistor and a capacitor that determines the cutoff frequency; and the selection control voltage is input to the collector of the transistor, the resistor is connected between the collector and the base, the base is connected to ground through the capacitor, and the emitter is connected to the input end of the regulator.

In this case, a wavy voltage attenuation effect is greater and the signal selection means is positively operated, and erroneous operation is prevented. As an alternative, the converter for receiving satellite transmissions can be configured such that a high frequency shock coil and a reverse current prevention diode are connected together in series between the output terminal and the collector of the transistor. In this case, even if a high reverse voltage is applied to the high frequency attenuation medium, the reverse voltage does not destroy the transistor.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a circuit diagram of a converter for receiving satellite transmissions in accordance with an embodiment of the present invention. Figure 2 is a circuit diagram of a conventional converter for receiving satellite transmissions.

DETAILED DESCRIPTION OF THE PREFERRED MODALITY With reference to Figure 1, a converter to receive satellite transmissions in accordance with one embodiment of the present invention will be described below. The converter for receiving satellite transmissions includes a received signal amplifier circuit section 1 for separately amplifying a horizontal bias wave and a vertical bias wave, a demultiplexer circuit section 2 for demultiplexing each amplified received signal in two signals with a limit frequency of 11.7 GHz, a filter section 3 for attenuating the image signal of each demultiplexed received signal, a frequency conversion section 4 for converting the frequency of each received signal leaving the filter section 3, a section of amplifier circuit 5 for amplifying each received frequency signal converted, a signal selection means 6 for selecting a received signal of a type from the received signals leaving the amplifier circuit section 5, a regulator 7 for supplying a voltage from power source to signal section amplifier circuit 1 for the signal selection means 6, and two high frequency attenuation means 8 and 9. The received signal amplifier circuit section 1 has two amplifiers 10 and 11. The horizontal polarization wave is input to the amplifier 10 to through an input end 1a and amplified, and the vertical polarization wave is input to the amplifier 11 through an input end 1 b and is amplified. The demultiplexer circuit section 2 has two demultiplexers 12 and 13, and demultiplexes the polarized waves which amplifies the received signal amplifier circuit section 1 into analog received signals A1 and A2 having a frequency of 11.7 GHz or less, and the signals received digital D1 and D2 that have a frequency of 11.7 GHz or greater. With this demultiplexing, the received signals are demultiplexed into the four received signals and output from the demultiplexer circuit section 2. The filter section 3 has four band elimination filters (BEF) 14 to 17. The received signals A1, A2, D1 and D2 leaving the demultiplexer circuit section 2 are input to the BEF 14 through 17, respectively. Among these BEFs, BEF 14 and 15 attenuate signals having frequencies of 7.8 GHz to 8.8 GHz, which corresponds to the frequency band of the image signals of the analog signals A1 and A2, and the BEF 16 and 17 attenuate signals having frequencies of 8.45 GHz to 9.5 GHz, which corresponds to the frequency band of the image signals of the digital received signals D1 and D2. The received signals whose image signals are attenuated by BEF 14 through 17 are input to the frequency converter section 4. The frequency converter section 4 has four mixers 18 to 21 and two oscillators 22 and 23. The received signals A1, A2, D1 and D2 are input to the mixers 18 to 21 corresponding to the BEF 14 to 17, respectively. The oscillator 22 enters an oscillation signal having a frequency of 9.75 GHz in the mixers 18 and 19, and the oscillator 23 enters an oscillation signal having a frequency of 10.6 GHz in the mixers 20 and 21. The frequencies of the signals analog receipts A1 and A2 input to mixers 18 and 19 are converted to those ranging from 950 MHz to 1950 MHz, and the frequencies of digital received signals D1 and D2 entered into mixers 20 and 21 are converted to those that vary from 1100 MHz at 2150 MHz. The signals received from converted frequency a1, a2, d1, and d2 are input to the amplifier circuit section 5. The amplifier circuit section 5 has four amplifiers 24 to 27. The signals received from converted frequency a1 , a2, d1 and d2 are input to amplifiers 24 to 27 that correspond to mixers 18 to 21, respectively. The signals received amplified by the amplifiers 24 to 27 are input to the signal selection means 6. The signal selection means 6 has a signal change circuit 28, two change control circuits 29 and 30, and two control terminals. Exit 6a and 6b. The signal change circuit 28 selects one of the outputs of the amplifiers 24 to 27 in accordance with the control of the change control circuit 29 and connects it to the terminal 6a, and selects one of the outputs of the amplifiers 24 to 27 according to the control of the change control circuit 30 and connecting it to the other output terminal 6b. The output terminals 6a and 6b are connected to different receivers (not shown). Each receiver sends a selection control voltage used to operate each circuit section of the converter to receive satellite transmissions and to control the signal selection means 6. This selection control voltage is set to a first DC voltage of, for example, 18 V to select a horizontal bias wave, and is set to a second DC voltage of, for example, 14 V to select a vertical bias wave. To select a digital received signal d1 or d2, a high frequency voltage of 22 KHz is superimposed on the corresponding DC voltage. More specifically, to select the analog signal received from horizontal polarization a1, the first DC voltage is sent; to select the analog received signal of vertical polarization a2, the second DC voltage is sent; to select the digitally received digital bias signal d1, the first DC voltage is sent on which the high frequency voltage is superimposed; and to select the vertical bias digital transmission signal d2, the second DC voltage, on which the high frequency voltage is superimposed, is sent to the corresponding output terminal 6a or 6b as a selection control signal. A selection control voltage sent to the output terminal 6a is input to the change control circuit 29 through a high frequency shock coil 31, and to the high frequency loss means 8 through a prevention diode. of reverse current 33. In the same manner, a selection control voltage sent to the output terminal 6b is input to the shift control circuit 30 through a high frequency shock coil 32, and to the high frequency 9 through a reverse current prevention diode 34. The high frequency attenuation means 8 includes a transistor 36 and a low pass filter 42 formed of a resistor 37 connected between the collector and the base of the transistor 36 and a capacitor 38 connected between the base of transistor 36 and the ground. The collector of the transistor 36, which serves as an input end of the high frequency attenuation means 8, is connected to the cathode of the diode 33, and the emitter of the transistor 36, which serves as an output end of the high attenuation medium. frequency 8 is connected to an input end of the regulator 7. The high frequency attenuation means 9 has the same structure as the high frequency attenuation means 8. The high frequency attenuation means 9 includes a transistor 39 and a low pass filter 43 formed of a resistor 40 and a capacitor 41. The collector of transistor 39 is connected to the detector of diode 34 and the emitter of transistor 39 is connected to the input end of regulator 7. The cutoff frequency of the filter Low step 42 is specified by resistor 37 and capacitor 38. The cutoff frequency of low pass filter 43 is specified by resistor 40 and capacitor 41. Both cutoff frequencies are set n to be less than the frequency of the high frequency voltage included in a selection control voltage. Since the cutoff frequencies of the low pass filters 42 and 43 are set to be lower than the frequency of the high frequency voltage, as already described, a selection control voltage input to an output terminal 6a is sent to the the input end of the regulator 7, with the superimposed high-frequency voltage attenuating at a level which has practically no problem, by means of the high-frequency shock coil 31 and the high frequency attenuation means 8, and is blocked by the other high frequency attenuation means 9, and therefore it is not input to the other change control circuit 30. Since the high frequency attenuation means 8 and 9 are formed from combinations of the transistors 36 and 39 and the filters low pass 42 and 43, although the capacitances of the capacitors 38 and 41 in the low pass filters 42 and 43 are low, a wavy voltage attenuation effect is obtained. The regulator 7 has a voltage stabilizing circuit formed of an integrated circuit. The selection control voltages input to both output terminals 6a and 6b are input to the regulator 7 in common through the high frequency attenuation means 8 and 9. In other words, when at least one receiver is working, a DC voltage of 18 V or 14 V is input to the regulator 7, and the regulator 7 converts the input DC voltage, for example, to a DC voltage of 8 V, outputs it from a voltage output terminal of the power source 35, and sends it as a power source voltage to the circuit sections 1 to 6 of the converter to receive satellite transmissions. In the above embodiment, the converter for receiving satellite transmissions has a plurality of output terminals, namely, the two output terminals 6a and 6b. A converter for receiving satellite transmissions in accordance with the present invention may have three or more output terminals. The attenuation means 8 and 9 are formed of the transistors and the low pass filters in the above embodiment. Each attenuation means may include a low pass filter LC formed of an inductor and a capacitor. In this case, the same advantage is obtained.

Claims (4)

NOVELTY OF THE INVENTION CLAIMS

1. - A converter for receiving satellite transmissions comprising: a plurality of output terminals, each of which can be connected to an external receiver, to each of which, any of the four types of selection control voltages specified in In accordance with combinations of high and low DC voltages, and whether a high frequency voltage is superimposed with a predetermined frequency, it is sent separately from the external receiver, and from each of them a signal to receive transmissions via satellite of a selected type according to the selection control voltage is output separately to the external receiver; a signal selection means for selecting a type of a reception signal in accordance with the selection control voltage from four types of signals to receive satellite transmissions different from each other in the form of a modulation signal and in the polarization direction so that each exit terminal allows them to exit; a regulator for receiving the selection control voltage sent from each output terminal in common and for converting the selection control voltage to a predetermined power source voltage for output; and a plurality of high frequency attenuation means connected in series between each output terminal and an input end of said regulator.

2. - A converter for receiving satellite transmissions according to claim 1, further characterized in that each of the plurality of high frequency attenuation means comprises a transistor and a low pass filter having a lower cutoff frequency than the frequency of high frequency voltage.

3. A converter for receiving satellite transmissions according to claim 2, further characterized in that the low pass filter is formed of a resistor and a capacitor that determines the cutoff frequency; and the selection control voltage is input to the collector of the transistor, the resistor is connected between the collector and the base, the base is connected to ground through the capacitor, and the emitter is connected to the input end of the regulator.

4. A converter for receiving satellite transmissions according to claim 2, further characterized in that a high frequency shock coil and a reverse current prevention diode are connected together in series between the output terminal and the collector of the transistor.