MX9802208A - Interfase entre un canal de comunicaciones y un procesador. - Google Patents

Interfase entre un canal de comunicaciones y un procesador.

Info

Publication number
MX9802208A
MX9802208A MX9802208A MX9802208A MX9802208A MX 9802208 A MX9802208 A MX 9802208A MX 9802208 A MX9802208 A MX 9802208A MX 9802208 A MX9802208 A MX 9802208A MX 9802208 A MX9802208 A MX 9802208A
Authority
MX
Mexico
Prior art keywords
data
processor
communications channel
interfacing
computer
Prior art date
Application number
MX9802208A
Other languages
English (en)
Other versions
MXPA98002208A (es
Inventor
Manickam R Sridhar
Minh Hoang
John Wortman Jr
Timothy Allan Lis
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of MX9802208A publication Critical patent/MX9802208A/es
Publication of MXPA98002208A publication Critical patent/MXPA98002208A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

Un aparato (101) y un método para comunicarse entre un procesador (103) y un canal de comunicaciones (105), teniendo el procesador en el equipo de terminal de datos (102), tal como una computadora, un programa de aplicacion a las comunicaciones para proporcionar la transmision y recepcion de datos sobre un canal de comunicaciones (105), utilizando el procesador de la computadora sin el microprocesador o componentes del procesador de señal digital adicionales o redundantes. El aparato y método proporcionan la transferencia de datos entre el aparato de interfase (101) y el canal de comunicaciones (105) a una primer frecuencia determinada correspondiente a una velocidad de transmision de datos específica. El aparato y método proporcionan la transferencia de datos entre el aparato de interfase (101) y el procesador (103) a una segunda frecuencia indeterminada y proporcionan en almacenamiento interino de datos en la memoria (115) entre la transmision de datos (o recepcion de datos) y el procesamiento de datos, tal como modulacion de demodulacion, por le procesador de la computadora (103). El aparato y método proporcionan además la generacion de una señal de interrupcion al procesador para indicar la presencia de datos recibidos para su procesamiento y la ausencia de datos digitales para su transmision.
MXPA/A/1998/002208A 1996-02-28 1998-03-20 Interfase entre un canal de comunicaciones y un procesador MXPA98002208A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/607,911 US5802153A (en) 1996-02-28 1996-02-28 Apparatus and method for interfacing between a communications channel and a processor for data transmission and reception
US08607911 1996-02-28

Publications (2)

Publication Number Publication Date
MX9802208A true MX9802208A (es) 1998-08-30
MXPA98002208A MXPA98002208A (es) 1998-11-12

Family

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Also Published As

Publication number Publication date
WO1997032432A1 (en) 1997-09-04
EP0885517A4 (en) 2003-01-22
HK1019679A1 (en) 2000-02-18
EP0885517A1 (en) 1998-12-23
AU6962696A (en) 1997-09-16
US5802153A (en) 1998-09-01
CN1214172A (zh) 1999-04-14
KR19990087380A (ko) 1999-12-27
KR100358025B1 (ko) 2002-12-18
CN1201241C (zh) 2005-05-11

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