MX9801539A - Sistema y metodo para la deteccion secuencial en un sistema de manejo de memoria inmediata. - Google Patents

Sistema y metodo para la deteccion secuencial en un sistema de manejo de memoria inmediata.

Info

Publication number
MX9801539A
MX9801539A MX9801539A MX9801539A MX9801539A MX 9801539 A MX9801539 A MX 9801539A MX 9801539 A MX9801539 A MX 9801539A MX 9801539 A MX9801539 A MX 9801539A MX 9801539 A MX9801539 A MX 9801539A
Authority
MX
Mexico
Prior art keywords
cache management
sequential detection
management system
internal analysis
detection
Prior art date
Application number
MX9801539A
Other languages
English (en)
Other versions
MXPA98001539A (es
Inventor
Stephen T Fuld
Stephen S Selkirk
Original Assignee
Storage Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Storage Technology Corp filed Critical Storage Technology Corp
Publication of MX9801539A publication Critical patent/MX9801539A/es
Publication of MXPA98001539A publication Critical patent/MXPA98001539A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/31—Providing disk cache in a specific location of a storage system
    • G06F2212/312—In storage controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

Se presenta un sistema y método que detecta secuencialmente sucesos a la memoria de un sistema de almacenamiento de datos en memoria inmediata. El sistema se basa ya sea en un análisis interno de la ubicacion de los productos a los cuales se intenta tener acceso o bien en indicios del sistema de procesamiento huésped. El análisis interno se diseña para realizarse en el nivel de registro evitando así un numero sustancial de fallas antes de la deteccion de la secuencialidad.
MXPA/A/1998/001539A 1995-08-29 1998-02-26 Sistema y metodo para la deteccion secuencial enun sistema de manejo de memoria inmediata MXPA98001539A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08521026 1995-08-29
US08/521,026 US5867685A (en) 1995-08-29 1995-08-29 System and method for sequential detection in a cache management system

Publications (2)

Publication Number Publication Date
MX9801539A true MX9801539A (es) 1998-10-31
MXPA98001539A MXPA98001539A (es) 1999-01-11

Family

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Also Published As

Publication number Publication date
CA2230542A1 (en) 1997-03-06
AU707876B2 (en) 1999-07-22
US5867685A (en) 1999-02-02
JPH11506238A (ja) 1999-06-02
DE69609515T2 (de) 2000-12-14
AU6961096A (en) 1997-03-19
DE69609515D1 (de) 2000-08-31
EP0847555B1 (en) 2000-07-26
EP0847555A1 (en) 1998-06-17
WO1997008621A1 (en) 1997-03-06

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Legal Events

Date Code Title Description
FA Abandonment or withdrawal