MX349151B - Modo de rafaga ahorrador de energia. - Google Patents

Modo de rafaga ahorrador de energia.

Info

Publication number
MX349151B
MX349151B MX2014013937A MX2014013937A MX349151B MX 349151 B MX349151 B MX 349151B MX 2014013937 A MX2014013937 A MX 2014013937A MX 2014013937 A MX2014013937 A MX 2014013937A MX 349151 B MX349151 B MX 349151B
Authority
MX
Mexico
Prior art keywords
burst
performance state
energy efficient
burst mode
workload
Prior art date
Application number
MX2014013937A
Other languages
English (en)
Other versions
MX2014013937A (es
Inventor
Ramadoss Murali
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of MX2014013937A publication Critical patent/MX2014013937A/es
Publication of MX349151B publication Critical patent/MX349151B/es

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G06F9/4893Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues taking into account power or heat criteria
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/324Power saving characterised by the action undertaken by lowering clock frequency
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3265Power saving in display device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3296Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Debugging And Monitoring (AREA)
  • Power Sources (AREA)

Abstract

La duración de la carga de trabajo de una unidad de procesamiento de gráficos es supervisada a través de un número de tramas. Un umbral "K" puede utilizarse para determinar si la carga de trabajo es Ráfaga o sostenida durante un número de tramas y otra constante de tiempo "t" puede utilizarse para supervisar el comportamiento de ráfaga. Si el dispositivo continúa estando en el modo de ráfaga durante el tiempo "t" y el estado de desempeño no es un estado ahorrador de energía, entonces el sistema puede disminuir el estado de desempeño a "Pe" y supervisar si la misma carga de trabajo permanece como Ráfaga. Si no es así, el estado de desempeño puede elevarse al siguiente estado de desempeño más alto.
MX2014013937A 2013-12-16 2014-11-14 Modo de rafaga ahorrador de energia. MX349151B (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/107,070 US9792151B2 (en) 2013-12-16 2013-12-16 Energy efficient burst mode

Publications (2)

Publication Number Publication Date
MX2014013937A MX2014013937A (es) 2015-10-29
MX349151B true MX349151B (es) 2017-07-14

Family

ID=53368557

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2014013937A MX349151B (es) 2013-12-16 2014-11-14 Modo de rafaga ahorrador de energia.

Country Status (2)

Country Link
US (1) US9792151B2 (es)
MX (1) MX349151B (es)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10747441B2 (en) * 2017-08-30 2020-08-18 Micron Technology, Inc. Efficient allocation of storage connection resources
US11140243B1 (en) 2019-03-30 2021-10-05 Snap Inc. Thermal state inference based frequency scaling
US11442513B1 (en) * 2019-04-16 2022-09-13 Snap Inc. Configuration management based on thermal state
CN114008562A (zh) * 2019-07-15 2022-02-01 英特尔公司 使用自适应算法的基于工作负载的动态能量性能偏好
WO2021034496A1 (en) * 2019-08-20 2021-02-25 Intel Corporation Apparatus and method to improve switchable graphics system performance and energy consumption based applications and real-time system power/thermal budgets

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8284205B2 (en) 2007-10-24 2012-10-09 Apple Inc. Methods and apparatuses for load balancing between multiple processing units
US9104411B2 (en) * 2009-12-16 2015-08-11 Qualcomm Incorporated System and method for controlling central processing unit power with guaranteed transient deadlines
US20120144215A1 (en) * 2010-12-03 2012-06-07 Advanced Micro Devices, Inc. Maximum current limiting method and apparatus
US8924758B2 (en) * 2011-12-13 2014-12-30 Advanced Micro Devices, Inc. Method for SOC performance and power optimization
US9128721B2 (en) * 2012-12-11 2015-09-08 Apple Inc. Closed loop CPU performance control
US10043230B2 (en) * 2013-09-20 2018-08-07 Nvidia Corporation Approach to reducing voltage noise in a stalled data pipeline

Also Published As

Publication number Publication date
US20150169381A1 (en) 2015-06-18
US9792151B2 (en) 2017-10-17
MX2014013937A (es) 2015-10-29

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