MX2015001936A - Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 7/15 code rate.
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Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 7/15 code rate.
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Application filed by Korea Electronics TelecommfiledCriticalKorea Electronics Telecomm
Publication of MX2015001936ApublicationCriticalpatent/MX2015001936A/en
H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L27/00—Modulated-carrier systems
H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
H—ELECTRICITY
H03—ELECTRONIC CIRCUITRY
H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
Abstract
A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 7/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
MX2015001936A2014-02-132015-02-12Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 7/15 code rate.
MX2015001936A
(en)
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 256-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and 16-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 10/15 and 256-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 256-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 64-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and 16-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of10/15 and 256-symbol mapping, and bit interleaving method using same.
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same.