MX2014008136A - Apparatus, system, and method for creating one or more slow-speed communications channels utilizing a real-time communication channel. - Google Patents

Abstract

An intelligent electronic device having a slow speed communications link creates one or more virtual communications channels using unused or dedicated bits from a primary real-time communications channel. The virtual communications channels are used to transport low-speed information, such as fault location information, device configuration information, device revision information, and date / time information.

Description

APPARATUS, SYSTEM AND METHOD TO CREATE ONE OR MORE LOW SPEED COMMUNICATION CHANNELS USING A REAL-TIME COMMUNICATION CHANNEL FIELD OF THE INVENTION The present invention relates generally to apparatuses, systems and methods for maximizing the use of communication resources within an energy protection device, and more particularly for the creation of one or more virtual communication channels from a quantity small data within a stream of data in real time.

BACKGROUND OF THE INVENTION In the U.S. patent No. 5,793,750, the content of which is incorporated herein by reference, describes a communication system between two microprocessor-based protective relays for an electrical power system. Each of the two relays in that system has both transmitter and receiver modules, to directly transmit indication status bits indicative of the result of selected protective functions of one relay from one relay to the other, and vice versa.

The output status indication bits are sometimes used to identify the existence and REF: 249530 location of a fault in the portion of the power line served by the two relays. One or both relays can initiate a circuit breaker trip action based on the exchange of such information. The output status indication bits may be the result of processing functions in one of the relays that involves the voltages and / or currents of the power line supervised by that relay. The output status indication bits can be used for various control, status, indication and protection functions. Examples of protection functions include permissive overload transfer trigger actions (POTT), permissive sub-range transfer (PUTT) trigger actions, unblocking actions Directional comparison (DCUB) and Direct Download Trigger (DTT, for its acronym in English). Other relay-to-relay operations are possible using particular output status indication bits.

The advantage of the communication system described in the '750 patent is that it is fast and secure. Protective relays typically perform their monitoring functions several times in each cycle of the power system. The communication system that described in the '750 patent provides the results of these monitoring functions from one relay to the other relay. The information is transmitted directly over a communication link from an origin relay which may or may not trigger its associated circuit breaker based on its operational results, to the other relay. The receiver relay then uses the transmitted information, in the form of digital bits, to perform its own calculations in process, to produce various protective actions such as triggering and closing a circuit breaker when appropriate. The communication between the two relays can be bidirectional, which allows the two relays to exchange information regarding the results of their own calculations quickly and safely.

The communication systems in power protection devices are often based on low bandwidth connections, such as 56 kpbs or 64 kbps serial connections. However, these connections are often used to communicate real-time data such as, for example, direct transfer tripping, that is, tripping of a local circuit breaker after receiving an instruction from a remote protection device, communications from permission-to-trigger of a permissive address comparison protection scheme and trip blocking in a directional comparison scheme of blocking. Since these communications are critical in time, these schemes generally require the full bandwidth of a low bandwidth connection so that data can be communicated as required and with a sufficient guarantee of integrity.

Another communication application used by power protection devices is known as "line current differential" or 87L function. An 87L function communicates local currents as samples or phasors, limiting terms derived from local currents, activated / deactivated bits associated with various functions such as, for example, indication of time synchronization to an external device, detection of external faults, tests in progress, load current compensation in progress and other quantities. In addition, user-configurable bits and synchronization information such as, for example, timestamps, sequence numbers and time-out messages can also be communicated to facilitate data synchronization between two devices using the communications channel. Since an 87L application is critical in time, it also frequently uses the entire communications bandwidth.

Although the above functions are critical for the operation of energy protection devices, it would also be beneficial to support and use other communications between the devices without the installation of a separate physical communications channel.

SUMMARY OF THE INVENTION The described invention achieves its objectives through the use of an intelligent electronic device that provides a real-time communication system as well as one or more virtual communication channels.

In one embodiment of the invention, an intelligent electronic device includes a processor and a transmitter module coupled to a low speed serial communications link. The processor causes the transmitting module to transmit a real-time data channel that consumes almost all of the available bandwidth in the communications link. However, the processor additionally causes the transmit module to inject a background session into one or more unused bits of the real-time data channel thereby generating one or more virtual communication channels.

Additional refinements of the described invention show different uses of the communication channel. For example, a multi-end fault location service can be carried out by sharing voltage data and / or calculated system impedances. In addition, fault records can be transmitted between devices without interrupting the normal operation of the intelligent electronic device. Similarly, device diagnostic data can also be transmitted.

BRIEF DESCRIPTION OF THE FIGURES Although the characteristic features of this invention will be particularly emphasized in the claims, the invention itself and the manner in which they can be made and used, can be better understood with reference to the following description taken in connection with the accompanying figures which form part of the invention. the same, in which similar reference numbers refer to similar parts during the various views and in which: Figure 1 is a simplified single line schematic diagram of a typical wide area power system.

Figure 2 is a simplified block diagram of a direct relay-to-relay communication system within the power system of Figure 1 constructed in accordance with one embodiment of the invention.

Figure 3 is an exemplary received frame of the relay-to-relay direct communication system of Figure 2.

Figure 4 is a simplified functional block diagram of a system constructed in accordance with an embodiment of the invention wherein the primary power protection device controls the operation of a backup power protection device.

Figure 5 is a simplified block diagram of a relay-to-relay direct communication system for use in the power system of Figure 1, constructed in accordance with one embodiment of the invention.

Figure 6 is an exemplary received frame of the relay-to-relay direct communication system of Figure 4.

Figure 7 is a simplified block diagram of a direct relay-to-relay communication system within the power system of Figure 1 constructed in accordance with an alternative embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION As indicated in the above, the present invention is based on and is an improvement to the U.S. patent communication system. No. 5,793,750 which includes a direct communication link between two protective relays serving an electric power device, the system supports a communication distribution or protocol that involves eight data channels for exchange of output status indication bits between the two relays quickly and safely. The data bits of channel TMB1 to TMB8 identify eight transmission bits in eight data channels.

These bits, when received by the other relay, are identified as channel data bits received from RMB1 to RMB8, where RMB1 through RMB8 are the "mirror" or Replication of transmitted channel data bits. The eight data channels can accommodate at least eight output status indication bits. However, as indicated above, in many distributions of two relays, only two or possibly three channels are necessary to communicate the output status indication bits. Using the present invention, the otherwise vacant channel space can now be utilized by additional selected data (described below) and an associated synchronization channel to synchronize the additional data.

The additional data may be digitized analog quantities, such as measurement data or may be "virtual terminal" data. In a virtual terminal implementation, a human user or another application uses the direct communication link to communicate with the other relay. For example, the human user can use in direct communications link to control or request the other relay. An application such as, for example, an integration protocol such as DNP3 can also be used in communication link in the virtual terminal implementation.

Figure 1 is a simplified single-line schematic diagram of a typical wide-area power system 10. As illustrated in Figure 1, the power system 10 includes, among other things, two generators 12. each configured to generate three-phase sinusoidal waveforms, for example, 12 kV three-phase sinusoidal waveforms, two booster energy transformers 14 configured to increase the 12 kV sinusoidal waveforms at a higher voltage, such as 138 kV and several circuit breakers 18. The boosting power transformers 14 provide the higher voltage sinusoidal waveforms to a long-distance transmission line number such as the transmission lines 20. In one embodiment, a first substation 16 can be define to include the generators 12, the step-up transformers 14 and the circuit-breakers 18, all interconnected by means of a common first link 19. At the end of the long-distance transmission lines 20, a second substation 22 may include power transformers energy reducers 24 to transform higher voltage sinusoidal waveforms r to lower voltage (for example, 15 kV) sinusoidal waveforms suitable for distribution via a distribution line to several end users 26 and loads 30.

As mentioned previously, the power system 10 includes protective devices and methods to protect the elements of the power system from faults or other abnormal conditions. The protective devices and procedures use a variety of Protective logic schemes to determine if there is a fault or other problem in the power system. For example, some types of protective relays use a current differential comparison to determine if there is a fault in the protection zone. Other types of protective relays compare the magnitudes of the calculated phasors, representative of the sinusoidal waveforms of the power system to determine if there is a fault in the protection zone. Frequency detection and harmonic content detection techniques are also incorporated into protective relays to detect fault conditions. Similarly, thermal model schemes are used by protective relays to determine if there is a thermal problem in the protection zone.

Referring again to Figure 1, a first and second protective relays 100 and 102 adapted to provide, for example, overcurrent protection to the transmission line 21 are also included. As described below, the first and second protective relays 100 , 102 are also adapted to communicate via a communication link 34 that can be configured using one of several suitable means. Additional protective relays such as protective relay 104, adapted to communicate with the first relay protector 100 and / or second protective relay 102, may also be included in power system 10.

Figure 2 is a simplified block diagram of a direct relay-to-relay communication system 40 incorporating the power system 10. Although illustrated using the first and second protective relays 100, 102, it will be understood that the communication system 40 may include additional protective relays operatively coupled to the first and / or second relay 100, 102 and adapted to operate as described below. In addition, although illustrated using the first and second protective relays 100, 102, it is to be understood that the apparatus and method described herein is applicable to communication between any intelligent electronic device (IED) of the electronic system. energy 10.

To facilitate exposure, the first protective relay 100 is shown as the transmitting relay and includes, for example, a "transmitter" module 41 having a microcontroller 42 operatively coupled to a receiving and transmitting interconnect means; in this example, a universal asynchronous receiver / transmitter (UART) 43. The UART (transmitter) 43 is configured to convert bit octets of channel data (corresponding to the channel data) resulting from the operation of the first protective relay 100 in a single serial message stream for transmission to the outside via the communication link 34 to the second protective relay 102 and converting an incoming serial message stream (from the second protective relay 102) into channel data octets suitable for use in the first protective relay 100.

Similarly, the second protective relay 102 is shown as the receiver relay and includes, for example, a "receiver" module 44 having a second microcontroller 45 operably coupled to another UART 46, operational and configured as described above. Although not illustrated separately, each of the first and second protective relays 100, 102 includes both transmitter and receiver capability to allow communication. While illustrated as transmitter and receiver modules 41, 44 in a simplified functional block diagram format, the relay-to-relay direct communication system and method described herein can be implemented by means of a gate array microprocessor. programmable field (FPGA, for its acronym in English) running a computer program, a protection algorithm or a relay logic scheme. Additionally, although illustrated as a UART 43 operatively coupled to the first microcontroller 42 and a UART 46 operatively coupled to the second microcontroller 45, one any suitable interconnecting, transmitting and receiving means can be used to convert bit octets of channel data into a serial message stream for transmission via the communication link 34.

The transmitter module 41 and the receiver module 44 are operatively connected by means of the communication link 34. As indicated in the above, the communication link 34 can be implemented as an RF link, a microwave link, an audio link or a fiber optic link or other suitable means adapted to carry serial data. As illustrated, in addition to the output status indication bits, each of the transmitter and receiver modules 41, 44 is capable of transmitting / receiving other types of channel data in the form of serial messages. For example, channel data may include digitized analog values derived from analog quantities that require more than one single bit such as measurement information, breaker failure system security improvement information, reconnection enable information, transformer verification of instrument and multiple terminal failure location information, to mention a few.

With reference to the transmitter module 41, a distribution of eight data channels is configured so that two data channels, the data channel 47 and the data channel data 48 correspond to the conventional output status indication bits 57 as the channel data bit TMB1 and TMB2, respectively, from the transmitter module 41 of the first protective relay 100 to the receiver module 44 of the second protective relay 102. Three data channels, a data channel 49, a data channel 50 and a data channel 51 are dedicated to digitized analog values 59, 60 and 61 transmitted as channel data bits TMB3, TMB4 and TMB5, respectively, for the module transmitter 41 of the first protective relay 100 to the receiver module 44 of the second protective relay 102. Each of the digitized analog values 59, 60 and 61 are formed, for example, by converting a 32 bit floating point number representing an analog amount (for example, system impedances, currents, voltages) in a floating point number of 18 bits. The floating point number of 18 bits is then serialized so that one bit from each of the digitized analog values 59, 60 and 61 is included as channel data bits TMB3, TMB4 and TMB5, respectively, in sequentially transmitted messages up to that all of the bits associated with the digitized analog values 59, 60 and 61 are transmitted. For example, if each of the digitized analog values 59, 60 and 61 is expressed in 18 bits, 18 sequential serial messages are transmitted where the The first serial message includes the first bit of the digitized analog value 59 transmitted as channel data bits TMB3, the first bit of the digitized analog value 60 transmitted as the data bit of the channel TMB4 and the first bit of the digitized analog value 61 transmitted as a bit of TMB5 channel data. Similarly, the second serial message includes the second bit of the digitized analog value 59 and transmitted as the data bit of the channel TMB3, the second bit of the digitized analog value 60 is transmitted as the data bit of the channel TMB4 and the second bit of the data digitized analog value 61 is transmitted as channel data bit TMB5, and so on.

It should be noted that although some accuracy deteriorates, the conversion scheme that converts a 32-bit floating-point number (representing the analog quantity) into a corresponding 18-bit floating-point number enables faster transmission of the second protective relay 102. It should also be noted that other conversion schemes can be used based on the measured analog quantity, the accuracy required and the desired transmission speed.

Two additional data channels, a data channel 52 and a data channel 53 provide the virtual terminal data transmitted as channel data bits TMB6 and T B7, respectively, from the transmitter module 41 of the first protective relay 100 to the receiver module 44 of the second protective relay 102. As indicated above, the virtual terminal data refers to data provided by a user located at a local relay (e.g., the first relay 100), a remote relay (for example, the second relay 102) via communication link 34. In this configuration, the local relay operates as a virtual terminal to allow the user to request and control the remote relay with the port user interconnection in family series that transmits data in channels that are not otherwise used. The virtual terminal scheme also adds fast measurement / operation capability. Like the digitized analog values described in the above, the virtual terminal data is bit-per-bit serialized so that, for example, the 18-bit virtual terminal data is bit-by-bit transmitted in 18 messages in sequential series where the first two bits are indicators of useful information and the last sixteen bits are two octets of 8-bit data. For example, 18-bit virtual terminal data can be expressed as: piP2di6di5di4di3di2diidiod9d8d7d6d5d4d3di where pi = 1 indicates that di-d8 is an octet of useful information, and p2 = 1 indicates that d9-di6 is an octet of useful information ( see figure 3).

The eight data channels 54 are dedicated to synchronization information transmitted as channel data bits TMB8 from the transmitter module 41 of the first protective relay 100 to the receiver module 44 of the second protective relay 102. The synchronization information allows the synchronization of the channels data associated with the analog values 59, 60 and 61 and the virtual terminal data 62. Thus, when any of the data channels 47 to 53 are used for only one other than the output status indication bits, assigns a dedicated synchronous channel for synchronization information transmitted as data bits of channel TMB8.

Although illustrated using a distribution of eight data channels, it should be understood that a different number or distribution and / or allocation of data channels can be used for the first and second protective relays 100, 102 of the communication system 40. Accordingly, the two data channels of the output status indication bits in combination with the three analog value data channels and the two data channels of the virtual terminal data illustrated in FIG. 2 are arbitrary. The output status indication bits may occupy more or less or none of the data channels, the analog values may occupy more or less or none of the data channels and the terminal data can occupy more or less or none of the data channels. In addition, an analog value can occupy more than one data channel for faster transmission. Similarly, virtual terminal data can occupy more than one data channel for faster transmission.

Furthermore, in one embodiment of the invention, the distribution and / or assignment of the data channels can be fixed, while in another embodiment, the distribution and / or assignment of the data channels can change dynamically during the operation of the relay, depending on the desired configuration of the one or more of the protective relays 100, 102. As a result, the speed of reception of the channel data by the receiver module 44 is adjustable based on the allocation of the channel data with respect to the number of data channels.

For example, if data from the 18-bit virtual terminal is dynamically assigned to a data channel during a period of high activity of relay operation, bit-by-bit is transmitted in 18 sequential serial messages and then reassembled for use by the receiver relay. If a message is transmitted every 1 millisecond via communication link 34, 18 milliseconds are required for the reception of all 18-bit virtual terminal data. In contrast, if the same 18 bit virtual terminal data is dynamically allocates three data channels during a period of least activity of relay operation, is transmitted in groups of 3 bits in 6 sequential serial messages, which requires six milliseconds.

Prior to transmission, each of the eight data bits of channel TMB1 to TMB8 is encoded by an encoder 65 to form a coded message 66 using one of any number of suitable techniques. The encoded message 66 can thus have one of any number of suitable formats, depending on the selected coding scheme. For example, in a coding scheme, the encoded message 66 may include 36 or 40 bits divided into four characters of 9 bits (for a length of 36 bits) or of 10 bits (for a length of 40 bits) plus a number of free bits. The number of free bits may depend on the selected transmission speed.

Continuing with the example, the bits can be assembled so that the first character of 9-10 bits includes a single start bit followed by the six data bits of channel TMB1 to TMB6, followed by an odd parity bit and one or two stop bits, as selected by the user. The second character can include a second single start bit, followed by the six bits of channel data TMB5, TMB6, TMB7, TMB8, TMB1 and TMB2, followed by an odd parity bit and one or two stop bits. The third character may include a start bit followed by the six data bits of channel T B7, TMB8, TMB1, TMB2, TMB3 and TMB4, followed by an odd parity bit and a two stop bit. The fourth character and the final character in the message may include a single start bit followed by the six data channel bits TMB3 to TMB8, followed by an odd parity bit and one or two stop bits. The remaining bits, if any, are a variable number of free bits, depending on the speed of data transmission.

Using such a coding scheme, each of the channel data bits TMB1 through TMB8 are repeated three times in the four character portions of an encoded message 66 with unique stop and parity bits and one or two stop bits inserted between each character portion of the encoded message 66. This coding scheme allows receiving, in the second protective relay 102, to verify errors that may have occurred during the transmission.

In addition to the assembly of bits in messages, each of the first and second protective relays 100, 102 may be adapted to encode and decode further using an identifier pattern that is selected during system configuration. For example, if programmed to include a particular identifier pattern, the transmit encoder 65 in a logical manner inverts one of the four characters in each message as a means to encode the identifier pattern in the message. As described below, the receiving relay or second relay 102 then ensures that the received message has been encoded in the correct identifier pattern. Although described as assembled messages in which a character is logically inverted, it should be understood that other suitable encoding formats and schemes can be used by the encoder 65 to generate the encoded message 66.

The coded message 66 is then applied to the UA T 43, adapted to satisfy various operating parameters for the system. In general, the UART 43 converts the encoded message 66 into a serial message 67 for transmission as part of a serial message stream via the communication link 34. Consequently, the receiver UART 43 must also be able to verify the received serial message 67 for appropriate framing (the presence of a stop bit per octet) and the appropriate parity, and detecting overvoltage errors.

The UART 43 can be programmed for different baud rates. For example, it can be programmed for baud rates that vary from 300 to 115,000. The UART 43 is further adapted to synchronize serial messages of both transmission and reception using externally supplied transmit and receive clocks. As will be appreciated by a person ordinarily skilled in the art, the method of synchronizing bits, using the start and stop bits or using synchronization clocks, is one of several methods for proper synchronization.

Subsequent to being prepared for transmission by the UART 43, the serial message 67 is transmitted over the communication link 34 to the receiver module 44. The sampling and transmission rates may vary depending on the desired operation of the transmitting relay.

Referring now to the receiver node 44, the receiver UART 46 provides the counterpart functions of the transmitting UART 43. When the serial message 67 is received by the receiving module 44, the UART 46 performs several data checks on each character of the message in 67 series. It also checks each character of the messages in series 67 for proper framing, parity, and overvoltage errors.

From UART 46, the characters of the serial message 67 are passed to a decoder 68. In general, the decoder 68 reassembles groups of four characters in order to reconstruct the four character message. Then, the decoder 68 verifies each of the messages for errors, and also examines the results of the UART verifications described in the above. If any of the checks fail, the decoder 68 discards the message and reassigns a DOK indicator (correct data) 94 for that message in a register 95 (see Figure 3).

More specifically, in the illustrated example, the decoder 68 ensures that there are three copies of the eight data channel bits TMB1 to TMB8 included in the encoded message of four transmitted characters 66. If an identifier pattern is used In order to encode the encoded message 66, the decoder 68 also checks to ensure that the encoded message 66 includes the identifier pattern. It should be noted that the above coding / decoding scheme is only one of any number of suitable coding / decoding schemes to enable error detection that can be used in the method and apparatus of the invention.

As a result of the operation of the decoder 68, the DOK indicator 94 and the channel data bits RMBl to RMB8 are provided. The channel data bits received from RMBl to RMB8 are the mirror or replica of the channel data bits transmitted from TMB1 to TMB8. The data verification indicator (DOK) 94 provides an indication of whether errors have been detected in the received message.

Similar to the transmitter module 41 of the first relay 102, the receiver module 44 of the second relay 102 includes a distribution of eight data channels where two data channels are dedicated to the output status indication bits, three data channels are dedicated at three digitized analog values, two data channels are dedicated to virtual terminal data and one data channel is dedicated to synchronization information. Accordingly, the output status indication bits 57 are received as channel data bits RMB1 and RMB2 by means of the data channels 70 and 71, respectively, and are applied to one or more security counters 69. The counters 69 operate to ensure that the state of the received channel data bits RMB1 and RMB2 remain constant for a preselected number of received serial messages 67 before the output status indication bits are used by the downstream processes . Ensuring that the state of the output status indication bits remain constant increases the reliability and security associated with the output status indication bits 57.

Because two bits of channel data, R B1 and RMB2, are transmitted bit by bit, synchronization of these bits is not required. The channel data bits RMB1 and RMB2 are used by the second relay 102 for making determinations regarding the operation of the power system 10 (as detected by the first protective relay 100) that includes a possible circuit breaker trip action when appropriate. In the illustrated example, the digitized analog values 59, 60 and 61 are received as channel data bits RMB3, RMB4 and RMB5 via a data channel 72, a channel 73 and a channel 74, respectively. Each of the three digitized analog values 59, 60 and 61 are received serially, one bit per message per data channel, and then are parallelized in a parallelizing element 78. The paralleling element 78 reassembles each of the three analog values digitized from the received successive decoded messages 58. As indicated in the above, in the illustrated example, each of the digitized analog values 59, 60 and 61 includes 18 bits. In one mode, 16 bits are used for information while the two remaining bits are not used. Therefore, for every 18 messages, a complete original analog value is received on each corresponding data channel.

Similarly, virtual terminal data 62 is received as channel data bits RMB6 and RMB7 via data channels 75 and 76, respectively. Like the analog values 59, 60 and 61, the virtual terminal data 62 is received serially, one bit per second. message per data channel, and they are also parallelized in the paralleling element 78. In the embodiment illustrated, the virtual terminal data 62 includes eighteen bits. Sixteen bits of the eighteen bits are used for virtual terminal data, where the sixteen bits are divided into two octets of eight bits. The two remaining bits are used to indicate which of the two eight-bit octet fields actually contains the virtual terminal data and which, if any, are free (for example, waiting for a user input). In this way, for every 18 decoded messages 58, two virtual terminal octets are received on each corresponding data channel 75, 76. After parallelization by means of the paralleling element 78, the analog values and the virtual terminal data are provided to the second protective relay 102.

Again, the particular distribution of the bits of eight data channels TMB1 to TMB8 are established in accordance with the user's communication requirements. Different numbers of output status indication bits, analog values and virtual terminal data can be used to form seven bits of data bits from eight channels TMB1 to TMB8.

A data channel 77, or synchronization channel, is dedicated to the remnant channel data bits RMB8.

The channel data bits RMB8 of the synchronization channel allow the receiving decoder 68 and the parallelizing element 78 to find the serial start and stop limit messages including the digitized analog values and the virtual terminal data. The synchronization channel is necessary when any of the other channel data bits include the digitized analog values or the virtual terminal data. If all of the channel data bits are used for output status indication bits only, synchronization is not necessary and data channel 77 can be used for output status indication bits.

In order to determine that a complete bit message has been received (four characters), the second relay 102 identifies the first octet of each of the bit messages by means of message synchronization. In one embodiment, message synchronization is maintained by counting module 4 from the first octet received after octet synchronization is obtained. As a result, every time the counter has gone full circle, the first octet is received.

Figure 3 illustrates an exemplary received frame 80 of the direct relay-to-developer communication system 40, in accordance with one embodiment of the invention. As illustrated, the received frame 80 includes 18 messages where a series of the "lower" channel data bits (TMB8) provides the 18 bit synchronization information after encoding, transmission and decoding. In addition, analog values and virtual terminal data are received as data bits from channel RMB3 to RMB7 via data channels 72 to 76.

With reference to the data channel 77, or the synchronization channel, a special frame synchronization pattern is used, for example 000001 to indicate that all other data channels (e.g., data channels 70 to 76) are at start of a frame. In the example that is illustrated, when the last six bits received in the sync channel with 000001 (1 is the most recent), then the other data channels are determined to be in a frame boundary. For example, the synchronization channel can be expressed as d8d7d6d5vd4d3d2di lpt000001 where dx = virtual terminal data, 1 = a binary one, 0 = binary zero, p = 1 indicates that the virtual terminal data is valid, v is an octet of virtual terminal indicator; normally it is 1 but it can be set to 0 to indicate that the special indicator octet is in the virtual terminal data and t = time synchronization bit.

A comparator 91 in FIG. 3 is adapted to enable the detection of a special frame synchronization pattern in the six bits of channel data received. more recently (from the six most recently received messages). Upon detection of the special frame synchronization pattern by operation of the comparator 91, a module 18 counter 92 is interrogated. If the module 18 counter 92 is not zero, it is reset to zero and the data in the synchronization, the virtual terminal data and the analog value channels (ie, the channels 72 to 77) since the last synchronization signal of valid frame (FS) 97 has been discarded. Therefore, if the module 18 counter 92 is at zero, or if all of the 18 most recent correct data indicators (DOK) 95 are valid (for example, a binary value 1) and if the comparator 91 is determined to be indicates the detection of the special frame synchronization pattern, then a Y gate 96 determines the FS 97 signal, which results in the analog values and virtual terminal data being used by the receiver, or second relay 102.

The synchronization channel, dedicated to the channel data bit RMB8, includes an additional virtual terminal character separated into two four-bit segments, 80 and 82. In addition, a bit 84 has a binary value 1 if the additional virtual terminal character contains valid data and has a binary value of 0 if the additional virtual terminal character is free (which may be the case if the virtual terminal session is waiting for user input). A bit 85 of the synchronization channel 77 has a binary value 1 and a bit 86 typically has a binary value 1 except under special conditions described below. When both of bits 84 and 85 have a binary value 1, five consecutive zeros are not possible in the synchronization channel. This ensures that the frame synchronization pattern 000001 detected by the comparator 91 can only be presented in frame boundaries.

The additional terminal character contained in semioctets 80 and 82 may also include control characters, intended to indicate from one relay (transmitter) to the other (receiver) the moment when the virtual terminal communication must be established, terminated, placed in pause, etc. When one of these control characters is included in the additional virtual terminal character, bit 86 is forced to a binary value of 0. The special control characters are carefully selected by the system designer so that, even with the bit 86 at the binary value 0, the frame synchronization pattern 000001 can only occur at the frame boundary.

In addition, a bit T 98 in the synchronization channel comprises a separate serial data stream, the bit rate transmitted by 18 messages (frame).

This separate serial data stream contains date and time information. Each time the FS 97 signal is determined, a time synchronization device 88 accepts the T-bit 98. An additional frame synchronization system, similar to the frame synchronization system described in the foregoing, allows the synchronization device of the frame to be synchronized. time 88 recognize the boundaries between synchronization messages of successive times. Specifically, a specific frame synchronization pattern is placed in the serial data stream formed by the T 98 bit (ie, a t-bit serial data stream). A comparator detects the specific frame synchronization pattern and indicates that the time of day and the calendar day information contained in the serial data stream of the T bit can be used. The data included in the serial data stream of the T bit is formalized so that the frame synchronization pattern can only be presented in the frame boundaries. The time synchronization device 88 then updates the time of day clock and calendar day with the time of day and calendar day information contained in the bit-T serial data stream.

Unlike the typical (analog) control inputs of protective relays, the direct relay-to-relay communication system described in present includes communication link monitoring capability by detecting corrupted serial messages when they occur. That is, when a corrupted serial message is received by the receiving module 44, it can be concluded by the receiving module that the corrupted serial message is the result of a failed operation or degradation of the communication link 34 and / or the communication equipment. associated transmission. Suitable warning systems may be used to notify the user of the condition where the communication link 34 and / or associated equipment remains faulty for a predetermined duration.

The direct relay-to-relay communication system described herein also includes communication link supervision by means of detection of lost serial messages. For this reason, the serial messages 67 are transmitted via the communication link 34 at predetermined periodic intervals or at a predictable speed, and it can be concluded by the receiving module that one or more of the lost serial messages 67 are the result of a failure or degradation of the communication link 34 and / or the associated transmission equipment. For example, if the transmission module 41 transmits 250 messages in series every second (one message rate every 4 milliseconds) and the receiving module 44 does not receive a serial message in a period of 8 milliseconds (4 ms of normal speed plus a margin of 4 ms), it can be concluded that there is a problem with the communication link and / or associated equipment. In both cases, the DOK indicator 94 indicates the problem with the communication link 34 and / or the associated equipment and the received analog values and / or the virtual terminal data are not used by the receiver relay (see FIG. 3).

The direct relay-to-relay communication system described herein further includes the ability to determine communication link availability or channel availability, defined as that portion of the time of the communication link 34 and / or associated equipment that is capable of adequately provide uncorrupted serial messages 67. The availability of the communication link can be calculated by dividing the aggregate number of all unbroken serial messages received among the total expected serial messages in a recording period. For example, for a 24-hour recording period, at 250 serial messages per second, the transmitting module 41 transmits 21,600,000 messages and the receiving module 44 receives 21,590,000 serial 67 messages because 9000 of the serial messages were corrupted and 1000 of the serial messages were lost. The availability of the channel will therefore be 21,590,000 / 21,600,000 = 99.9537%.

An appropriate alarm system can be used to notify the user at the time when the availability of the channel falls below a predetermined threshold.

As will be appreciated by a person skilled in the art, variations of availability calculations are possible such as, for example, received frames account 80 to determine availability of digitized analog values and / or virtual terminal data. For example, because 18 received frames are needed to reconstruct an 18-bit digitized analog value, the reception of only 17 of the 18 frames can indicate an analog value availability of 94.44%.

Accordingly, the direct relay-to-elevator communication system described herein is adapted to: (1) directly communicate output status indication bits which represent the result of the protection functions by one of the relays, ( 2) directly communicate selected analog values representing one or more functions of the relay, (3) directly communicate virtual terminal data provided by a user to one of the relays via another relay, (4) monitor the communication link between the two relays , (5) determine communication link availability, and (6) provide timing synchronization. Analog values and terminal data Virtual devices are serially processed in successive messages on channels not used by the output status indication bits. The time synchronization data is processed serially in successive frames (18 messages) of data.

As indicated above, the number and allocation of data channels for the output status indication bits and the additional data (analog values and virtual terminal data) can be pre-selected by an operator or can be selected dynamically during operation of the relay. The additional data may only include analog values, only virtual terminal data or a combination of analog values and virtual terminal data. The synchronization channel is dedicated for purposes of synchronizing the additional data to transmit / receive additional virtual terminal data, time information and calendar information (date). This results in the channel capacity of the basic transmission distribution described in the '750 patent which is utilized to its maximum extent while providing the benefits of a fast and highly secure existing transmission of the output status indication bits.

Figure 4 illustrates an energy protection system 400 using a primary protection device 410 and one of backup 420 to overcome the operation of a circuit breaker 430. As illustrated, both the primary device 410 and the backup device 420 are identical. The circuit breaker provides a switch status signal 434, 436 to both devices, primary 410 and backup 420. The switch status signal 434, 436 indicates whether the switch is open or closed and is used by both primary device 410 as per backup device 420 to determine whether or not to open the circuit breaker upon detection of a fault.

The primary device 410 and the backup device 420 also provide overcurrent indications 444, 446 to an alarm distribution network 440. In addition, the switch provides a switch gas pressure alarm signal 438 to the backup device 420. As it will be explained later, the backup device transmits this alarm condition on a link 415 to the primary device 410. The primary device 410 processes the transmission and transmits a switch gas pressure alarm 448 to the alarm distribution network 440.

The primary device 410 is also connected to a communication network 450. An operator can use a 460 computer connected to the same network 450 to send instructions to the primary device 410. The operator can also direct instructions to the backup device 420 via the primary device 410, which is coupled to the backup device by the link 415.

Figure 5 is a block diagram of a device-to-device direct communication system 500 within the power system 400, constructed in accordance with an embodiment of the invention. Figure 5 is largely analogous to Figure 2 described above. However, Figure 5 uses sixteen data channels and its specific use is described in the following. The first eight data channels 531 to 538 are used as "virtual output bits" for the primary device. The virtual output bits 511 to 518 indicated as VOB! to VOB8 are transferred in the first eight data channels 531 to 538. The primary protective device 504 transmits the status of the virtual output channels to the backup protective device 556 which operates output contacts according to the virtual output channels, as will be explained later.

The following six data channels 519 to 524, indicated as IBi to IB6 (acronym in English for input bit) are virtual input channels. The primary protective device 504 collects the state of its contacts at input 508 and places the state collected in the bits input 519 through 524. These bits are then transmitted to the backup protector device 556 which maintains the corresponding virtual input bits and can use the virtual input bits in its general calculations.

The two final data channels 525 to 526, indicated as CMD1 to CMD2 are instruction channels. Using these channels, the primary protective device 504 can issue instructions to the backup device 556. The instructions can be retransmitted through the primary protective device 504 from an operator, as illustrated in FIG. 4. The instructions can also be issued from the operation of the primary device 504. For example, an external operator may alter the cold charge pickup setting of both the primary protective device 504 and the backup protective device 556 using data channels from CMD 525 to 526.

When the framework is ready to transmit, the processor encodes 550 data using any of a number of suitable techniques. The data is then passed to a UART 552, where it is transmitted by a link 555 to the backup protection device 556. The backup protection device 556 then retrieves the data from a 57ART UART and decodes the data into 580 data in sixteen. bits received in parallel 561 to 576. The bits received 561 through 576 are separated into 0B1-8 (acronym in English for output bits 1 to 8), 581 to 588, VIB1-6 (acronym in English for virtual input bit 1 to 6) 589 to 594 and CMDi-2 (acronym in English for bits of instruction 1 to 2) 595 a 596). The backup protection device adjusts its output contacts (not shown) to adapt them to the received output bits. It also updates its internal operations with the virtual input bits and executes any instruction required by the instruction bits.

Figure 6 is an exemplary received frame 600 of a device-to-device direct communication system 500, according to one embodiment of the invention. As illustrated, the frame received includes sixteen bits. Of these, eight are output bits 620. The processor 660 reconfigures the output contacts 651 to 658 to match the state of the output bits 620. The frame received also includes six virtual input bits 616, which correspond to input of the primary protection device 504. The processor 660 adjusts its internal memory and operation status based on the virtual input bits 630. Finally, the received frame includes two instruction channels 640. These channels may encompass messages that may be of many bits long and will need to be assembled frame by frame before they can be executed. Once the messages from instructions are assembled, executed by the instruction processor 640 which adjusts the internal state of the 660 processor and the 650 output contacts.

The virtual input bits 616 can be used to transfer the state of an input contact of one device to the other device. For example, a device can monitor signals such as circuit breaker service signal, circuit breaker test mode signal or a manual circuit breaker closing indication signal. The monitored signals can then be transformed into digital bits and can be transferred to the other device, where they are used internally in the calculations of the second devices. Other signals which can be monitored using virtual input bits are the on / off of cold charge pickup or the status of a second circuit breaker.

Each virtual output bit may be based on a unique setting within the primary protection device or a combination of settings within the primary protection device. The table below illustrates some common power protection settings: The virtual output bits can also be used in a way that a device, that is, the primary device; can control output contacts in another device; that is, the backup device. Some virtual output bit functions may indicate on / off overcurrent grounding, remote on / off indication and auto-reconnection of the second circuit breaker.

Thus, for example, using the described invention, a virtual output bit may be set in the primary based on an instantaneous negative sequence element defined as overcurrent in time (E50Q) or may be based on a negative sequence defined instantaneously-element of overcurrent in time and a defined instantaneous phase-element overcurrent in time (50PH) ..

Figure 7 describes a further refinement of the communication system described. As with the communication system described previously, this communication system makes use of unused bits within the useful information of a real-time communication stream. However, instead of communicating virtual terminal data, the refined communication system generates one or more general purpose virtual communications channels. These virtual communication channels can be transmitted along with the bandwidth-intensive data in real time on the same communication lines used by the data in real time. This aspect of communication systems that is described is especially useful when a real-time amount is communicated over a relatively low speed connection, such as, for example, a 56 kbps or 64 kbps serial connection. Under these circumstances, a single real-time signal may require the entire bandwidth of the communications medium and any additional amount that is desired to communicate will require additional physical communication lines. However, by using the described communication system, several low speed virtual channels can be generated using spare bits from the primary real-time communications session.

As an example, a "line current differential" or "87L" function transmits local currents as phasor samples as well as restriction terms derived from local currents and various bit quantities related to the 87L core function such as , for example, an indication of synchronization of the device to an external time source, an indication of the detection of an external fault, a test indication in progress and an indication of charging current compensation in progress. Since the 87L function is critical in time, using a relatively slow speed connection, a 87L function can transmit a packet approximately every 1 to 8 ms. Consequently, assuming a bit 1 not used within an 87L packet is used to create a single virtual channel, a communication speed of 250 bps can be achieved, assuming that an 87L packet is sent every 4 ms.

There are numerous functions that the low bandwidth virtual communication channels described herein can be used. These functions include, for example, multi-ended fault location, that is, sharing voltages, calculated system impedances or other special quantities to facilitate a better location of a failure compared to a single-end fault location method. that uses only data local, executing instructions on a remote relay such as placement in test mode, extracting fault and / or measurement records and event records from a remote device, extracting device diagnostic data from a remote device, changing the settings on a device remote, synchronization of clocks and clocks in devices that are not synchronized independently to another external time source, the creation of a virtual terminal through which instructions can be entered without interrupting the operation of the device and periodically send measurement data to facilitate control automatic and / or protective applications. Other applications are where a human operator needs to interconnect with a device located remotely from the operator or automatic functions that use low bandwidth / slow data which can be accommodated using the virtual channels described here.

Generally, a serial communications channel requires a data line, a clock, a framing, and a data integrity verification method. The described virtual communication channels provide data bits using one or several bits of an underlying real-time session such as an 87L session. Since packages of real-time quantities are usually Sent at regular intervals, the package itself can serve as a watch. Similarly, sequence numbers within packets of an underlying session can serve as a framing mechanism. Similarly, the underlying packets will contain integrity checks such as CRC or BCH checks and consequently the errors introduced by noise in the communication channel can be assumed to be detected and eliminated through the retry mechanism. Alternatively, any additional integrity verification can be attached to the packets transmitted via the virtual channel, which decreases the available bandwidth but adds an additional guarantee of data integrity.

Figure 7 is similar to Figure 2, except that certain elements have been modified and / or re-labeled. The transmitter module 741 includes several re-labeled elements such as element 57, labeled as "output bits" and has been relocated with element 757, labeled "real-time protection data", elements 59 to 62 have been removed and replaced with element 762 labeled "background session data", elements 47 to 54 have been removed and replaced with element 747 labeled "data frame" and element 743 labeled on the serial communications channel has been replaced by element 43 labeled as "UART". The function of the element 757 is similar to that of the removed element 57 except that the element 757 may contain additional real-time protection data such as, for example, "line current differential protection data". Elements 59 to 62 have been replaced with a general-purpose communication session on which analog values, virtual terminal data, multi-end fault location data, meter data and time synchronization data can be transmitted. The eight-bit data channel represented by elements 47 to 54 of Figure 2 has been replaced with element 747 which shows a communication channel of any size such as, for example, of 256 bits of which some bits are dedicated to a background session. The bits used for the background session can be background session bits. The element 43 of Figure 2 has been replaced with a synchronous serial communications channel interconnect 743 which can be configured to be compatible with various standard communications links such as, for example, ITU-T G.703, EIA- 422 and IEEE C37.94. The element 743 can also be configured to support one or more direct fiber links.

Changes to the receiver track the changes to the transmitter. That is, the receiving module 744 it includes a serial communication channel interconnect 746 that can be compatible with a number of standard communication links. Data frame 777 replaces elements 70 to 77 and can be a communication channel of any size such as, for example, 256 bits, of which some bits are dedicated to a background session. The real-time protection data module 787 may contain additional real-time protection data received from the transmitter module 741. In addition, the background session data module 792 receives the parallelized session data.

The description herein can be applied to various types of communication between the IEDs. As mentioned in the above, low speed communication channels can be used to communicate data between the IEDs within a real-time data stream. Low-speed communications can include various communications that can alter the calculations of operations performed by IEDs.

In one example, IEDs can communicate fault location information using low speed communication. The fault location information may be shared, for example, between the IEDs that protect a predetermined section of an electric power supply system. The IEDs can be configured to use Impedance-based fault location to determine the location of a fault. For example, IEDs can determine the location of a fault as a ratio of the distance to the fault from the length of an electric power line (such as a transmission line) calculated using impedance to the fault and the impedance of the electric power line. The ratio of the impedance to the fault on the impedance of the electric power line can provide an approximation of the location of the fault in the electric power line. For this purpose, the IEDs can communicate information such as voltage phasor, current phasor or other information related to the location of the impedance-based fault. This information can be used to calculate line constants such as the impedance of the electric power line. This information can be used to calculate fault information such as impedance to the fault. An IED can then use the line constant and fault information to calculate a possible fault location.

In another example, IEDs can be configured to use displacement wave based fault location to determine the location of a fault. Displacement waves can arise from the location of a fault to the outside, to the ends of a power line electric The IEDs along the electric power line can collect the displacement wave fault signals, process them and share the information using the low speed communication described here so that one or more of the IEDs can calculate the location of failure using the wave information that travels. The wave information that is shifted may include waveform arrival time or the like.

In another example, the IEDs can be configured to share device information stored in the IEDs using the low speed communications described herein. The device information may include device configuration information. The device information may include a settings file. The device information may include one or more settings. The device information may include revision information of physical device elements. The device information may include revision information of an indelible program (firmware).

In another additional example, the IEDs can be configured to exchange time and date information. In some configurations, the IEDs may receive a common time signal - common to the IEDs - such as communications network common time, GPS time provided using an IRIG signal, WWVB, WV or the like. If it is not available common time signal, IEDs can exchange time and / or date information. Also, in some configurations, IEDs do not receive a common time. IEDs may use low speed communications described herein to exchange time and / or date information. The exchange of time and / or date information allows IEDs without explicit time signal to continue with a consistent time with other IEDs, benefiting the accuracy of their time-stamped records and the general user interaction with the device.

Note that the invention described here uses a digital processor. Since the described algorithms do not require any particular processing feature, any type of processor will suffice. For example, microprocessors, microcontrollers, digital signal processors, field-programmable gate arrays, application-specific integrated circuits (ASICs), and other devices capable of digital calculations where the term processor is used are acceptable.

In addition, the term intelligent electronic device is used. An intelligent electronic device is defined, for the terms of this application, as an energy protection device (i.e., non-energy protective devices such as general computers are not considered) that includes a processor for decision making. Examples of intelligent electronic devices are relays of various types and reconnecting controls.

The foregoing description of the invention has been shown for purposes of illustration and description and is not intended to be exhaustive or to limit the invention to the precise form described. The description has been selected to better explain the principles of the invention and the practical application of these principles to allow other persons skilled in the art to better utilize the invention in various embodiments and various modifications as appropriate for the particular use. contemplated. It is intended that the scope of the invention is not limited by the specification but defined by the claims set forth in the following.

It is noted that in relation to this date, the best method known to the applicant to carry out the aforementioned invention is that which is clear from the present description of the invention.

Claims (12)

CLAIMS Having described the invention as above, the content of the following claims is claimed as property:

1. An intelligent electronic device that provides a channel of communications in real time and one or more virtual communication channels, characterized in that it comprises i) a processor and a transmitter module coupled to a serial communications link and the processor, the processor transmits real-time data related to a real-time communications channel; ii) the real-time communications channel, which includes a plurality of real-time bits and one or more bits; Y iii) the processor, which serializes and embeds a background session data channel in one or more bits to form a virtual communications channel, wherein the virtual communications channel communicates fault location information.

2. The intelligent electronic device according to claim 1, characterized in that the fault location information comprises fault location information based on mpedance.

3. The intelligent electronic device of according to claim 2, characterized in that the impedance-based fault location information is an impedance line measurement per unit.

4. The intelligent electronic device according to claim 1, characterized in that the fault location information comprises wave fault location information that is shifted.

5. The intelligent electronic device according to claim 4, characterized in that the traveling wave fault location information comprises time of arrival information of the waveform.

6. An intelligent electronic device characterized in that it provides a channel of communications in real time and one or more virtual communication channels, characterized in that it comprises iv) a processor and a transmitter module coupled to a serial communications link and the processor, the processor transmits real-time data related to a real-time communications channel; v) the real-time communications channel, which includes a plurality of real-time bits and one or more bits; Y vi) the processor, which serializes and embeds a background session data channel in one or more bits to form a virtual communications channel, wherein the virtual communications channel communicates device configuration information.

7. The intelligent electronic device according to claim 6, characterized in that the device configuration information is a settings file.

8. The intelligent electronic device according to claim 6, characterized in that the device configuration information is one or more settings.

9. An intelligent electronic device that provides a channel of communications in real time and one or more virtual communication channels, characterized in that it comprises i) a processor and a transmitter module coupled to a serial communications link and the processor, the processor transmits real-time data related to a real-time communications channel; ii) the real-time communications channel, which includes a plurality of real-time bits and one or more bits; Y iii) the processor, which serializes and embeds a background session data channel within one or more bits to form a virtual communications channel, in where the virtual communications channel communicates device revision information.

10. The intelligent electronic device according to claim 9, characterized in that the device revision information is review information of an indelible program.

11. The intelligent electronic device according to claim 9, characterized in that the revision information of the device is revision information of physical elements of the device.

12. An intelligent electronic device characterized in that it provides a channel of communications in real time and one or more virtual communication channels, characterized in that it comprises i) a processor and a transmitter module coupled to a serial communications link and the processor, the processor transmits real-time data related to a real-time communications channel; ii) the real-time communications channel, which includes a plurality of real-time bits and one or more bits; Y iii) the processor, which serializes and embeds a background session data channel in one or more bits to form a virtual communications channel, wherein the virtual communications channel communicates time information.