MX2008009953A - Digital broadcasting reception apparatus and robust stream decoding method thereof - Google Patents

Abstract

A digital broadcasting reception apparatus and robust stream decoding method thereof. The digital broadcasting reception apparatus includes a robust decoder that decodes a robust stream of a dual transport stream where a normal stream and the robust stream are combined. The robust decoder includes a first decoder that trellis-decodes the robust stream;a robust deinterleaver that interleaves the trellis-decoded robust stream;a second decoder that convolution decodes the deinterleaved robust stream;a robust interleaver that interleaves the convolution-decoded robust stream;and a frame formatter that adds decoded data of the second decoder to a part that corresponds to a position of the robust stream of a frame where the normal stream and the robust stream are mixed. Accordingly, a receiver of a simple structure can be provided.

Description

DIGITAL EMISSION RECEIVER APPARATUS AND ROBUST FLOW DECODER METHOD TECHNICAL FIELD The aspects of the present invention generally relate to the digital broadcast receiving apparatus and the robust flow decoding method thereof. More particularly, to aspects of the present invention which relate to a digital broadcast receiving apparatus and a robust flow decoding method thereof to provide a simple structure receiving apparatus.

BACKGROUND OF THE INVENTION The Advanced Television Systems Committee (ATSC) residual broadband scheme (VSB, which is a terrestrial digital broadcast system in the US, is disadvantageous since its reception performance is good in a poor channel environment, particularly In a Doppler attenuation channel environment, the ATSC has accepted new suggestions under preconditions that compatibility with existing receivers is provided, that existing receivers do not suffer from depreciation performance, and that performance is improved in Comparison with existing receivers in order to improve the VSB reception performance Among the suggestions for the improvement of the VSB system, the dual transport flow scheme allows the observation of the existing HD video in a good channel environment and allows a reception of video even in a poor channel environment The dual transport flow scheme generates and transmits a dual transport stream with n Robust data added to normal ATSC VSB conventional data in order to operate satisfactorily on a channel with a hostile environment. Hereinafter, with reference to Figures 1 to 4, a conventional dual transport flow receiving and transmission system is described to provide good performance by transmitting and receiving a normal flow and a robust flow and exchanging information through the flow strong. Figure 1 is a block diagram of a conventional VSB transmission apparatus, and Figure 2 is a block diagram of a robust processor of Figure 1. Referring first to Figure 1, the conventional VSB transmission apparatus includes a scrambler 10, a first encoder 1 1 RS (Reed Solomon), a first interleaver 12, a robust processor 13, a deinterleaver 14, a second encoder RS 15, a second interleaver 16, a frame encoder 17, and a multiplexer (MUX) 18. Although not shown in the drawing, a dual transport (TS) flow, which is the combination of normal current flow and robust flow, is mounted on the front end of the randomizer 10. The dual transport stream passes through the scrambler 10, the first encoder RS 1 1, the first interleaver 12, the robust processor 13, the deinterleaver 14, the second encoder RS 15, the second interleaver 16, the frame encoder 17, and the MUX 18, and lueg or is transferred. Since the robust processor 13, which is responsible for encoding the robust flow, following the first RS 1 1 encoder, the parity added to the dual transport stream at the front end of the scrambler 10 is not correct. Therefore, the deinterleaver 14 is provided after the robust processor 13, and the second encoder RS 15 is provided to modify the incorrect parity. At this time, the first RS 1 1 encoder only generates a parity space for interleaving without adding the actual parity. Referring now to Figure 2, the robust processor 13 includes a symbol interleaver 13a a normal / solid demultiplexer (N / R) (DE-MUX) 13b, a robust encoder 13c, a solid interleaver 13d, a MUX N / R 13e , and a disinfectant of symbols 13f. The dual transport stream interspersed by the first interleaver 12 is converted by the symbol into the symbol interleaver 13a, and is separated to a normal flow and a robust flow in the N / R DE-MUX 13b. The normal flow is entered directly into the MUX N / R 13e. The robust flow is processed in the robust encoder 13c. And the solid interleaver 13d, and then feed the MUX N / R 13e. The MUX N / E 13e multiplexes the normal flow and the robust flow, and the multiplexed flow is converted through the bit in the disinteracker of symbols 13f to be transferred. Figure 3 is a block diagram of a conventional VSB receiving apparatus, and Figure 4 is a block diagram of a robust decoder of Figure 3. Referring to Figure 3, the conventional VSB receiving apparatus includes a demodulator 20 for processing the dual transport stream received from the transmission apparatus VSB of Figure 1, an equalizer 21, a viterbi decoder 22, a robust decoder 23, a MUX 24, a first deinterleaver 25, an RS 26 decoder, a first descrambler 27 , a second deinterleaver 28, an erasure parity 29, a second descrambler 30, and a solid DE-MUX package 31. Referring now to Figure 4, the robust decoder 23 of Figure 3 includes a TCM MAP 23a decoder (TCM) refers to the modulation of the code by lattice; MAP refers to a maximum a posteriori probability), a solid deinterleaver 23e, a solid MAP decoder 23c, a solid interleaver 23d, a sequence formatter 23e, and a symbol deinterleaver 23f. As shown in the drawings, the exchange of information is conducted through a circuit formed between the TCM MAP decoder 23a and the robust MAP decoder 23c until sufficient performance is acquired. Until the completion of the information exchange, the data output from the TCM MAP decoder 23a is used to receive the normal flow, and the sequence formatter 23e tracks the data output from the solid MAP decoder 23c to the corresponding position of the Robust flow of normal flow and robust flow. By doing this, the empty position corresponding to the normal flow is transmitted through the symbol deinterleaver 23f to be used for the reception of robust flow.

DISCLOSURE OF THE INVENTION TECHNICAL PROBLEM As discussed above, when conventional VSB receiving and transmission apparatuses add solid coding, such as ¼ index coding, to robust flow using robust encoder 13c, the VSB receiver apparatus of Figure 4 should be assembled in accordance with the structure of the transmission apparatus VSB of Figure 3. As shown, the receiving apparatus VSB has a complicated structure.

TECHNICAL SOLUTION Aspects of the present invention have been provided to address the aforementioned and other problems as well as the disadvantages that occur in the conventional arrangement, and an aspect of the invention is to provide a receiver with a simple structure for the realization of the improvement. of the robust flow included in a dual transport flow even when the coding of the additive is implemented in several indices. Additional aspects and / or advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by the practice of the invention. In accordance with one aspect of the present invention, a digital broadcast receiving apparatus includes a robust decoder that decodes a robust flow of a dual transport stream wherein a normal flow and robust flow are combined. The robust decoder includes a first decoder that decodes the robust flow by lattice; a solid deinterleaver that deinterleaves the robust flow decoded by lattice; a second decoder decoding the de-interleaved robust flow by convolution; a solid interleaver that intercalates the robust flow decoded by convolution; and a sequence formatter that adds the encoded data of the second decoder to a part corresponding to the position of the robust flow of a sequence where the normal flow and the robust flow are mixed. When the information is exchanged between the first decoder and the second decoder is completed by the robust deinterleaver and the robust interleaver, the decoded data of the first decoder can be transmitted to be used for the reception of normal flow and the decoded data of the second decoder they can be provided to the sequence formatter. The digital broadcast receiving apparatus may further include a deinterleaver of symbols that converts the decoded data of the first decoder to the byte; and a symbol interleaver that converts the decoded data of the second decoder through the symbol. In accordance with another aspect of the present invention, a robust flow encodes a method of a transport stream wherein a normal flow and a robust flow are combined in a digital emission receiving apparatus, which includes decoding the robust stream: decode by convolution the robust de-interleaved flow; intercalate the robust de-interleaved flow; and adding the decoded data by convolution to a part corresponding to a position of the robust flow of a sequence where the normal flow and the robust flow are mixed. The data decoded by framework can be transmitted to be used by the reception of normal flow, and the data encoded by convolution can be added to a part corresponding to a position of the robust flow. The robust stream decoder method can further include the conversion of decoded data by framing through a byte; and convert the decoded data by convolution through the symbol.

ADVANTAGE EFFECTS As stipulated, in accordance with one embodiment of the present invention, the transmission of digital broadcast and receiving apparatus and the robust flow of the coding and decoding methods thereof do not complicate the structure of the receiver even when the additional coding is implemented in several indices to improve the performance of the robust flow included in the dual transport flow. In addition, advantageously, compatibility with the existing transmission and receiving devices is permitted.

Although some embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims. and its equivalents.

BRIEF DESCRIPTION OF THE DRAWINGS These and / or other aspects and advantages of the invention will be apparent and more easily appreciated from the following description of the modalities, taken in conjunction with the accompanying drawings in which: Figure 1 is a block diagram of an apparatus VSB transmission; Figure 2 is a block diagram of a robust processor of the figure 1; Figure 3 is a block diagram of a conventional VSB receiving apparatus; Figure 4 is a block diagram of a robust decoder of Figure 3; Figure 5 is a block diagram of a TS constructor which is applied to the present invention; Figures 6 and 7 are diagrams showing a format of a dual transport flow; Figures 8 and 9 are diagrams showing another formed of the dual transport stream; Figure 10 is a block diagram of a digital broadcast transmission apparatus which receives the dual transport stream of Figure 6 or Figure 7; Figure 11 is a block diagram of a digital broadcast transmission apparatus which receives the dual transport stream of Figure 8 or Figure 9; Figure 12 is a block diagram of a robust processor in accordance with an embodiment of the present invention; Figure 13 is a block diagram of a robust processor in accordance with another embodiment of the present invention; Fig. 14 is a diagram showing a robust encoder of the figure 12 and figure 13; Fig. 15 is a block diagram of a symbol desinteracker of Fig. 12 and Fig. 13; , Figure 16 is a block diagram of a robust processor in accordance with another embodiment of the present invention; Figure 17 is a block diagram of a digital broadcast receiving apparatus which is applied to the present invention; Fig. 18 is a block diagram of a robust decoder in accordance with an embodiment of the present invention; Fig. 19 is a block diagram of a robust decoder in accordance with another embodiment of the present invention; Figure 20 is a flowchart outlining a robust flow coding method in accordance with one embodiment of the present invention; and Figure 21 is a flowchart outlining a robust flow decoding method in accordance with an embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION Reference will now be made in detail to the present embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein as reference numbers they refer to similar elements completely. The embodiments are described below in order to explain the present invention referring to the figures. Figure 5 is a block diagram of a TS constructor. A dual transport flow, which is applied to aspects of the present invention, is the combination of a normal flow and a robust flow. The dual transport stream can be generated in the TS 100 constructor of Figure 5. Referring now to Figure 5, the TS 100 constructor includes a Reed-Solomon (RS) 110 encoder, a placeholder 120, an interleaver 130, and a MUX TS 140. A normal flow and a robust flow are respectively entered into the TS 100 constructor. At this time, the normal flow is entered directly into the MUX TS 140, while only the robust flow passes through the TS 1 encoder. 10, the placeholder 120, and the interleaver 130 and then it is fed into the MUX TS 140. The parity is added to the robust flow in the RS 110 encoder., and placeholder 120 generates an area in which the parity is to be interleaved in. interleaver 130. Next, the MUX TS 140 builds a dual transport stream by multiplexing normal flow and robust flow. This method of generating a dual transport stream is well known to those skilled in the art, and thus the detailed description of the TS 100 constructor will be omitted for brevity. Figures 6 and 7 are diagrams showing the formats of a dual transport flow. Typically, an MPEG packet consists of 1 byte synchronization, a 3 byte header, and a payload of 184 bytes. The MPEG packet header includes a packet identifier (PID). The type of data contained in a part of the payload determines whether the MPEG packet is the normal flow or the robust flow. The flow (a) of Figure 6 is an example of a robust flow entry to the TS 100 constructor. The payload part contains the solid data. The solid data is processed in the RS 110 encoder, the 120 placeholder, and the interleaver 130 of the TS 100 constructor and then feeds the MUX TS 140. The current (b) of FIG. 6 is an example of a normal flow entered. to the TS 100 constructor. While the payload part contains the normal data, the flow (b) also includes an adaptation field in which the solid data is inserted taking into account the combination with the robust flow. The adaptation field includes a 2-byte AF header and an N-byte null data space. The robust flow (a) of Figure 6 and the normal flow (b) of Figure 6 are multiplexed in the MUX TS 140 in order to construct a dual transport flow as shown in flow (c) of Figure 6. Figure 7 shows another combination of robust flow and normal flow. A whole package contains either solid data or normal data. The TS MUX 140 provides robust flow and normal flow at a rate of 1: 3. Although the robust flow and the normal flow are shown as being arranged at an index of 1: 3 by way of example, the arrangement is not limited to this exemplary index. Figures 8 and 9 are diagrams showing another format of the dual transport flow. The flow (a) of Figure 8 is a robust flow, and a flow (b) of Figure 8 is a normal flow that includes an S-byte fill byte in an adaptation field. The S-byte fill byte is an area in which a supplementary reference sequence (SRS) will be inserted through an SRS inserter, to be explained. The MUX TS 140 builds a dual transport flow as shown in flow (c) combining the robust flow (a) and the normal flow (b). Figure 9 shows a combination of robust flow that includes padding bytes and normal flow in which a whole packet contains either solid data or normal data. The robust flow and the normal flow are arranged at the rate of 1: 3 by means of an example. It should be noted that the positions of the solid data and the pad byte can be altered if necessary. Figure 10 is a block diagram of a digital broadcast transmission apparatus receiving the dual transport stream of Figure 6 or Figure 7. In this embodiment of the present invention, the digital broadcast transmission apparatus includes a scrambler 201 , an adder of a parity area 203, a first interleaver 205, a robust processor 207, a de-interleaver 209, an RS 21 encoder 1, a second interleaver 21, a frame encoder 215, and a MUX 217. Randomizer 201 randomizes the input of the dual transport stream from Constructor 100. The dual transport stream fed to scrambler 201 is formatted as a stream (c) of figure 6 or as in figure 7. If an MPEG header is used, the stream Dual transport can be 187 bytes. The parity area additive 203 adds an area so parity can be inserted into the randomized dual transport stream for error correction. Parity is inserted into this area in the RS 211 encoder, to be explained. The first interleaver 205 interleaves the dual transport flow that the added area has to insert the parity. The interposer is used to change the position of the data in a sequence, instead of changing the data per se. The robust processor 207 carries out the coding in order to improve the robust flow performance included in the interleaved dual transport stream. The robust processor 207 will be explained below with reference to FIGS. 12 through 17. The first deinterleaver 209 deinterleaves the dual transport stream processed in the robust processor 207. The RS 21 encoder 1 adds the parity to the deinterleaved dual transport stream. In doing so, the RS 21 1 encoder inserts the parity in the area that was added to the dual transport stream through the parity area additive 203. The second interleaver 213 interleaves the dual transport stream that has the added parity. The frame encoder 215 performs frame encoding in the interleaved dual transport stream. The MUX 217 adds a segment synchronization signal and a field synchronization signal to the dual transport stream coded by truss and multiplex. Then, although not illustrated, the dual transport stream to which the segment synchronization signal and the field synchronization signal have been added by passing through the modulation of the channel and the signal conversion of an RF channel band , and then it is transmitted. Figure 1 1 illustrates a digital broadcast transmission apparatus in accordance with another embodiment of the present invention. In particular, FIG. 11 is a block diagram of a digital transmission transmission apparatus receiving the dual transport stream of FIG. 8 or FIG. 9. In accordance with FIG. 11, the transmission apparatus of FIG. The digital broadcast includes a scrambler 201, an SRS inserter 202, a parity area builder 203, a first interleaver 205, a robust processor 207, a deinterleaver 209, an RS 21 encoder 1, a second interleaver 213, a compatibility generator parity 214, a frame encoder 215, and a MUX 217. The digital broadcast transmission apparatus of this embodiment has a structure similar to that of the digital broadcast transmission apparatus of FIG. 10. Therefore, the reference numbers identical are used with respect to similar elements. Scrambler 201 receives the dual transport stream which includes the fill byte in the adaptation field as shown in flow (c) of figure 8 or as shown in figure 9. The SRS inserter 202 inserts an SRS in the fill byte included in the dual transport stream which has been randomized in the randomizer 201. By doing this, the mixing and loss ratio of the payload because the SRS can be determined in accordance with the insertion index of the AF header and the fill byte into the dual transport flow. The compatibility of the parity generator 214 generates a compatibility parity based on a packet of a dual transport stream where the parity is added by the RS 211 encoder and based on the dual transport stream that is encoded by framing through the encoder framing 215. The parity generator 214 compatibility provides the compatibility parity generated to the frame encoder 215. The framing encoder 215 co-frames the dual transport stream that has been interleaved by the second interleaver 213 and provides the flow of frame-coded dual transport for parity generator compatibility 214. Subsequently, when parity compatibility is powered from the parity compatibility generator 214, the frame encoder 215 adds the parity support to the interleaved dual transport stream and provides it to the MUX 217. The MUX 217 adds a signal to the segment synchronization and a field synchronization signal to the dual transport stream where the parity compatibility has been added by the fabric encoder 215, multiplexes and transfers the resulting flow. Fig. 12 is a block diagram of a robust processor in accordance with an embodiment of the present invention. As shown in Figure 12, the robust processor 207 in accordance with one embodiment of the present invention includes a De-MUX N / R 207a, a robust coder 207b, a robust interleaver 207c, and a MUX N / R 207e. The DE-MUX N / R 207a demultiplexes the dual transport flow that has been interleaved by the first interleaver 205 and thus separates the normal flow and the robust flow. Then, the DE-MUX N / R 207a converts the robust flow of the byte format into two bits starting from the most important bit (MSB) to at least one least important bit (LSB) in order to, and providing the two bits converted to the robust interposer 207c. For example, when an income of 1 byte, that is, an 8-bit income is numbered from the MSB to the LSB in order to, that 7, 6, 5, 4, 3, 2, 1, 0, the income 8-bit is converted to 4 symbols in the following order (, 6), (5,4), (3, 2), and (1.0). Then, the DE-MUX N / R 207a provides the normal flow, which is separated through the demultiplexer, to the MUX N / R 207e, and provides the robust flow, which is converted to symbols, to the robust coder 207b. The robust encoder 207b convolutionally encodes the robust flow fed from the DE-MUX N / R 207a. In the present, the convolution coding refers to the parity added with respect to the robust flow. In accordance with this embodiment of the present invention, an encoder of the Repetitive Systematic Code type can be used as the robust encoder 207b and will be described in more detail with reference to FIG. 14. The robust interleaver 207c intersperses the convolutionally encoded robust stream. The MUX N / R 207e transfers a dual transport stream by multiplexing the normal flow fed from the DE-MUX N / R 207a and the robust flow fed from the deinterleaver of the symbol 207d. Figure 13 is a block diagram of a robust processor in accordance with another embodiment of the present invention. Since the robust processor 207 of Figure 13 has a structure similar to that of the robust processors 207 of Figure 12 and they share the same elements, but with differences as will be described hereinafter, the same reference number 207 is used herein to identify both the robust processors 207 of FIGS. 12 and the robust processor 207 of FIG. 13. As shown in FIG. 13, the robust processor 207 includes the same elements as the robust processor 207 of FIG. 12 , in particular, a DE-MUX N / R 207a, a robust encoder 207b, a robust interleaver 207c, and a MUX N / R 207e. The robust processor 207 of FIG. 13 also includes a symbol 207d disinteracker. The symbol deinterleaver 207d deinterleaves the robust interspersed flow. The symbol deinterleaver will be described in more detail with reference to FIG. 15. FIG. 14 is a diagram showing the robust encoder 207b of FIGS. 12, 13 and 16. The robust encoder 207b operates in accordance with the 120 position marker. , which has been illustrated with reference to figure 5. For example, if the placeholder 120 generates a data entry 7, 6, 5, 4, 3, 2, 1, 0 starting from MSB to the LSB to the data 2 bytes in the following order of (7, x, 5, x, 5, x, 4, x) and (3, x, 2, x, 1, x, 0, x) for ½ index coding, the robust encoder 207b receives and encodes only the data /, 5, 3, 1 of 2 bits forming a symbol when the data entry is converted into 4 symbols in the order (7, 6), (5, 4), (3 , 2), (1, 0). The generated 2-bit transfer can be replaced even in a part that has no information. When the RSC type encoder like the one shown in figure 14 is used for the robust encoder 207b, the parities are simply replaced in the part that does not have information since there is no change in the income or in the exit. In a mode where the robust encoder 207b carries out the coding of ¼ of the index, the placeholder 120 loads only one bit of 4 successive bits with data having information, and inserts an arbitrary value into the remaining three bits. At this time, 2 symbols consecutively fed into the robust encoder 207b, only one bit has the information. As mentioned above, the robust encoder 207b operates with respect to only one bit of the data input, and creates the 4-bit output to replace a part of 4 bits having information or having no information. For example, when the placeholder 120 transfers (a, x, y, z) with respect to a 1-bit entry "a" (x, y, z are arbitrary values without information), two symbols of (a, x ), (and, z) that are entered in sequence are generated by a byte to symbol conversion, which is well known. Only a part of the data "a" of the input is received in accordance with the operation of the position marker 120 for the 4-bit transfer. The 4-bit output is replaced with the input of 2 symbols of (a, x) and (y, z). In a modality in which an RSC type encoder as shown in FIG. 14 (the V? Index encoder) is used for the robust encoder 207b, the resulting transfer of 1/4 index can be duplicated. When two symbols of (a, x), (y, z) are received in the input, only "a" is used as the input and (p1, p2) is transferred. When the output of (p1, p2) is generated, (a, p), (a, p) can be transferred. Of the 4 successive transfer bits generated for the coding of ¼ of index in placeholder 120, and replace all 4-bit inputs by making an output. As illustrated above, when the 120 placeholder operates, two successive symbols, which are generated from the 1-bit input data using the byte to symbol conversion, which group two bits starting from the MSB to the LSB , are fed to the robust encoder 207. In other words, if the conventional robust processor 13 includes a deinterleaver of symbols 13f in FIG. 2, since the two symbol positions generated from the first 1-bit input are mixed, the conventional digital broadcast receiver apparatus needs to correspond to the position of two symbols in the designated phase. However, in the embodiment of the present invention, as the two transferred symbols generated from the appearance of data entry in succession, the positions of the two symbols can be acquired at any time. Thus, the design of the digital broadcast receiving apparatus can be simplified. Fig. 15 is a block diagram of the symbol deinterleaver 207d of Fig. 13.

The deinterleaver of the symbol 207d serves to de-interleave the robust interspersed flow. Symbol deinterleaver 207d includes a MUX N / R 207d1, a byte / symbol converter 207d2, and a DE-MUX N / R 207d3. The transfer of the robust encoder 207b passes through the robust interposer 207c, which is used to improve the performance in terms of information exchange in the robust decoder of a digital broadcast receiver apparatus, to be explained, and the symbol deinterleaver 207d . Afterwards, the transfer is inserted in the original position of the robust flow combining with the normal flow in the MUX N / R 207e and then it is transferred. The symbol deinterleaver 207d is used to comply with the simple information exchange under the MUX N / R 207d1, the byte / symbol converter 207d2, and the DEMUX N / R 207d3, without having to go through the byte conversion to conventional symbol in digital broadcast receivers. The MUX N / R 207d1 multiplexes and combines the normal flow and robust flow fed into the 207d symbol deinterleaver. The byte to symbol converter 207d2 converts the normal flow and the robust flow that are multiplexed into the MUX N / R 207d1, by the byte. The DE-MUX N / R 207d3 demultiplexes and separates the normal flow and the robust flow that were converted by the byte into the byte / symbol converter 207d2, and then transferred to the separate flows. The symbol deinterleaver 13f of the conventional rugged processor 13 of Fig. 2 operates with respect to all data of normal flow and robust flow, while the symbol deinterleaver 207d in accordance with this embodiment of the present invention operates with respect to only the robust flow. In addition, the symbol deinterleaver 207d can be determined to have a different value in accordance with the robust flow position of the entered data. As the symbol deinterleaver 207d is affected by the deinterleaver 209 and the byte to symbol conversion, its size is equal to the symbol size transmitted to the robust stream for 52 segments. For example, the number of robust flow space that appears in 52 segments is 52/4 + 13. At this point, taking into account the conversion of 1 byte to 4 symbols, the symbol deinterleaver 207d can serve as a block interleaver 128 * 4 * 13 = 6656. Figure 16 is a block diagram of the processor 207 in accordance with another embodiment of the present invention. Since the robust processor 207 of Figure 16 has a structure similar to the robust processors 207 of Figures 12 and 13 and shares the same elements, but with differences as will be described later herein, the same reference numerals 207 are used herein to identify both the robust processors 207 of FIGS. 12 and 13 and the robust processor 207 of FIG. Figure 16. While the robust processor 207 as shown in Figure 13 includes the symbol deinterleaver 207 and the robust interleaver 207c separately, in the robust processor 207 in accordance with the embodiment shown in Figure 16, the symbol deinterleaver 207d and the robust interleaver 207d are implemented as a single interleaver 207f. In other words, the symbol deinterleaver 207d and the robust interleaver 207c operate in the same unit size. Thus, as shown in Figure 16, the symbol deinterleaver 207d and the robust interleaver 207c can be implemented as an interleaver which is an integrated interleaver 207f. In Figure 17 is a block diagram of a digital broadcast receiving apparatus in accordance with an aspect of the present invention.

Referring to Figure 17, the digital broadcast receiving apparatus applied to the present invention includes a demodulator 301, an equalizer 303, a viterbi decoder 305, a first deinterleaver 307, a RS 309 decoder., a first descrambler 31 1, a robust decoder 313, a second deinterleaver 315, a parity eraser 317, a second descrambler 319, and a robust DE-MUX 321. The demodulator 301 receives the dual transport stream from the apparatus of digital broadcast transmission of Figure 10 or Figure 1 1, detecting the synchronization in accordance with the synchronization signal added to the baseband signal, and carry out the demodulation. The equalizer 303 equalizes the dual transport stream demodulated by the demodulator 301. In more detail, the equalizer 303 can remove the interface of the received symbols by compensating the distortion of the dual transport stream channel due to the multi-path of the channel. The viterbi 305 decoder corrects errors with respect to the normal flow of the dual transport stream and transfers a symbol packet by decoding the error correction symbol. The first deinterleaver 307 deinterleaves the normal flow that has been decoded by viterbi through the viterbi decoder 305. The RS 309 decoder decodes by RS the normal flow that has been deinterleaved by the first deinterleaver 307. The first descrambler 311 descrambles and transfers the flow normal that has been decoded by RS through the RS 310 decoder. The robust decoder 313 decodes the robust flow of the dual transport stream equalized by the equalizer 303. The robust decoder 313 will be illustrated in detail with reference to FIGS. 18 and 19 The second interleaver 315 interleaves the robust flow decoded by the decoder 313. The parity draft 317 eliminates the parity that was added to the robust flow interspersed by the second interleaver 315. The second descrambler 319 descrambles the robust flow from which the parity was eliminated by the parity draft 317. The robust DE-MUX 321 demultiplexes the robust flow that was descrambled by the second descrambler. 319. Figure 18 is a block diagram of a robust decoder in accordance with one embodiment of the present invention. Referring to Figure 18, the robust decoder 313 includes a first decoder 313a, a robust deinterleaver 313b, a second decoder 313c, a robust interleaver 313d, and a sequence formatter 313e. The first decoder 313a decodes the robust flow by lattice. The robust deinterleaver 313b deinterleaves the robust flow that was decoded by latticework by the first decoder 313a. The second decoder 313c decodes by convolution the robust flow de-interleaved by the robust deinterleaver 313b. The robust interleaver 313d intersperses the robust flow decoded by convolution by a second decoder 313c. The frame formatter 313e adds the decoded data of the second decoder 313c to the corresponding part of the position of the robust flow in the frame where the normal flow and the robust flow are mixed. When the exchange of information is completed between the first decoder 313a and the second decoder 313c through the robust deinterleaver 313b and the robust interleaver 313d, the decoded data of the first decoder 313a is transferred to be used for the reception of the normal flow and the data decoded from the second decoder 313 c are provided to the sequence formatter 313e. Fig. 19 is a block diagram of a robust decoder 313 in accordance with another embodiment of the present invention. Since the robust decoder 313 of Figure 19 has a similar structure for the robust decoder 313 of Figure 18 and compares the same elements, but with added features as described herein, the same reference number 313 is used in the present to identify both the robust decoder 313 of FIG. 18 and the robust decoder 313 of FIG. 19. Referring to FIG. 19, the robust decoder 313 includes a first decoder 313a, a symbol deinterleaver 313f, a robust deinterleaver 313b, a symbol interleaver 313g, a robust interleaver 313d, a second deinterleaver 313c, and a sequence formatter 313e. Thus, the robust decoder 313 is applicable to the digital broadcast receiving apparatus when the digital broadcast transmission apparatus employs the robust processor 207 of FIG. 16. The decoded data of the first decoder 313a is in a symbol unit. After the decoded data is converted by the byte to the symbol deinterleaver 313f, it is deinterleaved through the robust deinterleaver 313b. The decoded data of the second decoder 313c is in a unit of bytes. After the decoded data is interleaved by the robust interleaver 313d, they are converted by the symbol through the symbol interleaver 313g.

Fig. 20 is a flow chart schematizing a flow coding method in accordance with an embodiment of the present invention. Hereinafter, the robust flow coding method is illustrated with reference to Figures 5 to 20. Specifically, the robust flow coding method in the robust processor 207 as shown in Figures 13 and 13 is now illustrated. However, the robust flow coding method in the robust processor 207 as shown in Figure 16 is similar, except for the combined operations S420 and S430. As explained before, before the entry of a robust 207 processor, the DE-MUX N / R 207a separates the normal flow and the robust flow by demultiplexing the dual transport stream. In operation S400, the DE-MUX N / R 207a converts the robust flow separated by the symbol, providing normal flow directly to the MUX N / R 207c, and provides only the robust flow to the robust 207b encoder. In operation S410, the robust encoder 207b adds parity to the robust flow fed from the DE-MUX N / R 207a. In operation S420, the robust interposer 207c intersperses the robust flow added by parity. In operation S430, the symbol deinterleaver 207d deinterleaves the robust flow in symbol mode. By doing this, the symbol deinterleaver 207d converts and transfers the robust flow through the byte. After passing through the robust encoder 207b, the robust interleaver 207c, and the deinterleaver symbols 207d, the robust flow separated in the DE-MUX N / R 207A is powered to the MUX N / R 207e. In operation S440, the MUX N / R 207e multiplexes the normal flow feed from the DE-MUX N / R 207a and the robust flow feed from the symbol deinterleaver 207d.

Then, the dual transport stream multiplexed in the MUX N / R 207e is transmitted after passing through the deinterleaver, RS coder, interleaver, frame coder, multiplexer, as shown in FIGS. 10 and 11, and passing through the modulation. Fig. 21 is a flow chart schematizing a robust flow decoding method for one embodiment of the present invention. The dual transport stream transmitted from the digital broadcast transmission apparatus is received in the digital broadcast receiving apparatus as shown in Fig. 17. The dual transport stream passes through the demodulation and equalization. The robust flow included in the dual transport stream is fed to and decoded in the robust decoder 313. At this point, the robust flow decoding method in the robust decoder 313 of FIG. 19 will be described. However, the method in the robust decoder 313 of Fig. 18 is similar. The robust flow input to the robust decoder 313 is decoded by framing in the first decoder 313a in operation S500. The robust flux decoded by lattice is deinterleaved in the symbol deinterleaver 313f and a robust deinterleaver 313b in operation S510. The deinterleaved robust stream is decoded by convolution in a second decoder 313c in operation S520. The robust flow decoded by convolution is interleaved in the robust interleaver 313d and the symbol interleaver 313g in operation S530. As the above process is repeated, an exchange of information is carried out between the first decoder 313a and the second decoder 313c. Until the completion of the exchange of information in the S540-Y operation, the sequence formatter 313e adds the decoded data of the second decoder 313c to the part corresponding to the position of the robust stream of the sequence (formatting of the packet) in operation S550. The first decoder 313a and the sequence formatter 313e transfer the normal flow and the robust flow respectively in operation S560. However, when the exchange of information is still not complete in operation S540, the information exchange continues along the circuit formed between the first decoder 313a and the second decoder 313c until the exchange of information is completed. In other words, the process returns in accordance with operation 540-N for operation S500 when the exchange of information has not been completed. When the normal flow and the robust flow are produced from the robust decoder 313, the normal flow passes through the deinterleaver, the RS decoder, and the descrambler and the robust flow pass through the deinterleaver, the parity elimination, the descrambler , and the demultiplexer as shown, for example, in Figure 17.

Claims (7)

1. A digital broadcast receiving apparatus that includes a robust decoder that decodes a robust flow of a transport flow where a normal flow and robust flow is combined, characterized the robust decoder because it comprises: a first decoder that decodes the robust flow by lattice; a robust deinterleaver that intersperses the robust flow decoded by lattice; a second decoder decoding the de-interleaved robust flow by convolution; a robust interleaver that intersperses the robust flow decoded by convolution; and a sequence formatter that adds the decoded data of the second decoder to a part corresponding to a position of the robust flow of a sequence where the normal flow and the robust flow are mixed.

2. The digital broadcast receiving apparatus according to claim 1, further characterized in that the first decoder and the second decoder perform an exchange of information through the robust deinterleaver and the robust interleaver and where, when the exchange of Once the information is complete, the decoded data of the first decoder is transmitted to be used for normal flow reception and the decoder data of the second decoder is provided to the sequence formatter.

3. The digital broadcast receiving apparatus according to claim 1, further characterized in that the robust decoder further comprises: a deinterleaver of symbols that converts the data of the first decoder through the byte; and a symbol interleaver that converts the data of the second decoder to the symbol.

4. A digital broadcast receiving apparatus that includes a demodulator, an equalizer, a viterbi decoder, a first deinterleaver, an RS decoder, a first descrambler, a robust decoder, a second interleaver, a parity eraser, a second descrambler, and a robust DE-MUX. characterized in that the robust decoder decodes a robust flow of a dual transport stream where a normal flow and the robust flow is combined and comprises: a first decoder that decodes the robust flow by framing; a robust deinterleaver that intersperses the robust flow decoded by lattice; a second decoder decoding the de-interleaved robust flow by convolution; a robust interleaver that intersperses the robust flow decoded by convolution; and a sequence formatter that adds decoded data from the second decoder to a part corresponding to a position of the robust flow of a sequence where the normal flow and the robust flow are mixed.

5. A robust flow decoding method of a dual transport stream where a normal flow and robust flow are combined in a digital emitting receiving apparatus, characterized in the method because it comprises: decoding the robust flow by lattice; deinterleaving the robust flow decoded by lattice; decoding by convolution the robust de-interleaved flow; intercalate the robust de-interleaved flow; and adding the decoded data by convolution to a part that corresponds to the position of the robust flow of a sequence where the normal flow and the robust flow are mixed.

6. The robust flow decoding method according to claim 5, further characterized in that the data decoded by framework are transmitted to be used for the reception of normal flow, and the data decoded by convolution are added to a part corresponding to a position of the robust flow.

7. The decoding method of the robust flow according to claim 5, characterized in that it further comprises: converting the decoded data by framing through the byte; and convert the decoded data by convolution through the symbol.