LU67519A1 - - Google Patents

Info

Publication number
LU67519A1
LU67519A1 LU67519DA LU67519A1 LU 67519 A1 LU67519 A1 LU 67519A1 LU 67519D A LU67519D A LU 67519DA LU 67519 A1 LU67519 A1 LU 67519A1
Authority
LU
Luxembourg
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE2013880A external-priority patent/DE2013880C3/en
Priority claimed from DE19722221455 external-priority patent/DE2221455C3/en
Application filed filed Critical
Publication of LU67519A1 publication Critical patent/LU67519A1/xx

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
LU67519D 1970-03-23 1973-04-30 LU67519A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2013880A DE2013880C3 (en) 1970-03-23 1970-03-23 Circuit arrangement for generating clock pulses
DE19722221455 DE2221455C3 (en) 1972-05-02 1972-05-02 Circuit arrangement for generating clock pulses

Publications (1)

Publication Number Publication Date
LU67519A1 true LU67519A1 (en) 1973-11-12

Family

ID=25758868

Family Applications (1)

Application Number Title Priority Date Filing Date
LU67519D LU67519A1 (en) 1970-03-23 1973-04-30

Country Status (2)

Country Link
LU (1) LU67519A1 (en)
NL (1) NL175573C (en)

Also Published As

Publication number Publication date
NL175573C (en) 1984-11-16
NL7306114A (en) 1973-11-06
NL175573B (en) 1984-06-18

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