LU60528A1 - - Google Patents

Info

Publication number
LU60528A1
LU60528A1 LU60528DA LU60528A1 LU 60528 A1 LU60528 A1 LU 60528A1 LU 60528D A LU60528D A LU 60528DA LU 60528 A1 LU60528 A1 LU 60528A1
Authority
LU
Luxembourg
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19691913672 external-priority patent/DE1913672C/de
Application filed filed Critical
Publication of LU60528A1 publication Critical patent/LU60528A1/xx

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Pulse Circuits (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
LU60528D 1969-03-18 1970-03-16 LU60528A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691913672 DE1913672C (de) 1969-03-18 Schaltungsanordnung zur Unterdrückung von Störimpulsen

Publications (1)

Publication Number Publication Date
LU60528A1 true LU60528A1 (de) 1970-05-21

Family

ID=5728492

Family Applications (1)

Application Number Title Priority Date Filing Date
LU60528D LU60528A1 (de) 1969-03-18 1970-03-16

Country Status (5)

Country Link
BE (1) BE747567A (de)
FR (1) FR2038902A5 (de)
GB (1) GB1297699A (de)
LU (1) LU60528A1 (de)
NL (1) NL7003326A (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4152731A (en) * 1977-12-20 1979-05-01 Motorola, Inc. Read circuit for distinguishing false peaks in an alternating current playback signal

Also Published As

Publication number Publication date
DE1913672A1 (de) 1970-09-24
FR2038902A5 (de) 1971-01-08
DE1913672B2 (de) 1972-06-29
BE747567A (fr) 1970-09-18
NL7003326A (de) 1970-09-22
GB1297699A (de) 1972-11-29

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