LU51657A1 - - Google Patents
Info
- Publication number
- LU51657A1 LU51657A1 LU51657DA LU51657A1 LU 51657 A1 LU51657 A1 LU 51657A1 LU 51657D A LU51657D A LU 51657DA LU 51657 A1 LU51657 A1 LU 51657A1
- Authority
- LU
- Luxembourg
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/12—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a scanning signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
- H03D13/007—Circuits for comparing the phase or frequency of two mutually-independent oscillations by analog multiplication of the oscillations or by performing a similar analog operation on the oscillations
- H03D13/009—Circuits for comparing the phase or frequency of two mutually-independent oscillations by analog multiplication of the oscillations or by performing a similar analog operation on the oscillations using diodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR27398A FR1468762A (fr) | 1965-08-05 | 1965-08-05 | Dispositif de verrouillage sur fréquence synchronisée |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| LU51657A1 true LU51657A1 (en:Method) | 1968-03-14 |
Family
ID=8586117
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| LU51657D LU51657A1 (en:Method) | 1965-08-05 | 1966-07-28 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3421104A (en:Method) |
| BE (1) | BE684615A (en:Method) |
| DE (1) | DE1462486A1 (en:Method) |
| FR (1) | FR1468762A (en:Method) |
| GB (1) | GB1159603A (en:Method) |
| LU (1) | LU51657A1 (en:Method) |
| NL (1) | NL6611025A (en:Method) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0098705A3 (en) * | 1982-06-18 | 1985-07-10 | Fujitsu Limited | Phase lock loop circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE518358A (en:Method) * | 1952-03-12 | |||
| NL269766A (en:Method) * | 1960-09-30 |
-
1965
- 1965-08-05 FR FR27398A patent/FR1468762A/fr not_active Expired
-
1966
- 1966-07-26 BE BE684615D patent/BE684615A/xx unknown
- 1966-07-28 LU LU51657D patent/LU51657A1/xx unknown
- 1966-08-01 GB GB34416/66A patent/GB1159603A/en not_active Expired
- 1966-08-02 US US569687A patent/US3421104A/en not_active Expired - Lifetime
- 1966-08-02 DE DE19661462486 patent/DE1462486A1/de active Pending
- 1966-08-04 NL NL6611025A patent/NL6611025A/xx unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0098705A3 (en) * | 1982-06-18 | 1985-07-10 | Fujitsu Limited | Phase lock loop circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| FR1468762A (fr) | 1967-02-10 |
| GB1159603A (en) | 1969-07-30 |
| NL6611025A (en:Method) | 1967-02-06 |
| DE1462486A1 (de) | 1968-11-28 |
| BE684615A (en:Method) | 1967-01-26 |
| US3421104A (en) | 1969-01-07 |