LU101195B1 - Terahertz transceiver architecture based on switch control for multi-mode multi-application scenarios - Google Patents
Terahertz transceiver architecture based on switch control for multi-mode multi-application scenarios Download PDFInfo
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- LU101195B1 LU101195B1 LU101195A LU101195A LU101195B1 LU 101195 B1 LU101195 B1 LU 101195B1 LU 101195 A LU101195 A LU 101195A LU 101195 A LU101195 A LU 101195A LU 101195 B1 LU101195 B1 LU 101195B1
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- switch
- power amplifier
- transceiver
- port
- coupler
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/44—Transmit/receive switching
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transceivers (AREA)
Abstract
The present invention discloses a terahertz transceiver architecture based on switch control for multi-mode multi-application scenarios, comprising a power divider and a buffer, wherein two output ports of the buffer are separately connected with a transmitting-end power amplifier and a receiving-end power amplifier, a control port of the transmitting-end power amplifier is connected to a first switch, an output port of the transmitting-end power amplifier is connected with a passive-structure annular-squirrel-cage coupler, and the passive-structure annular-squirrel-cage coupler is connected with an antenna; and a control port of the receiving-end power amplifier is connected with a second switch, an output port of the receiving-end power amplifier is connected with a mixer, and the mixer is connected with the passive-structure annular-squirrel-cage coupler. The transceiver architecture of the present invention that uses the switch control to implement three different modes (transmitting, receiving, and transceiving) for different application scenarios, can not only achieve performance testing and estimation of each link on a one-time processing basis, and shorten the design cycle while meeting different application requirements of the transceiver.
Description
TERAHERTZ TRANSCEIVER ARCHITECTURE BASED ON SWITCH CONTROL FOR MULTI-MODE MULTI-APPLICATION SCENARIOS
Technical field
The present invention belongs to the field of microwave engineering, and more particularly relates to a terahertz transceiver architecture based on switch control for multi-mode multi-application scenarios.
Technical background
With the growing demand for high speed products (communication, imaging, automotive radar, etc.) and the development of terahertz technology, high-efficiency and high-speed transceiver chips with low cost are a major trend in the future. Optical communication can achieve very high speeds, but its application cost is too high to meet the growing demand for products. In order to achieve the requirements for both low cost and high speed, the advantages of semiconductor technology-based terahertz transceiver chips in future product applications are becoming more and more obvious.
In the application of semiconductor technology-based terahertz transceiver chips, different scenarios have different requirements for transceivers. In the field of communication, one receiving and one sending are required in most of cases. Therefore, the front ends of the current communication chips adopt a single-pole double-throw switch or an antenna switch. In a testing process, according to different operating requirements of the transceivers, the configuration of the transceivers is changed to a receiving or transmitting state. In the field of active imaging radar or gesture recognition, it is required that the transceivers can transmit reflected signals and can receive and process them, and thus such a chip supports the simultaneous transmission and reception of signals.
In a process of implementing terahertz transceivers based on the semiconductor technology, due to the characteristics of the technology and terahertz frequency, many problems are faced in the design process, such as skin effect, interconnect lines, parasitic parameters, transmission loss. Therefore, when designing a semiconductor technology-based terahertz chip, it is very difficult, and there are many modules in a transceiver, so that the design process needs to be verified step by step, and the performance of each link needs to be properly evaluated in a testing process. Moreover, if an issue has been occurred, a module causing the issue needs to be quickly located. It is required that not only the transceiver has the functions of transmitting and receiving, but also the transceiver can transmit and receive separately for operating, thereby meeting the requirements of the test, and reducing the cost of the test. Moreover, it is possible to avoid reprocessing due to the inability of testing the transmission or reception separately.
In summary, in order to reduce the time cost and processing cost of the test, it is necessary to propose a new terahertz transceiver architecture based on the semiconductor technology for multi-mode multi-application scenarios that can meet the requirements of the application scenario and meet the test requirements.
Summary of the invention
An object of the present invention is to overcome the deficiencies in the prior art, and provide a transceiver architecture adapted for switching among multiple operating modes for multiple application scenarios, namely, a terahertz transceiver based on switch control for multi-mode multi-application scenarios. On a basis of a single-antenna-based transceiver, the architecture of the transceiver that using the switch control to implement three different modes (transmitting, receiving, and transceiving) for different application scenarios is proposed for the first time. With the advantages of the architecture, performance testing and estimation of each link can be achieved on a one-processing basis, and the design cycle is shortened while meeting different application requirements of the transceiver.
The object of the present invention is achieved by the following technical solutions. A terahertz transceiver architecture based on switch control for multi-mode multi-application scenarios of the present invention comprises a power divider and a buffer connected to each other, wherein two output ports of the buffer are separately connected with a transmitting-end power amplifier and a receiving-end power amplifier, a control port of the transmitting-end power amplifier is connected to a first switch, an output port of the transmitting-end power amplifier is connected with a passive-structure annular-squirrel-cage coupler, and the passive-structure annular-squirrel-cage coupler is connected with an antenna; and a control port of the receiving-end power amplifier is connected with a second switch, an output port of the receiving-end power amplifier is connected with a mixer, and the mixer is connected with the passive-structure annular-squirrel-cage coupler.
An input port of the passive-structure annular-squirrel-cage coupler is connected with an output port of the transmitting-end power amplifier, an antenna port of the passive-structure annular-squirrel-cage coupler is connected with the antenna, an isolation port of the passive-structure annular-squirrel-cage coupler is grounded via a resistor, and an coupling port of the passive-structure annular-squirrel-cage coupler is connected with a RF input port of the mixer, and a local oscillator input port of the mixer is connected with the output port of the receiving-end power amplifier.
The first switch and the second switch each use a CMOS transistor.
When the first switch and the second switch are both in the "ON" state, the transceiver operates in a transceiving mode where the transceiver can transmit signals through a transmitting link and receive signals through a receiving link at the same time; when the first switch is in the "ON" state and the second switch is in the "OFF" state, the transceiver operates in a transmitting mode where only the transmitting link works and the transceiver provides a signal source to the outside; and when the first switch is in the "OFF" state and the second switch is in the "ON" state, the transceiver operates in a receiving mode where only the receiving link works, and the transceiver can only receive and process signals transmitted from external chips.
Compared with the prior art, the technical solution of the present invention has the following beneficial effects: (1) In the present invention, an array switch is used to implement switching among the three modes of transmitting, receiving, and transceiving, and chip testing in different modes is supported to reduce the design risk of the transceiver. (2) Different modes of the present invention support test verification of different modules (shortening design cycle), meeting application requirements of different scenarios such as communication and imaging, and greatly improving the application range of the transceiver. (3) In the present invention, the front end of the transceiver adopts a combination of a single antenna and a passive-structure annular-squirrel-cage coupler to reduce the area of the transceiver chip and the switching among different modes is combined to improve the utilization of the chip area. The use of the single antenna greatly reduces the area of the transceiver while meeting the requirements of transmitting and receiving, and provides a certain degree of isolation between transmitting and receiving, ensuring that the utilization of the chip circuit is improved in different modes or in different switching states for application scenarios. (4) The structure of the present invention not only supports the switching of different modes and the requirements of different application scenarios, but also makes the transceiver have the advantages of miniaturization, light weight, high integration and reconfigurability etc.; and reduces the time cost and processing cost of the test.
Brief description of the drawings
Fig. 1 is a schematic diagram of a terahertz transceiver architecture operating in a transceiving mode;
Fig. 2 is a schematic diagram of a terahertz transceiver architecture operating in a transmitting mode; and
Fig. 3 is a schematic diagram of a terahertz transceiver architecture operating in a receiving mode.
Reference numerals: 1 power divider; 2 buffer; 3 transmitting-end power amplifier; 4 receiving-end power amplifier; 5 passive-structure annular-squirrel-cage coupler; 6 antenna; 7 mixer; 8 first switch; 9 second witch; GND ground; R resistor.
Detailed description of the embodiments
The invention will be further described below with reference to the accompanying drawings. A terahertz transceiver architecture based on switch control for multi-mode multi-application scenarios of the present invention comprises a power divider 1 and a buffer 2 connected to each other, wherein the power divider 1 is one input and two outputs, the input terminal thereof is used as a local oscillator input port, and one output terminal thereof is used as a local oscillator output port, and the other output terminal is connected to an input terminal of the buffer 2. Two output ports of the buffer 2 are separately connected with a transmitting-end power amplifier 3 and a receiving-end power amplifier 4. A control port of the transmitting-end power amplifier 3 is connected with a first switch 8, and an output port of the transmitting-end power amplifier 3 is connected with a passive-structure annular-squirrel-cage coupler 5 (Rat Race), and the passive-structure annular-squirrel-cage coupler 5 is connected with an antenna 6. A control port of the receiving-end power amplifier 4 is connected with a second switch 9, an output port of the receiving-end power amplifier 4 is connected with a mixer 7, and the mixer 7 is connected with the passive-structure annular-squirrel-cage coupler 5. The first switch 8 and the second switch 9 each use a CMOS transistor. A branch where the transmitting power amplifier 3, the passive-structure annular-squirrel-cage coupler 5 and the antenna 6 are located serves as a transmitting link; and a branch where the receiving power amplifier 4 and the mixer 7 are located serves as a receiving link.
An input port of the passive-structure annular-squirrel-cage coupler 5 is connected with an output port of the transmitting-end power amplifier 3, an antenna port of the passive-structure annular-squirrel-cage coupler 5 is connected with the antenna 6, an isolation port of the passive-structure annular-squirrel-cage coupler 5 is grounded GND via a resistor R, and an coupling port of the passive-structure annular-squirrel-cage coupler 5 is connected with a RF input port of the mixer 7, a local oscillator input port of the mixer 7 is connected with the output port of the receiving-end power amplifier 4, and an output terminal of the mixer 7 outputs an intermediate frequency.
The present invention proposes for the first time a terahertz transceiver architecture design that utilizes a single chip integration to support three different operating modes of transmitting, receiving, and transceiving by switch control for different application scenarios. In order to realize the switching of different modes and effectively utilize the area of the chip, the present invention adopts a combination of a single antenna and a passive-structure annular-squirrel-cage coupler (Rat Race) in the antenna part to realize the front end design of the terahertz transceiver. The use of the single antenna greatly reduces the area of the transceiver while meeting the requirements of transmitting and receiving, and provides a certain degree of isolation between transmitting and receiving, ensuring that the utilization of the chip circuit is improved in different modes or in different switching states for application scenarios. At the same time, a set of switches is separately added in parts of the transmitting-end power amplifier and the receiving-end power amplifier, and the selection of different operating modes is realized by controlling the operating states of the switches. This structure not only supports the switching of different modes and the requirements of different application scenarios, but also makes the transceiver have the advantages of miniaturization, light weight, high integration and reconfigurability etc.
The present invention generally adopts two switches, which are located at positions of the transmitting-end power amplifier 3 and the receiving-end power amplifier 4, respectively, to realize the switching among three modes of transmitting, receiving, and transceiving. At the same time, it is also possible to select a suitable transceiver mode according to the needs of different application scenarios.
The overall frame of this transceiver adopts a structure of “a power divider + a buffer circuit” in a signal source part to provide signal sources for the transmitting link and the receiving link separately, and adopts a combination of a single antenna and a passive-structure annular-squirrel-cage coupler in an antenna part to meet the antenna requirements for the three modes of transmitting, receiving and transceiving. When the first switch 8 and the second switch 9 are in the "ON" state, the transceiver operates in the transceiving mode (as shown in Fig. 1). At this time, the transceiver can transmit signals through the transmitting link and receive signals through the receiving link at the same time. At this time, the passive-structure annular-squirrel-cage coupler 5 has a certain degree of isolation between different ports. Thus, the crosstalk of signals of the transmission link and the receiving link can be reduced, and the degree of isolation between transmitting and receiving is greatly improved. When the first switch 8 at the transmitting end is in the "ON" state, and the second switch 9 on the receiving end is in the "OFF" state, the transceiver operates in the transmitting mode (as shown in Fig. 2). At this time, only the transmitting link works, the receiving-end power amplifier 4 and the mixer 7 in the receiving link do not operate, and the transceiver provides a signal source to the outside. Conversely, when the first switch 8 of the transmitting end and the second switch 9 of the receiving end are in the "OFF" and "ON" states, respectively, the transceiver operates in the receiving mode (as shown in Fig. 3). At this time, only the receiving link of the transceiver works, the transmitting-end power amplifier in the transmitting link does not operate, and the transceiver can only receive and process signals transmitted from external chips.
The selection of this structure not only supports the switching of three modes of transmitting, receiving and transceiving, but also meets the requirements of multiple application scenarios. At the same time, the use of the single antenna also greatly reduces the chip area, reduces the cost of the chip, and overcomes the shortcomings that the antenna switch cannot realize the simultaneous transmission and reception, greatly meeting the demand for chips in various application scenarios.
Although the functions and working processes of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the specific functions and working processes described above, and the specific embodiments given above are merely illustrative and not restrictive. Many forms may be made by those skilled in the art under the inspiration of the present invention without departing from the spirit and scope of the invention, and these are all within the protection of the present invention.
Claims (4)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811077923.1A CN109039364B (en) | 2018-09-16 | 2018-09-16 | Terahertz transceiver mechanism based on switch control and applied to multiple modes and multiple application scenes |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| LU101195B1 true LU101195B1 (en) | 2019-08-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| LU101195A LU101195B1 (en) | 2018-09-16 | 2019-04-30 | Terahertz transceiver architecture based on switch control for multi-mode multi-application scenarios |
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| Country | Link |
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| CN (1) | CN109039364B (en) |
| LU (1) | LU101195B1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111313928B (en) * | 2020-02-13 | 2021-12-28 | 广州全盛威信息技术有限公司 | Ultra-wideband transceiver architecture supporting multiple systems and corresponding wireless access control device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101841345B (en) * | 2010-04-15 | 2013-12-11 | 新邮通信设备有限公司 | Time division duplex-remote radio unit |
| CN105871399B (en) * | 2016-06-23 | 2018-05-04 | 广东欧珀移动通信有限公司 | Radio-frequency communication module, RF front-end module and its control method |
| KR102573878B1 (en) * | 2017-01-17 | 2023-09-01 | 삼성전자주식회사 | An apparatus for processing signal in a wireless communication system and a method thereof |
| CN206650667U (en) * | 2017-03-27 | 2017-11-17 | 石家庄东泰尔通信技术有限公司 | A kind of inexpensive, high transceiver insulation, the TR front ends of switching at a high speed |
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2018
- 2018-09-16 CN CN201811077923.1A patent/CN109039364B/en not_active Expired - Fee Related
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2019
- 2019-04-30 LU LU101195A patent/LU101195B1/en active IP Right Grant
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| Publication number | Publication date |
|---|---|
| CN109039364B (en) | 2020-09-01 |
| CN109039364A (en) | 2018-12-18 |
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| Date | Code | Title | Description |
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| FG | Patent granted |
Effective date: 20190826 |