KR970701432A - PROVIDING A LOW RESISTANCE TO INTEGRATED CIRCUIT DEVICES - Google Patents

Abstract

In order to realize low resistance for the integrated circuit device, metal silicide 1510 is formed by silicide technology. Thereafter, the conductive layer 1520 is deposited and patterned to form localized conductive lines. The local conductive line is thick enough to achieve the desired low resistance even with thin metal silicide 1510.

Description

PROVIDING A LOW RESISTANCE TO INTEGRATED CIRCUIT DEVICES

Since this is an open matter, no full text was included.

17 is a top view illustrating the exact features of a BiCMOS structure fabricated in accordance with the present invention.

Claims (9)

Forming a structure comprising one or more transistors each having three electrodes, each structure comprising each of three semiconductor surfaces of the transistor in electrical contact with each electrode of each transistor; Forming a metal-containing material on the structure after each of the transistors but before forming any contact holes in any insulating film formed after formation of all the transistors; Reacting the semiconductor material of the semiconductor surface with the metal containing material portion to form a layer of non-semiconductor conductive material on all the surfaces; Removing the metal containing material that has not reacted with the semiconductor material; Forming a conductive material M on the entire non-semiconductor conductive material and in contact with the conductive material; And patterning the material M with the material M to form one or more conductive lines in contact with the non-semiconductor conductive material. The method of claim 1 wherein the non-semiconductor conductive material comprises a metal silicide. The method of claim 1 wherein the material M comprises titanium nitride. The method of claim 1, wherein at least one of the transistors is a bipolar transistor surrounded by sidewalls by a field insulating film, one of the surfaces E for contacting the emitter region of the bipolar transistor, and the surface E Extending over a field insulating film, at least one of the one or more conductive lines extending over the surface E and contacting the surface E, the method comprising forming a first insulating film on the conductive line; Forming a contact hole in the first insulating film on the field insulating film to expose one of the conductive lines extending on the surface E; And forming a conductive layer in the contact hole, the conductive layer in contact with one of the conductive lines extending on the surface E. 6. Forming a structure comprising monocrystalline silicon comprising a base region of a bipolar transistor and a collector region of a bipolar transistor, the structure further comprising a field insulating film surrounding the bipolar transistor with sidewalls; Diffuse a dopant from the polysilicon emitter contact region into the monocrystalline silicon to form a polysilicon emitter contact region on the monocrystalline silicon and the field insulating film and to form an emitter region of the bipolar transistor Making a step; Forming an insulating space on a sidewall of the polysilicon emitter contact region, the spacer physically contacting the monocrystalline silicon to physically isolate the polysilicon emitter contact region from the base region; Reacting the metal containing material with a portion of the monocrystalline silicon and polysilicon emitter contact area to form a metal containing material on the monocrystalline silicon and the polysilicon emitter contact region, wherein the selected At least one of the surfaces is a surface of the base region; Removing unreacted metal containing material; Forming a conductive non-semiconductor material on the total metal silicide and in contact with the total metal silicide; Patterning the conductive non-semiconductor material to form a local conductive line, wherein the first line of the conductive line is fabricated along the polysilicon emitter contact area to reduce emitter resistance, the conductive line A second line of covers the metal silicide on the surface of the base region, and the first and second conductive lines respectively cover the field insulating film; Forming a first insulating film on the conductive line; Forming a contact hole in the first insulating film, one of the holes terminating the first conductive line on the field insulating film and the other of the holes terminating the second conductive line on the field insulating film; And forming a conductive contact in said aperture. 6. The method of claim 5 wherein the step of forming a conductive non-semiconductor material comprises the step of forming titanium nitride by chemical vacuum deposition. 6. The device of claim 5, wherein the monocrystalline silicon comprises a source region of a field effect transistor, a drain region of the field effect transistor, and a channel region of the field effect transistor; The field insulating film surrounds the field effect transistor with sidewalls; Wherein forming the polysilicon emitter region comprises forming a polysilicon gate region on the channel region, and forming the insulating spacer on the sidewall of the polysilicon emitter region comprises: Forming insulating spacers on sidewalls of the gate region, wherein forming the metal containing material on the monocrystalline silicon and the polysilicon emitter contact regions comprises forming a metal containing material on the gate region. Forming the metal silicide on the surface of the source, drain and gate regions, wherein three lines of the conductive lines are on the surface of at least one of the source and drain regions Covering the metal silicide and covering the field insulating film; And at least one contact hole terminates a third conductive line on the field insulating film. Forming a structure comprising monocrystalline silicon comprising a source region of a field effect transistor, a drain region of the field effect transistor, and a channel region of the field effect transistor, the structure surrounding the field effect transistor by sidewalls; Further comprises a field insulating film; Forming a polysilicon gate region on the channel region; Forming insulating spacers on sidewalls of the gate region; Forming a metal containing material on said monocrystalline silicon and said gate region; Reacting the metal-containing material with the monocrystalline silicon and the gate spaced portion to form metal silicides on surfaces of the source, drain and gate regions; Removing unreacted metal containing material; Forming a conductive non-semiconductor material on the entire metal silicide and in contact with the silicide; Patterning the conductive non-semiconductor material to form a local conductive line covering the metal silicide on the surface of at least one of the source and drain regions and covering the field insulating film; Forming a first insulating film on the conductive line; Forming a contact hole in the first insulating film, the hole terminating the conductive line; And forming a conductive contact in said hole. 10. The method of claim 8, wherein forming the conductive non-semiconductor material comprises forming titanium nitride by chemical vacuum deposition. ※ Note: The disclosure is based on the initial application.