KR970067358A - The sense amplifier driving circuit of the memory cell - Google Patents

The sense amplifier driving circuit of the memory cell Download PDF

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Publication number
KR970067358A
KR970067358A KR1019960007000A KR19960007000A KR970067358A KR 970067358 A KR970067358 A KR 970067358A KR 1019960007000 A KR1019960007000 A KR 1019960007000A KR 19960007000 A KR19960007000 A KR 19960007000A KR 970067358 A KR970067358 A KR 970067358A
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KR
South Korea
Prior art keywords
sense amplifier
sense amplifiers
drive signal
sense
memory cell
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Application number
KR1019960007000A
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Korean (ko)
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KR100202651B1 (en
Inventor
김주한
Original Assignee
문정환
Lg 반도체주식회사
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Application filed by 문정환, Lg 반도체주식회사 filed Critical 문정환
Priority to KR1019960007000A priority Critical patent/KR100202651B1/en
Publication of KR970067358A publication Critical patent/KR970067358A/en
Application granted granted Critical
Publication of KR100202651B1 publication Critical patent/KR100202651B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating

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  • Dram (AREA)
  • Read Only Memory (AREA)

Abstract

본 발명은 고속 메모리소자용 센스앰프의 구동기술에 관한 것으로, 종래의 센스앰프의 구동회로에 있어서는 센스앰프를 공통으로 연결하는 배선의 기생저항에 의해 센스앰의 센싱시간이 지연되어 데이타를 고속처리할 수 없게 되는 결함이 있었는 바, 본 발명은 이를 해결하기 위하여, 외부로부터 공급되는 피모스 구동신호에 의해 각기 구동되어 상기 각각의 센스앰프(SA41-SA44)에 전원단자전압(Vcc)레벨의 구동신호를 공급하는 센스앰프 구동부(42A)와; 외부로부터 공급되는 엔모스 구동신호(SN1)에 의해 각기 구동되어 상기 각각의 센스앰프(SA41-SA44)에 전원단자전압(Vss)레벨의 구동신호를 공급하는 센스앰프 구동부(42B)를 포함하여 구성하며, 상기 피모스 구동신호라인 및 엔모스 구동신호(SN1) 라인은 메모리 셀을 관통하는 배선층을 이용하여 배선하였다.The present invention relates to a driving technique of a sense amplifier for a high-speed memory device. In a driving circuit of a conventional sense amplifier, the sensing time of the sense amplifier is delayed by the parasitic resistance of the wiring commonly connecting the sense amplifier, In order to solve this problem, the present invention is characterized in that, in order to solve this problem, A sense amplifier driving section 42A driven by each of the sense amplifiers SA41 to SA44 to supply a drive signal having a power supply terminal voltage (Vcc) level to each of the sense amplifiers SA41 to SA44; And a sense amplifier driving section 42B which is driven by an externally supplied ENMOS drive signal SN1 and supplies a drive signal of a power supply terminal voltage (Vss) level to each of the sense amplifiers SA41 to SA44, , And the drive signal The line and the emmos driving signal (SN1) line were wired using a wiring layer passing through the memory cell.

Description

메모리셀의 센스앰프 구동회로The sense amplifier driving circuit of the memory cell

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제4도는 본 발명 메모리셀의 센스앰프 구동회로도, 제5도는 제4도의 상세 회로도.FIG. 4 is a sense amplifier driving circuit diagram of a memory cell according to the present invention; FIG. 5 is a detailed circuit diagram of FIG. 4;

Claims (4)

메모리셀 어레이(41)에서 출력되는 신호를 센싱하여 보다 높은 레벨의 신호로 변환출력하는 센스앰프(SA41-SA44)에 있어서, 외부로부터 공급되는 피모스 구동신호에 의해 각기 구동되어 상기 각각의 센스앰프(SA41-SA44)에 전원단자전압(Vss)레벨의 구동신호를 공급하는 센스앰프(42A)와; 외부로터 공급되는 엔모스 구동신호(SN1)에 의해 각기 구동되어 상기 각각의 센스앰프(SA41-SA44)에 전원단자전압(Vss)레벨의 구동신호를 공급하는 센스앰프 구동부(42B)를 포함하여 구성한 것을 특징으로 하는메모리셀의 센스앰프 구동회로.In the sense amplifiers SA41 to SA44 for sensing signals outputted from the memory cell array 41 and converting them into signals of a higher level, A sense amplifier 42A driven by each of the sense amplifiers SA41 to SA44 to supply a drive signal of a power supply terminal voltage (Vss) level to each of the sense amplifiers SA41 to SA44; And a sense amplifier driving section 42B which is driven by an internal drive signal SN1 supplied to the external rotor and supplies a drive signal of a power terminal voltage (Vss) level to each of the sense amplifiers SA41 to SA44 And a sense amplifier driving circuit for the memory cell. 제1항에 있어서, 센스 앰프(42A)는 소오스가 전원단자(Vcc)에 각기 접속되고, 드레인이 상기 센스앰프(SA41-SA44)에 각기 접속되며, 게이트가 피모스 구동신호라인에 각기 접속된 피모스(PM41-PM44)로 구성한 것을 특징으로 하는 메모리셀의 센스앰프 구동회로.The driving method according to claim 1, wherein the sense amplifier (42A) has its source connected to the power supply terminal (Vcc), its drain connected to each of the sense amplifiers (SA41-SA44) (PM41-PM44) connected to the lines of the sense amplifiers. 제1항에 있어서, 센스앰프 구동부(42B)는 드레인이 상기 센스앰프(SA41-SA44)에 각기 접속되고, 소오스가 전원단자(Vss)에 각기 접속되며, 게이트가 엔모스 구동신호(NM1)라인에 각기 접속된 엔모스(NM41-NM44)로 구성한 것을 특징으로 하는 메모리셀의 센스앰프 구동회로.The driving circuit according to claim 1, wherein the sense amplifier driver (42B) has drains connected to the sense amplifiers (SA41-SA44), sources connected to the power supply terminal (Vss) (NM41-NM44) connected to the sense amplifiers of the memory cells, respectively. 제1항에 있어서, 피모스 구동 신호라인 및 엔모스 구동신호(SN1) 라인은 메모리 셀을 관통하는 배선층을 이용하여 배선한 것을 특징으로 하는 메모리셀의 센스앰프 구동회로.The driving method according to claim 1, And the line and the drive signal line (SN1) are wired using a wiring layer passing through the memory cell. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960007000A 1996-03-15 1996-03-15 Sense amplifier driving circuit KR100202651B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960007000A KR100202651B1 (en) 1996-03-15 1996-03-15 Sense amplifier driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960007000A KR100202651B1 (en) 1996-03-15 1996-03-15 Sense amplifier driving circuit

Publications (2)

Publication Number Publication Date
KR970067358A true KR970067358A (en) 1997-10-13
KR100202651B1 KR100202651B1 (en) 1999-06-15

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100728571B1 (en) * 2006-02-09 2007-06-15 주식회사 하이닉스반도체 Apparatus for sensing data of semiconductor memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100728571B1 (en) * 2006-02-09 2007-06-15 주식회사 하이닉스반도체 Apparatus for sensing data of semiconductor memory
US7499348B2 (en) 2006-02-09 2009-03-03 Hynix Semiconductor Inc. Apparatus for sensing data of semiconductor integrated circuit
US7760563B2 (en) 2006-02-09 2010-07-20 Hynix Semiconductor Inc. Apparatus for sensing data of semiconductor integrated circuit

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