KR970060705A - Signal stabilization method of frequency synthesizer and suitable circuit therefor - Google Patents

Signal stabilization method of frequency synthesizer and suitable circuit therefor Download PDF

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Publication number
KR970060705A
KR970060705A KR1019960001544A KR19960001544A KR970060705A KR 970060705 A KR970060705 A KR 970060705A KR 1019960001544 A KR1019960001544 A KR 1019960001544A KR 19960001544 A KR19960001544 A KR 19960001544A KR 970060705 A KR970060705 A KR 970060705A
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KR
South Korea
Prior art keywords
voltage
signal
tuning
output
controlled oscillator
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KR1019960001544A
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Korean (ko)
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KR0155275B1 (en
Inventor
염보선
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김광호
삼성전자 주식회사
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Publication of KR970060705A publication Critical patent/KR970060705A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

Abstract

본 발명은 주파수 합성장치의 신호안정화방법 및 이에 적합한 회로를 개시한다. 본 발명의 방법은 전압제어발진기의 온도변화를 감지하여 튜닝전압을 조정하며, 이 튜닝전압에 의하여 전압제어발진기를 튜닝하는 제1단계; 전압제어신호(Fvco)에서 콤주파수(Fcomb)를 감산한 후 저주파 합성기에 의해 생성된 입력주파수(Fin)를 감산는 제2단계; 제1 단계에서 생성하는 전압제어신호(Fvco)에서 제2 단계에서 생성하는 신호(Fvoc-Fcomb)-Fin)를 감산하는 제3단계; 및 제3단계에서 생성된 신호(Fint-Fcomb)를 증폭한 후 소정레벨의 신호로 제한하여 필터링하는 제4단계로 이루어짐을 특징으로 한다. 따라서 본 발명은 전압제어발진기의 온도변화에 상응하여 튜닝전압을 조장함으로써 온도변화에 대한 출력신호의 드리프트를 보상할 수 있으며, 주파수 합성장치의 드리프트/캔슬러 모듈 출력단에 리미터를 연결함으로써 안정된 신호를 출력할 수 있다.The present invention discloses a signal stabilization method of a frequency synthesizer and a circuit suitable therefor. The method includes a first step of tuning a tuning voltage by sensing a temperature change of a voltage-controlled oscillator, and tuning a voltage-controlled oscillator by the tuning voltage; A second step of subtracting the comb frequency Fcomb from the voltage control signal Fvco and subtracting the input frequency Fin generated by the low frequency synthesizer; A third step of subtracting the signal (Fvoc-Fcomb) -Fin generated in the second step from the voltage control signal Fvco generated in the first step; And a fourth step of amplifying the signal Fint-Fcomb generated in the third step and limiting the signal to a signal of a predetermined level and filtering the amplified signal. Therefore, the present invention can compensate the drift of the output signal with respect to the temperature change by promoting the tuning voltage corresponding to the temperature change of the voltage controlled oscillator, and by connecting the limiter to the drift / canceller module output of the frequency synthesizer, Can be output.

Description

주파수 합성장치의 신호안정화방법 및 이에 적합한 회로Signal stabilization method of frequency synthesizer and suitable circuit therefor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2도는 본 발명에 의한 주파수 합성장치의 신호안정화회로의 구성을 보인 도면.FIG. 2 is a diagram showing a configuration of a signal stabilization circuit of a frequency synthesizer according to the present invention; FIG.

Claims (3)

전압제어발진기의 온도변화를 감지하여 이 온도변화에 상응하는 튜닝전압을 조정하며, 이 튜닝전압에 의하여 전압제어발진기를 튜닝하여 전압제어신호(Fvco)를 출력하는 제1단계; 전압제어신호(Fvco)에서 콤주파수(Fcomb)를 감산하여 필터링한 후 저주파 합성기에 의해 생성된 입력주파수(Fin)를 감산하여 필터링하는 제2단계; 상기 제1단계에서 생성하는 전압제어신호(Fvco)에서상기 제2단계에서 생성하는 신호(Fvoc-Fcomb)-Fin)를 감산하는 제3단계; 및 상기 제3단계에서 생성된 신호신호(Fin+Fcomb)를 증폭한 후 소정레벨의 신호로 제한하여 소정 주파수로 필터링하는 제4단계로 이루어지는 주파수 합성장치의 신호안정화방법.A first step of detecting a temperature change of the voltage-controlled oscillator, adjusting a tuning voltage corresponding to the temperature change, tuning the voltage-controlled oscillator by the tuning voltage, and outputting a voltage control signal Fvco; A second step of subtracting and filtering the comb frequency Fcomb from the voltage control signal Fvco and then subtracting and filtering the input frequency Fin generated by the low frequency synthesizer; A third step of subtracting the signal (Fvoc-Fcomb) -Fin generated in the second step from the voltage control signal (Fvco) generated in the first step; And a fourth step of amplifying the signal signal (Fin + Fcomb) generated in the third step and limiting the signal to a signal of a predetermined level and filtering the signal at a predetermined frequency. 콤주파수 발생기와, 튜닝전압에 의해 전압제어신호를 발생하는 전압제어발진기와, 전압제어발진기의 출력에서 콤주파수 발생기의 출력을 감산하는 제1믹서와, 제1믹서의 출력에서 입력주파수(Fin)를 감산하는 제2믹서와, 전압제어발진기의 출력에서 제2믹서의 출력을 감산하는 제3믹서를 구비하는 주파수 합성장치의 신호안정화회로에 있어서, 상기 전압제어발진기의 온도변화를 감지하여 온도변화에 상응하는 소정의 전압으로 변환하는온도센서; 상기 온도센서로부터 출력되는 전압에 상응하여 소정의 튜닝전압을 출력하며, 이 튜유닝전압으로 상기 전압제어발진기를 튜닝하는 전압제어발진기 튜닝 네트웍; 상기 제3믹서로부터 출력되는 신호를 소정크기 레벨로 증폭한 후 일정크기레벨로 제한하는 리미터; 및 상기 리미터로부터 출력되는 신호를 소정의 주파수로 필터링하는 제4필터를 포함하는 주파수 합성장치의 신호 안정화회로.A first mixer for subtracting the output of the comb frequency generator from an output of the voltage controlled oscillator; a second mixer for subtracting the input frequency (Fin) from the output of the first mixer; And a third mixer for subtracting the output of the second mixer from the output of the voltage controlled oscillator, the signal stabilization circuit comprising: a voltage stabilizer for detecting a temperature change of the voltage controlled oscillator, To a predetermined voltage corresponding to the temperature; A voltage controlled oscillator tuning network for outputting a predetermined tuning voltage in accordance with a voltage output from the temperature sensor and tuning the voltage controlled oscillator with the tuning voltage; A limiter for amplifying a signal output from the third mixer to a predetermined magnitude level and then limiting the signal to a predetermined magnitude level; And a fourth filter for filtering the signal output from the limiter at a predetermined frequency. 제2항에 있어서, 상기 전압제어발진기 튜닝 네트웍은 상기 온도센서로 부터 출력되는 전압이 OP앰프의 반전단자에 입력되고, 상기 OP앰프의 비반전단자는 접지됨을 특징으로 하는 주파수 합성장치의 신호안정화회로.The frequency synthesizer according to claim 2, wherein the voltage-controlled oscillator tuning network is configured such that a voltage output from the temperature sensor is input to an inverting terminal of the operational amplifier, and a non-inverting terminal of the operational amplifier is grounded. Circuit.
KR1019960001544A 1996-01-24 1996-01-24 Signal stabling method and adaptive circuit of frequency synthesizer KR0155275B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960001544A KR0155275B1 (en) 1996-01-24 1996-01-24 Signal stabling method and adaptive circuit of frequency synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960001544A KR0155275B1 (en) 1996-01-24 1996-01-24 Signal stabling method and adaptive circuit of frequency synthesizer

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KR970060705A true KR970060705A (en) 1997-08-12
KR0155275B1 KR0155275B1 (en) 1998-12-15

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