KR970057318A - OSD improvement device of MPEG video decoder and its improvement method - Google Patents

OSD improvement device of MPEG video decoder and its improvement method Download PDF

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Publication number
KR970057318A
KR970057318A KR1019950061393A KR19950061393A KR970057318A KR 970057318 A KR970057318 A KR 970057318A KR 1019950061393 A KR1019950061393 A KR 1019950061393A KR 19950061393 A KR19950061393 A KR 19950061393A KR 970057318 A KR970057318 A KR 970057318A
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South Korea
Prior art keywords
osd
buffer unit
signal
frame
video decoder
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KR1019950061393A
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Korean (ko)
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KR0184974B1 (en
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류충일
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배순훈
대우전자 주식회사
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Priority to KR1019950061393A priority Critical patent/KR0184974B1/en
Publication of KR970057318A publication Critical patent/KR970057318A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00—Image coding
    • G06T9/007—Transform coding, e.g. discrete cosine transform
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45—Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Discrete Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

본 발명은, 복수의 OSD신호가 OSD버퍼부에 저장될 때마다 이를 조합하여 OSD신호를 순차적으로 가상스캔 버퍼부에 기록한 후 원하는 화면과 동일한 OSD를 구성하여 이 내용을 영상출력부상에 출력함으로써 동일 주사선상의 복수의 OSD를 구현할 수 있도록 된 MPEG 비디오 디코더의 OSD개선장치 및 그 개선방법에 관한 것으로, 마이크로 프로세서(32)에 의해 제어되면서 MPEG2 시스템디먹스(16)로부터의 VES패킷을 디코팅하는 비디오디코더(18)와, 프레임버퍼부(20)와 OSD버퍼부(22)로 구성된 버퍼수단(24), NTSC화면 크기로 이루어지면서 상기 OSD버퍼부(22)로부터의 각 OSD영역정보신호를 기초로 최종 출력되는 OSD를 재구성하여 저장하는 가상스캔 버퍼부(26) 및, 상기 프레임버퍼부(20)로부터 프레임신호가 입력됨과 더불어 상기 가상스캔 버퍼부(26)로부터 OSD신호가 입력되는 오버레이어(28)를 구비하여 구성되는 것을 특징으로 한다.According to the present invention, whenever a plurality of OSD signals are stored in the OSD buffer unit, the OSD signals are sequentially written to the virtual scan buffer unit, and then the same OSD as the desired screen is configured to output the contents to the image output unit. The present invention relates to an OSD improvement device of an MPEG video decoder capable of realizing a plurality of OSDs on a scanning line, and a method for improving the same. The video decoding VES packets from the MPEG2 system demux 16 while being controlled by the microprocessor 32. The decoder 18, the buffer means 24 composed of the frame buffer unit 20 and the OSD buffer unit 22, and the NTSC screen size are used based on the respective OSD region information signals from the OSD buffer unit 22. The virtual scan buffer unit 26 reconstructs and stores the last output OSD, and the frame signal is input from the frame buffer unit 20, and the OSD signal is input from the virtual scan buffer unit 26. It characterized in that the configuration comprises an overlayer (28).

Description

MPEG 비디오디코더의 OSD개선장치 및 그 개선방법OSD improvement device of MPEG video decoder and its improvement method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 MPEG 비디오디코더의 OSD개선장치의 블럭구성도.1 is a block diagram of an OSD improvement apparatus of an MPEG video decoder according to the present invention.

제2도는 제1도에 나타낸 버퍼수단의 OSD버퍼부를 나타낸 도면.2 is a view showing the OSD buffer portion of the buffer means shown in FIG.

Claims (4)

마이크로 프로세서(32)에 의해 제어되면서 MPEG2 시스템디먹스(16)로부터의 VES패킷을 디코딩하는 비디오디코더(18)와, 프레임버퍼부(20)와 OSD버퍼부(22)로 구성된 버퍼수단(24), NTSC화면 크기로 이루어지면서 상기 OSD버퍼부(22)로부터의 각 OSD영역정보신호를 기초로 최종 출력되는 OSD를 재구성하여 저장하는 가상스캔 버퍼부(26) 및, 상기 프레임버퍼부(20)로부터 프레임신호가 입력됨과 더불어 상기 가상스캔 버퍼부(26)로부터 OSD신호가 입력되는 오버레이어(28)를 구비하여 구성되는 것을 특징으로 하는 MPEG 비디오디코더의 OSD개선장치.A buffer means 24 comprising a video decoder 18 for decoding the VES packet from the MPEG2 system demux 16 and controlled by the microprocessor 32, and a frame buffer unit 20 and an OSD buffer unit 22. The virtual scan buffer unit 26 reconstructs and stores the OSD finally output based on each OSD region information signal from the OSD buffer unit 22 while having an NTSC screen size, and from the frame buffer unit 20. And an overlayer (28) for inputting an OSD signal from the virtual scan buffer unit (26) as well as inputting a frame signal. 제1항에 있어서, 상기 OSD버퍼부(22)에는 복수의 OSD신호가 순차적으로 OSD버퍼부(22)에 저장되는 것을 특징으로 하는 MPEG 비디오디코더의 OSD개선장치.The apparatus of claim 1, wherein the OSD buffer unit (22) stores a plurality of OSD signals sequentially in the OSD buffer unit (22). 제1항에 있어서, 상기 OSD버퍼부(22)의 각 영역(1,2,3,4)은 각 OSD에 대해 각각의 영역의 크기와 위치를 나타내는 정보와, 파레트 정보 및, 이 파레트정보를 인덱스로 표현한 비트맵정보를 갖춘 것을 특징으로 하는 MPEG 비디오디코더의 OSD개선장치.The method of claim 1, wherein each area (1, 2, 3, 4) of the OSD buffer unit 22 includes information indicating the size and position of each area, palette information, and the pallet information for each OSD. OSD improvement device for MPEG video decoder, characterized by having bitmap information expressed by index. 마이크로 프로세서(32)로부터의 제어신호에 의해 MPEG2 시스템디먹스(16)로부터의 VES패킷을 디코팅하는 단계와, 비디오디코더부(18)를 통해 마이크로 프로세서로부터 복수의 OSD신호가 OSD버퍼부(22)의 복수의 영역(1,2,3,4)에 저장되는 단계, 상기 영역(1,2,3,4)에 저장된 OSD영역정보신호를 기초로 최종 출력되는 OSD가 재구성되어 저장되는 단계 및, 프레임버퍼부(20)로부터의 프레임신호와 상기 가상스캔 버퍼부(26)로부터의 OSD신호를 기초로 오버레이어를 수행하는 단계를 구비하여 이루어진 것을 특징으로 하는 MPEG 비디오디코더의 OSD개선방법.Decoding the VES packet from the MPEG2 system demux 16 according to the control signal from the microprocessor 32, and a plurality of OSD signals from the microprocessor via the video decoder 18 to the OSD buffer unit 22. Storing the plurality of regions (1, 2, 3, 4) of (), reconstructing and storing the final output OSD based on the OSD region information signals stored in the regions (1, 2, 3, 4); And performing an overlayer based on the frame signal from the frame buffer unit (20) and the OSD signal from the virtual scan buffer unit (26). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950061393A 1995-12-28 1995-12-28 Method and apparatus for advancing the osd in a mpeg video decoder KR0184974B1 (en)

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KR1019950061393A KR0184974B1 (en) 1995-12-28 1995-12-28 Method and apparatus for advancing the osd in a mpeg video decoder

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KR1019950061393A KR0184974B1 (en) 1995-12-28 1995-12-28 Method and apparatus for advancing the osd in a mpeg video decoder

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KR970057318A true KR970057318A (en) 1997-07-31
KR0184974B1 KR0184974B1 (en) 1999-05-01

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