KR970057264A - PIO circuit of TV receiver - Google Patents

PIO circuit of TV receiver Download PDF

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Publication number
KR970057264A
KR970057264A KR1019950046025A KR19950046025A KR970057264A KR 970057264 A KR970057264 A KR 970057264A KR 1019950046025 A KR1019950046025 A KR 1019950046025A KR 19950046025 A KR19950046025 A KR 19950046025A KR 970057264 A KR970057264 A KR 970057264A
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KR
South Korea
Prior art keywords
screen
sub
picture
main
synthesizing
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Application number
KR1019950046025A
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Korean (ko)
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KR100378789B1 (en
Inventor
강경진
홍문환
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구자홍
Lg 전자 주식회사
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Priority to KR1019950046025A priority Critical patent/KR100378789B1/en
Publication of KR970057264A publication Critical patent/KR970057264A/en
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Publication of KR100378789B1 publication Critical patent/KR100378789B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45—Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/90—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for satellite broadcast receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/50—Tuning indicators; Automatic tuning control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/0122—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal the input and the output signals having different aspect ratios

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Computer Graphics (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Astronomy & Astrophysics (AREA)
  • General Physics & Mathematics (AREA)
  • Studio Circuits (AREA)

Abstract

본 발명은 다중화면 텔레비젼수상기에 있어서, 위성방송신호를 수신하는 디비에스(DBS) 수신기 내장형 텔레비젼수상기에 있어서 하나의 주화면과 다수의 부화면을 동시에 디스플레이하는 기술에 관한 것으로, 종래의 피오피 회로에 있어서는 주화면과 부화면 모두에 4:3 화면을 디스플레이하는데 별다른 문제점이 없지만 주화면에 와이드스크린 즉, 16:9 화면을 디스플레이하고, 부화면에 16:9 화면이나 4:3화면을 디스플레이할 수 없는 결함이 있었는 바, 본 발명은 이를 해결하기 위하여, 주화면 처리부(200A)에서는 16:9의 화면비를 갖는 주화면용 영상신호를 생성하고, 부화면 처리부(200B)는 복수개의 부화면용 영상신호를 생성함에 있어서, 16:9 또는 4:3의 화면비를 갖도록 압축처리하며, 부화면 합성부(200C)는 그 복수개의 부화면용 영상신호를 합성하고, 부/부화면 합성부(200D)는 상기 주화면 처리부(200A)에서 출력되는 주화면용 영상신호를 화면의 상측이나 하측에 디스플레이하고 상기 부화면 합성부(200C)에서 출력되는 복수개의 부화면용 영상 신호를 화면의 하측이나 상측에 디스플레이하는데 적당하도록 그들을 합성하여 출력하도록 하였다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for simultaneously displaying one main screen and a plurality of sub-screens in a television receiver with a built-in DBS receiver that receives satellite broadcast signals in a multi-screen television receiver. In this case, there is no problem in displaying a 4: 3 screen on both the main screen and the subscreen, but the widescreen, that is, the 16: 9 screen, is displayed on the main screen, and the 16: 9 screen or 4: 3 screen is displayed on the subscreen. In order to solve this problem, the present invention generates a main screen video signal having a 16: 9 aspect ratio in the main screen processing unit 200A, and the sub screen processing unit 200B generates a plurality of sub screens. In generating a video signal, the video signal is compressed to have an aspect ratio of 16: 9 or 4: 3, and the sub picture synthesizing unit 200C synthesizes the plurality of sub picture video signals. The sub-screen synthesizing unit 200D displays the main screen image signal output from the main screen processing unit 200A on the upper side or the lower side of the screen and outputs the plurality of sub-screen image signals output from the sub-screen synthesizing unit 200C. Are synthesized and output so that they are suitable for display on the lower or upper side of the screen.

Description

텔레비젼수상기의 피오피 회로PIO circuit of TV receiver

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명 텔레비젼수상기의 피오피 회로에 대한 블럭도.2 is a block diagram of a PIO circuit of a television receiver of the present invention.

제3도는 제2도에서 부화면비 변환부의 일실시 예시 상세 블럭도.3 is a detailed block diagram of an exemplary embodiment of a sub-aspect ratio converter in FIG. 2;

제4도의 (가) 및 (나)는 본 발명에 의한 주/부화면 표시 예시도.Figure 4 (a) and (b) is an exemplary view of the main / sub-screen display according to the present invention.

Claims (3)

주화면용 복합영상신호(CVm)를 디지탈신호로 변환하고 디코딩하여 필드단위로 저장한 후 16:9의 화면비로 디스플레이할 수 있도록 처리하는 주화면 처리부(200A)와, 부화면용 복합영상신호(CVs)를 디지탈신호로 변환하고 디코딩하여 필드단위로 저장한 후 16:9 또는 4:3화면비로 디스플레이할 수 있도록 압축처리하는 부화면 처리부(200B)와, 상기 부화면 처리부(200B)에서 출력되는 압축처리된 복수개의 부화면영상신호를 하나는 동화로 디스플레이하고 나머지는 정지화로 디스플레이하는데 적당하도록 합성하여 출력하는 부화면 합성부(200C)와, 상기 주화면 처리부(200A)에서 출력되는 주화면용 영상신호를 화면의 상측이나 하측에 디스플레이하고 상기 부화면 합성부(200C)에서 출력되는 복수개의 부화면용 영상 신호를 화면의 하측이나 상측에 디스플레이하는데 적당하도록 그들을 합성하여 씨피티측으로 출력하는 주/부화면 합성부(200D)와, 복수개의 부화면을 선택하여 처리하고 이를 주화면과 합성하는데 필요로 하는 제어신호를 상기 부화면 처리부(200B), 부화면 합성부(200C) 및 주/부화면 합성부(200D)에 공급하는 제어신호 발생부(200E)로 구성한 것을 특징으로 하는 텔레비젼수상기의 피오피 회로.The main picture processor 200A converts the main picture composite video signal (CVm) into a digital signal, decodes it, stores it in field units, and displays it in a 16: 9 aspect ratio, and a sub picture composite video signal ( And convert the CVs into digital signals, decode them, store them in field units, and compress them so that they can be displayed in a 16: 9 or 4: 3 aspect ratio, and are output from the sub-screen processing unit 200B. A sub-screen synthesizing unit 200C for synthesizing and outputting a plurality of compressed sub-screen video signals, one for displaying a moving picture and the other for displaying still pictures, and for the main screen output from the main screen processing unit 200A. Displaying a video signal on the upper side or lower side of the screen and displaying a plurality of sub-screen image signals output from the sub-screen synthesizing unit 200C on the lower or upper side of the screen. A main / sub picture synthesizing unit 200D for synthesizing them to be suitable and outputting them to the Citi side, and a control signal necessary for selecting and processing a plurality of sub screens and synthesizing them with the main screen; A PIP circuit of a television receiver, comprising a sub-screen combining unit 200C and a control signal generator 200E supplied to the main / sub-screen combining unit 200D. 제1항에 있어서, 부화면 처리부(200B)는 초기상태에서 기 설정된 복수개의 채널을 소정시간씩 선국한후 외부의 제어에 따라 하나의 채널을 지속적으로 선국하는 부화면 튜너(207)와, 상기 부화면 튜너(207)에서 출력되는 부화면용 영상 신호를 디지탈신호로 변환하는 A/D변환기(208) 및 그 디지탈신호를 디코딩하여 필드메모리(211)에 저장하는 디코더(210)와, 상기 필드메모리(211)에 저장된 복수개의 부화면용 영상신호를 부화면으로 디스플레이하는데 적당하도록 각각 압축처리하는 부화면비 변환부(212)로 구성한 것을 특징으로 하는 텔레비젼수상기의 피오피 회로.The sub picture tuner 207 of claim 1, wherein the sub picture processing unit 200B selects a plurality of preset channels in the initial state for a predetermined time and then continuously selects one channel according to external control. An A / D converter 208 for converting the sub-screen video signal output from the sub-screen tuner 207 into a digital signal, a decoder 210 for decoding the digital signal and storing the digital signal in the field memory 211, and the field; And a sub-aspect ratio conversion section (212) for compressing each of the plurality of sub-screen video signals stored in the memory (211) so as to be suitable for displaying a sub-picture. 제1항에 있어서, 부화면 합성부(200C)는 상기 부화면 처리부(200B)에서 순차적으로 출력되는 각각의 부화면용 영상신호를 화면단위로 저장하기 위한 1/12 필드메모리(214),(215),(216)와, 상기 1/12필드메모리(214),(215),(216)에 각기 출력되는 영상신호를 원하는 위치에 디스플레이하는데 적당하도록 합성하는 멀티플렉서(217)를 포함하여 구성한 것을 특징으로 하는 텔레비젼수상기의 피오피 회로.The sub picture synthesizing unit 200C includes: a 1/12 field memory 214 for storing each sub picture video signal sequentially output from the sub picture processing unit 200B in units of screens; 215, 216, and a multiplexer 217 for synthesizing the video signals respectively output to the 1/12 field memories 214, 215, and 216 at a desired position. PIO circuit of a television receiver characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950046025A 1995-12-01 1995-12-01 Pop circuit of television receiver KR100378789B1 (en)

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Application Number Priority Date Filing Date Title
KR1019950046025A KR100378789B1 (en) 1995-12-01 1995-12-01 Pop circuit of television receiver

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Application Number Priority Date Filing Date Title
KR1019950046025A KR100378789B1 (en) 1995-12-01 1995-12-01 Pop circuit of television receiver

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KR970057264A true KR970057264A (en) 1997-07-31
KR100378789B1 KR100378789B1 (en) 2003-06-11

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100444238B1 (en) * 1997-11-12 2004-12-09 삼성전자주식회사 Pip display method and a television receiver according to the same to provide a pip function
KR100776196B1 (en) * 2004-10-11 2007-11-16 가온미디어 주식회사 Method for displaying program list in digital broadcasting receiver

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR850001417B1 (en) * 1983-06-29 1985-09-30 주식회사 금성사 Multi channel display device
KR910013904A (en) * 1989-12-21 1991-08-08 강진구 POP playback TV using HD screen
KR940007547B1 (en) * 1991-12-20 1994-08-19 주식회사 금성사 Apparatus for displaying one type two ntsc/hdtv screens on the other type hdtv/ntsc screens
JPH066711A (en) * 1992-06-22 1994-01-14 Fujitsu General Ltd High-vision device
KR960009658A (en) * 1994-08-25 1996-03-22 이헌조 Subscreen display device and control method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100444238B1 (en) * 1997-11-12 2004-12-09 삼성전자주식회사 Pip display method and a television receiver according to the same to provide a pip function
KR100776196B1 (en) * 2004-10-11 2007-11-16 가온미디어 주식회사 Method for displaying program list in digital broadcasting receiver

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KR100378789B1 (en) 2003-06-11

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