KR970055846A - Automatic Gain Control Detection Circuit for Satellite Communication System - Google Patents

Abstract

The present invention detects the signal level to adjust the gain of the variable gain amplifier of the automatic gain control device used to compensate for the fluctuations in the signal level occurring on the transmission path in a receiver of a wireless communication system having a low signal-to-noise ratio such as satellite communication. An automatic gain control detection circuit for a satellite communication system for generating a control voltage, comprising: a peak noise current limiter for limiting peak noise current from a demodulated signal including noise; A detector for detecting peaks of the demodulated received signal and reference voltage; A delayer for maintaining peaks of the freck detected signal from the detector and a reference voltage; A filter connected to the delayer to reduce a ripple component of a received signal; An adder connected to the filter to receive a signal level and a reference voltage and generate an output corresponding to I + Q-2VR to generate an output corresponding to the magnitude of the signal level; An integrator that is a rope filter for controlling the amplitude distortion included in the output of the adder; A clamping unit to clamp the output of the integrator to -0.6V to protect a variable gain amplifier; And a current limiting unit for stably operating the variable gain amplifier by limiting the output current.

Description

Automatic Gain Control Detection Circuit for Satellite Communication System

Since this is an open matter, no full text was included.

1 is a block diagram of a general satellite communication receiver to which the present invention is applied;

2 is an automatic gain control detector circuit diagram according to the present invention.

Claims (4)

A peak noise current limiter for limiting peak noise current from the demodulated signal including noise; A detector for detecting peaks of the demodulated received signal and reference voltage; A delayer for maintaining peaks of the peak detected signal from the detector and a reference voltage; A filter connected to the delayer to reduce a ripple component of a received signal; An adder connected to the filter to receive a signal level and a reference voltage and generate an output corresponding to I + Q-2VR to generate an output corresponding to the magnitude of the signal level; An integrator that is a loop filter for controlling the amplitude distortion included in the output of the adder; A clamping unit to clamp the output of the integrator to -0.6V to protect a variable gain amplifier; And a current limiting unit for stably operating the variable gain amplifier by limiting the output current. The automatic gain control detection circuit of claim 1, further comprising an alarm connected to the current limiting unit to generate an alarm when a control voltage deviates between an upper limit reference value and a lower limit reference value. 2. The automatic gain control detection circuit of claim 1, wherein the peak detector includes a peak noise limiter and a ripple filter to detect the signal even at a low signal-to-noise ratio where the noise level exceeds the signal level. 2. The automatic gain control detection circuit according to claim 1, wherein the peak detector maintains a constant characteristic against a change in temperature by peak detection of a received signal and a reference voltage. ※ Note: The disclosure is based on the initial application.