KR970055494A - Input buffer circuit for semiconductor device - Google Patents
Input buffer circuit for semiconductor device Download PDFInfo
- Publication number
- KR970055494A KR970055494A KR1019950059318A KR19950059318A KR970055494A KR 970055494 A KR970055494 A KR 970055494A KR 1019950059318 A KR1019950059318 A KR 1019950059318A KR 19950059318 A KR19950059318 A KR 19950059318A KR 970055494 A KR970055494 A KR 970055494A
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- KR
- South Korea
- Prior art keywords
- level
- output
- signal
- buffer circuit
- input buffer
- Prior art date
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- Logic Circuits (AREA)
Abstract
본 발명은 반도체장치에서 TTL 레벨의 신호를 CMOS 레벨의 신호를 변환하는 입력 버퍼 회로의 출력 천이 속도를 개선하기 위한 것으로, 기준신호(Vref)와 입력 신호(Vin)를 비교하는 차동 증폭기(10)와, 차동 증폭기(10)의 출력을 CMOS레벨로 변환하는 제1인버터(20)와, 이 인버커(20)의 출력을 구동하는 제2인버터(30) 및, 입력 신호의 전압 레벨에 따라서 인버터(20)의 출력의 레벨 천이 속도를 빠르게 하는 부스터 회로(40)로 구성된다. 이 회로를 사용하면 반도체장치의 성능을 개선할 수 있다.The present invention is to improve the output transition speed of the input buffer circuit for converting a TTL level signal to a CMOS level signal in a semiconductor device, and the differential amplifier 10 for comparing the reference signal Vref and the input signal Vin. And a first inverter 20 for converting the output of the differential amplifier 10 to a CMOS level, a second inverter 30 for driving the output of the inverter 20, and an inverter in accordance with the voltage level of the input signal. It consists of a booster circuit 40 which speeds up the level shifting speed of the output of (20). By using this circuit, the performance of the semiconductor device can be improved.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 따른 입력버퍼회로의 제1실시예,2 shows a first embodiment of an input buffer circuit according to the present invention,
제3도는 본 발명에 따른 입력버퍼회로의 제2실시예,3 shows a second embodiment of an input buffer circuit according to the present invention,
제4도는 본 발명에 다른 입력버퍼회로의 제3실시예.4 is a third embodiment of an input buffer circuit according to the present invention.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950059318A KR970055494A (en) | 1995-12-27 | 1995-12-27 | Input buffer circuit for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950059318A KR970055494A (en) | 1995-12-27 | 1995-12-27 | Input buffer circuit for semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970055494A true KR970055494A (en) | 1997-07-31 |
Family
ID=66618803
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950059318A KR970055494A (en) | 1995-12-27 | 1995-12-27 | Input buffer circuit for semiconductor device |
Country Status (1)
Country | Link |
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KR (1) | KR970055494A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100577566B1 (en) * | 2004-12-28 | 2006-05-08 | 삼성전자주식회사 | Input buffer circuits |
US8829969B2 (en) | 2011-02-14 | 2014-09-09 | Samsung Display Co., Ltd. | Level-down shifter |
-
1995
- 1995-12-27 KR KR1019950059318A patent/KR970055494A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100577566B1 (en) * | 2004-12-28 | 2006-05-08 | 삼성전자주식회사 | Input buffer circuits |
US8829969B2 (en) | 2011-02-14 | 2014-09-09 | Samsung Display Co., Ltd. | Level-down shifter |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |