KR970051806A - 스레숄드 망의 합성방법 - Google Patents

스레숄드 망의 합성방법 Download PDF

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Publication number
KR970051806A
KR970051806A KR1019950053633A KR19950053633A KR970051806A KR 970051806 A KR970051806 A KR 970051806A KR 1019950053633 A KR1019950053633 A KR 1019950053633A KR 19950053633 A KR19950053633 A KR 19950053633A KR 970051806 A KR970051806 A KR 970051806A
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South Korea
Prior art keywords
threshold
network
layer
synthesizing
convergence
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KR1019950053633A
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English (en)
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김정환
박승권
한영남
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양승택
한국전자통신연구원
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Application filed by 양승택, 한국전자통신연구원 filed Critical 양승택
Priority to KR1019950053633A priority Critical patent/KR970051806A/ko
Priority to US08/708,544 priority patent/US5980079A/en
Publication of KR970051806A publication Critical patent/KR970051806A/ko

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • G06N3/082Learning methods modifying the architecture, e.g. adding, deleting or silencing nodes or connections
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Health & Medical Sciences (AREA)
  • Computing Systems (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Molecular Biology (AREA)
  • Artificial Intelligence (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Health & Medical Sciences (AREA)
  • Image Processing (AREA)
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Abstract

본 발명은 어떠한 절체함수 하에서도 자동적으로 숨겨진 층의 요구되는 스레숄드(thershold) 요소의 수를 결정하며 확실하게 수렴되는 3층의 스레숄드 망을 위한 학습 알고리듬을 통하여 디지털 VLSI 기술로 제안된 3층의 스레숄드 망의 합성방법에 관한 것으로서, 그 특징은 스래숄드 망의 합성방법에 있어서, 망 입력과 출력을 갖는 3계층의 스레숄드 망을 제공하고, 결정된 숨겨진 계층 내에서 요구되는 스레숄드 요소의 수를 가지는 수렴이 보장된 각 스레숄드 요소의 가중치와 스레숄드의 집합을 보장하는 기하학적 확장 학습알고리듬을 포함하여, 어떠한 함수에 대해서도 수렴이 보장되어지며, 3계층으로 된 데에 있으므로, 본 발명은 어떠한 절체함수하에서도 자동적으로 숨겨진 층의 요구되는 스레숄드 요소의 수를 결정하며 확실하게 수렴되는 3층의 스레숄드 망을 학습알고리듬을 통하여 VLSI 기술로 제안된 3층의 스레숄드 망을 구축할 수 있다는 데에 그 효과가 있다.

Description

스레숄드 망의 합성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 3층의 스레숄드 망을 도시한 도면.

Claims (1)

  1. 스레숄드 망의 합성방법에 있어서, 망 입력과 출력을 갖는 3계층의 스레숄드 망을 제공하고; 결정된 숨겨진 계층 내에서 요구되는 스레숄드 요소의 수를 가지는 수렴이 보장된 각 스레숄드 요소의 가중치와 스레숄드의 집합을 보장하는 기하학적 확장 학습 알고리듬을 포함하여; 어떠한 함수에 대해서도 수렴이 보장되어지며; 3계층으로 된 것을 특징으로 하는 스레숄드 망의 합성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950053633A 1995-12-21 1995-12-21 스레숄드 망의 합성방법 KR970051806A (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019950053633A KR970051806A (ko) 1995-12-21 1995-12-21 스레숄드 망의 합성방법
US08/708,544 US5980079A (en) 1995-12-21 1996-09-05 Synthesis of threshold networks

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950053633A KR970051806A (ko) 1995-12-21 1995-12-21 스레숄드 망의 합성방법

Publications (1)

Publication Number Publication Date
KR970051806A true KR970051806A (ko) 1997-07-29

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Application Number Title Priority Date Filing Date
KR1019950053633A KR970051806A (ko) 1995-12-21 1995-12-21 스레숄드 망의 합성방법

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US (1) US5980079A (ko)
KR (1) KR970051806A (ko)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9262726B2 (en) * 2013-01-17 2016-02-16 Applied Materials, Inc. Using radial basis function networks and hyper-cubes for excursion classification in semi-conductor processing equipment

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69031842T2 (de) * 1989-02-20 1998-04-16 Fujitsu Ltd Lernsystem und Lernverfahren für eine Datenverarbeitungsvorrichtung
JPH0438587A (ja) * 1990-06-04 1992-02-07 Nec Corp 入力領域適応型ニューラルネットワーク文字認識装置
JPH0683792A (ja) * 1991-06-12 1994-03-25 Hitachi Ltd ニューラルネットワークの学習装置およびニューラルネットワークの学習パターン呈示方法
US5353207A (en) * 1992-06-10 1994-10-04 Pavilion Technologies, Inc. Residual activation neural network

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US5980079A (en) 1999-11-09

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