KR970051165A - Compound memory device - Google Patents

Compound memory device Download PDF

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Publication number
KR970051165A
KR970051165A KR1019950057002A KR19950057002A KR970051165A KR 970051165 A KR970051165 A KR 970051165A KR 1019950057002 A KR1019950057002 A KR 1019950057002A KR 19950057002 A KR19950057002 A KR 19950057002A KR 970051165 A KR970051165 A KR 970051165A
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KR
South Korea
Prior art keywords
type memory
memory
memory cell
type
types
Prior art date
Application number
KR1019950057002A
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Korean (ko)
Inventor
권의필
Original Assignee
김광호
삼성전자 주식회사
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950057002A priority Critical patent/KR970051165A/en
Publication of KR970051165A publication Critical patent/KR970051165A/en

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  • Static Random-Access Memory (AREA)
  • Dram (AREA)

Abstract

본 발명은 복수의 메모리 형태를 구비한 복합 메모리 장치에 관한 것으로서, 주변의 제어로직과 워드라인 및 비트라인을 공유하는 서로 다른 형태의 제1형태 메모리 셀 및 제2형태 메모리셀; 및 상기 워드라인을 입력으로 하여 제1형태 메모리셀과 제2형태 메모리 셀을 선택적으로 동작시키는 제1형태 메모리/제2형태 메모리 선택부를 포함함을 특징으로 한다.The present invention relates to a complex memory device having a plurality of memory types, comprising: a first type memory cell and a second type memory cell of different types sharing word lines and bit lines with peripheral control logic; And a first type memory / second type memory selector configured to selectively operate a first type memory cell and a second type memory cell by using the word line as an input.

상술한 바와 같이 본 발명에 의하여, 두가지 형태의 메모리 셀을 하나의 메모리 칩 내에 함께 둠으로써 메모리 용량 증가에 따른 칩의 크기를 줄일 수 있다.As described above, according to the present invention, by placing two types of memory cells together in one memory chip, it is possible to reduce the size of the chip as the memory capacity increases.

Description

복합 메모리 장치Compound memory device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 일실시예에 따른 RAM과 ROM을 구비한 복합 메모리 장치의 메모리 어레이 부분 및 워드라인 제어 부분을 도시한 것이다. 제3도는 6-TR SRAM과 NOR 형태의 ROM기능을 하는 메모리로서 메모리 셀 어레이 부분과 워드라인 제어 부분을 도시한 것이다.2 illustrates a memory array portion and a word line control portion of a complex memory device having RAM and ROM according to an embodiment of the present invention. FIG. 3 shows a memory cell array portion and a word line control portion as a memory having a 6-TR SRAM and a NOR type ROM function.

Claims (2)

주변의 제어로직과 워드라인 및 비트라인을 공유하는 서로 다르 형태의 제1형태 메모리셀 및 제2형태 메모리 셀을 선택적으로 동작시키는 제1형태 메모리/제2형태 메모리 선택부를 포함함을 특징으로 하는 복수의 메모리 형태를 구비한 복합 메모리 장치.And a first type memory / second type memory selector for selectively operating different types of first type memory cells and second type memory cells sharing word lines and bit lines with peripheral control logic. A composite memory device having a plurality of memory types. 제1항에 있어서, 상기 제1형태 메모리 셀은 ROM메모리 셀이고, 상기 제2형태의 메모리 셀은 RAM메모리 셀임을 특징으로 하는 복수의 메모리 형태를 구비한 복합 메모리 장치.2. The complex memory device of claim 1, wherein the first type memory cell is a ROM memory cell, and the second type memory cell is a RAM memory cell. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950057002A 1995-12-26 1995-12-26 Compound memory device KR970051165A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950057002A KR970051165A (en) 1995-12-26 1995-12-26 Compound memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950057002A KR970051165A (en) 1995-12-26 1995-12-26 Compound memory device

Publications (1)

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KR970051165A true KR970051165A (en) 1997-07-29

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KR1019950057002A KR970051165A (en) 1995-12-26 1995-12-26 Compound memory device

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060057161A (en) * 2004-11-23 2006-05-26 주식회사 하이닉스반도체 Circuit for selecting type of combo memory
KR100639001B1 (en) * 1999-02-02 2006-10-25 마츠시타 덴끼 산교 가부시키가이샤 Semiconductor memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100639001B1 (en) * 1999-02-02 2006-10-25 마츠시타 덴끼 산교 가부시키가이샤 Semiconductor memory device
KR20060057161A (en) * 2004-11-23 2006-05-26 주식회사 하이닉스반도체 Circuit for selecting type of combo memory

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